From nobody Mon Feb 9 06:04:59 2026 Received: from mail-m49197.qiye.163.com (mail-m49197.qiye.163.com [45.254.49.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E83441953A1; Sat, 8 Mar 2025 10:00:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741428018; cv=none; b=aEgJ1tdiec5dmmzo+nkNK0nirsmJo4Pb6c//qYOY7RR/jr/9pFOcJRjUa3kiGQyVU1uRqRUutVzMNCJmfnxdGZQ+mPbMQAfEW9ZwU8ymFwQb5T3RAGG1GYUQQyiIBA+S8KXGMptxFmrzN3JJqGqVnMocwbI+QEHvRDIAhBLsBCY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741428018; c=relaxed/simple; bh=/8PtZDm0HENmu8+4NZljUI3Hp7pUmf1vbG73MhOYXT8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=eNBdhhHGS9I4J20Lsc9IU3sHjC5arBZ6+vSdzXcR926wysk2EmllP1kWEE6rKFX+knQPDojEySVfdyriJ8tBiMnNiK2E23ENNV7MJpMOazyDLa1KY9AnCLrIEIoLKyMFKpdCbD/sV8iclHsPakCKVCT4Svmq6TYKELLgUx8Q+Tw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn; spf=pass smtp.mailfrom=jmu.edu.cn; arc=none smtp.client-ip=45.254.49.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jmu.edu.cn Received: from amadeus-Vostro-3710.lan (unknown [IPV6:240e:3b3:2c00:3300:217:f42e:f419:35e]) by smtp.qiye.163.com (Hmail) with ESMTP id d8ad0332; Sat, 8 Mar 2025 18:00:07 +0800 (GMT+08:00) From: Chukun Pan To: Heiko Stuebner Cc: Krzysztof Kozlowski , Conor Dooley , Dragan Simic , Jonas Karlman , Rob Herring , linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Chukun Pan Subject: [PATCH 1/1] arm64: dts: rockchip: rk356x: Move SHMEM memory to reserved memory Date: Sat, 8 Mar 2025 18:00:01 +0800 Message-Id: <20250308100001.572657-2-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250308100001.572657-1-amadeus@jmu.edu.cn> References: <20250308100001.572657-1-amadeus@jmu.edu.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVlCGB5DVkIfSEJKGkpNTEwZSVYeHw5VEwETFhoSFy QUDg9ZV1kYEgtZQVlJT0seQUgZSEFJGEtLQUhIS0tBSUpMQR1PSR5BHU9KQkFITh5ZV1kWGg8SFR 0UWUFZT0tIVUpLSU9PT0tVSktLVUtZBg++ X-HM-Tid: 0a957532a0cf03a2kunmd8ad0332 X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6MAw6Eww5DTJWECkIPCs9Dy8V Qk4wCzdVSlVKTE9KT0lDS0tMTExIVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUlP Sx5BSBlIQUkYS0tBSEhLS0FJSkxBHU9JHkEdT0pCQUhOHllXWQgBWUFKTkpJNwY+ Content-Type: text/plain; charset="utf-8" 0x0 to 0xf0000000 are SDRAM memory areas where 0x10f000 is located. So move the SHMEM memory of arm_scmi to the reserved memory node. Fixes: a3adc0b9071d ("arm64: dts: rockchip: add core dtsi for RK3568 SoC") Signed-off-by: Chukun Pan --- arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 25 +++++++++---------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boo= t/dts/rockchip/rk356x-base.dtsi index 4f11141ea146..fd2214b6fad4 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi @@ -174,6 +174,18 @@ psci { method =3D "smc"; }; =20 + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + scmi_shmem: shmem@10f000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x0010f000 0x0 0x100>; + no-map; + }; + }; + timer { compatible =3D "arm,armv8-timer"; interrupts =3D , @@ -199,19 +211,6 @@ xin32k: xin32k { #clock-cells =3D <0>; }; =20 - sram@10f000 { - compatible =3D "mmio-sram"; - reg =3D <0x0 0x0010f000 0x0 0x100>; - #address-cells =3D <1>; - #size-cells =3D <1>; - ranges =3D <0 0x0 0x0010f000 0x100>; - - scmi_shmem: sram@0 { - compatible =3D "arm,scmi-shmem"; - reg =3D <0x0 0x100>; - }; - }; - sata1: sata@fc400000 { compatible =3D "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; reg =3D <0 0xfc400000 0 0x1000>; --=20 2.25.1