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Fri, 07 Mar 2025 09:57:58 -0800 (PST) Received: from localhost.localdomain ([5.133.47.210]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5e5c745c5afsm2803622a12.18.2025.03.07.09.57.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Mar 2025 09:57:57 -0800 (PST) From: srinivas.kandagatla@linaro.org To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Dmitry Baryshkov , Srinivas Kandagatla Subject: [PATCH 08/14] nvmem: core: fix bit offsets of more than one byte Date: Fri, 7 Mar 2025 17:57:18 +0000 Message-Id: <20250307175724.15068-9-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250307175724.15068-1-srinivas.kandagatla@linaro.org> References: <20250307175724.15068-1-srinivas.kandagatla@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2189; i=srinivas.kandagatla@linaro.org; h=from:subject; bh=fqrKmcbiS1AKaDRrZvXTHaNkz/q/+2qHSl68uGqUaBM=; b=owEBbQGS/pANAwAKAXqh/VnHNFU3AcsmYgBnyzN97hGNgbYjaTbvZPgdzB72XNiBcbLcq4a2R zoh1+IK6NSJATMEAAEKAB0WIQQi509axvzi9vce3Y16of1ZxzRVNwUCZ8szfQAKCRB6of1ZxzRV N7FbCAC2fYQ75qNn7uIOrrM/GfgdtFREP81SNBme3i+nK7aa8oBrjYz0PRLpt93jSTkUvtfPONc eNnYo6gqfXmYZ/stqP0rtMWxzVc/mwo2vcvPpvIZNdBgc4IJsCukzkMwhZfww9M6KjyxFSWHxZp vWEC1Ojwyy9YJAiHz/Z1dnOdPJRv+Pp/invb+iQOCNQq5roENMYpLibCRig2m88TjD1oz2tRRZT GuRhMcIUzql+bCr4Bb5eruK+W2jwE7OdM600T7i8ihU0GKO+qR7QP5vlbj7GIgj+9zkk2K4P6gH o/0iJXcKeMggRX7dwhaISwh2lJJTcgSPLMuqzsJCkKeXA34o X-Developer-Key: i=srinivas.kandagatla@linaro.org; a=openpgp; fpr=ED6472765AB36EC43B3EF97AD77E3FC0562560D6 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Dmitry Baryshkov If the NVMEM specifies a stride to access data, reading particular cell might require bit offset that is bigger than one byte. Rework NVMEM core code to support bit offsets of more than 8 bits. Signed-off-by: Dmitry Baryshkov Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/core.c | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index fff85bbf0ecd..7872903c08a1 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -837,7 +837,9 @@ static int nvmem_add_cells_from_dt(struct nvmem_device = *nvmem, struct device_nod if (addr && len =3D=3D (2 * sizeof(u32))) { info.bit_offset =3D be32_to_cpup(addr++); info.nbits =3D be32_to_cpup(addr); - if (info.bit_offset >=3D BITS_PER_BYTE || info.nbits < 1) { + if (info.bit_offset >=3D BITS_PER_BYTE * info.bytes || + info.nbits < 1 || + info.bit_offset + info.nbits > BITS_PER_BYTE * info.bytes) { dev_err(dev, "nvmem: invalid bits on %pOF\n", child); of_node_put(child); return -EINVAL; @@ -1630,21 +1632,29 @@ EXPORT_SYMBOL_GPL(nvmem_cell_put); static void nvmem_shift_read_buffer_in_place(struct nvmem_cell_entry *cell= , void *buf) { u8 *p, *b; - int i, extra, bit_offset =3D cell->bit_offset; + int i, extra, bytes_offset; + int bit_offset =3D cell->bit_offset; =20 p =3D b =3D buf; - if (bit_offset) { + + bytes_offset =3D bit_offset / BITS_PER_BYTE; + b +=3D bytes_offset; + bit_offset %=3D BITS_PER_BYTE; + + if (bit_offset % BITS_PER_BYTE) { /* First shift */ - *b++ >>=3D bit_offset; + *p =3D *b++ >> bit_offset; =20 /* setup rest of the bytes if any */ for (i =3D 1; i < cell->bytes; i++) { /* Get bits from next byte and shift them towards msb */ - *p |=3D *b << (BITS_PER_BYTE - bit_offset); + *p++ |=3D *b << (BITS_PER_BYTE - bit_offset); =20 - p =3D b; - *b++ >>=3D bit_offset; + *p =3D *b++ >> bit_offset; } + } else if (p !=3D b) { + memmove(p, b, cell->bytes - bytes_offset); + p +=3D cell->bytes - 1; } else { /* point to the msb */ p +=3D cell->bytes - 1; --=20 2.25.1