From nobody Tue Feb 10 20:48:02 2026 Received: from relay1-d.mail.gandi.net (relay1-d.mail.gandi.net [217.70.183.193]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 152F8218AB4 for ; Fri, 7 Mar 2025 15:08:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.193 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741360117; cv=none; b=JdcgbS7OKlFUKbOmK6QRZHktx/tZ0DMyUZI5sThMl/wqd2j9YatfBygIlY4ULdjPMca0j2nplo6uvKx7z3uvHE9ZxG6IMA7n9OlDQkuC27ICE9uVCQNjq1+Zq/O6UrGGTUHQk7VwItV0cLfTYPjfpi3vtRAJYWWfgbHe9ZO8QIA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741360117; c=relaxed/simple; bh=IQ+7PisUYEhv4I69UVc5TjzXxPmGq6eBtCrqhISQc0I=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=l+JiETbnF+lBj+GVHwdKn20q7JXk5qQvFNeA8TXmcO+0mVqQK44rmOna2fFw0MM8DMfkVCI62xOXd9cbwdDyyy3dqEcRstGybr7+79Q2Cl7CIfGden+v+8tTdAoHS5CGwVKD/OfTxp+Q2DdQC+8c/bNf0moBCcPy4EjLgLKvT60= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Ov/sWBec; arc=none smtp.client-ip=217.70.183.193 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Ov/sWBec" Received: by mail.gandi.net (Postfix) with ESMTPSA id C2BA644333; Fri, 7 Mar 2025 15:08:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1741360114; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DbeuAA1oxIHGLbIDFWP6h/ZS0xV/naUYJvq/oPOZHSQ=; b=Ov/sWBecFyAM2ysG+a4hiXmRrEBRdrNOyCIWq/oT5ztNQXEhs1VxhkEvUPHUmd0lMVJdvQ hFJpJoEcUtmXmzU+E5LsHqNwRC9RFMsYoQVlEzrXqLnPynwGqzJYxOeKlmTI+bHtvpRFRa CXr28nCK5YyWMGdSKEOxRa9gjFv1VccOgujkFzbjl1vg0QKkWMAA5x3W+BWOWJ+Be5jyXS SotQ8ubHx1p015m8DkJIIyzu/vAvjne7m5QSocdN+42vfP4TQhWzIp+xLqqMAW7ekf2Xg1 Yxj7JrmO7XoG8RtAnEX96BVK2DlplBlMeXn770AcMIrWUayeeSF/l/QYTcjMtQ== From: Miquel Raynal Date: Fri, 07 Mar 2025 16:08:21 +0100 Subject: [PATCH 02/21] mtd: spinand: Use more specific naming for the write enable/disable op Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250307-winbond-6-14-rc1-octal-v1-2-45c1e074ad74@bootlin.com> References: <20250307-winbond-6-14-rc1-octal-v1-0-45c1e074ad74@bootlin.com> In-Reply-To: <20250307-winbond-6-14-rc1-octal-v1-0-45c1e074ad74@bootlin.com> To: Richard Weinberger , Vignesh Raghavendra , Santhosh Kumar K Cc: Tudor Ambarus , Pratyush Yadav , Michael Walle , Thomas Petazzoni , Steam Lin , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.15-dev X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdduuddtleekucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuifetpfffkfdpucggtfgfnhhsuhgsshgtrhhisggvnecuuegrihhlohhuthemuceftddunecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenucfjughrpefhfffugggtgffkfhgjvfevofesthejredtredtjeenucfhrhhomhepofhiqhhuvghlucftrgihnhgrlhcuoehmihhquhgvlhdrrhgrhihnrghlsegsohhothhlihhnrdgtohhmqeenucggtffrrghtthgvrhhnpeelgfehvdduieefieeikeffgffggfdttdeugeffieetheeuleelfeehffdtffetveenucfkphepledvrddukeegrddutdekrddujeeinecuvehluhhsthgvrhfuihiivgepudenucfrrghrrghmpehinhgvthepledvrddukeegrddutdekrddujeeipdhhvghloheplgduledvrdduieekrddurddutdeingdpmhgrihhlfhhrohhmpehmihhquhgvlhdrrhgrhihnrghlsegsohhothhlihhnrdgtohhmpdhnsggprhgtphhtthhopeduuddprhgtphhtthhopehtuhguohhrrdgrmhgsrghruhhssehlihhnrghrohdrohhrghdprhgtphhtthhopehmihgthhgrvghlseifrghllhgvrdgttgdprhgtphhtthhopehthhhomhgrshdrphgvthgriiiiohhnihessghoohhtlhhinhdrtghomhdprhgtphhtthhopehlihhnuhigqdhkvghrnhgvlhesvhhgvghrrdhkvghrnhgvlhdrohhrghdprhgtphhtthhopehsthhlihhnv desfihinhgsohhnugdrtghomhdprhgtphhtthhopehmihhquhgvlhdrrhgrhihnrghlsegsohhothhlihhnrdgtohhmpdhrtghpthhtohepphhrrghthihushhhsehkvghrnhgvlhdrohhrghdprhgtphhtthhopehvihhgnhgvshhhrhesthhirdgtohhm X-GND-Sasl: miquel.raynal@bootlin.com SPI operations have been initially described through macros implicitly implying the use of a single SPI SDR bus. Macros for supporting dual and quad I/O transfers have been added on top, generally inspired by vendor naming, followed by DTR operations. Soon we might see octal and even octal DTR operations as well (including the opcode byte). Let's clarify what the macro really means by describing the expected bus topology in the write enable/disable macro names. Signed-off-by: Miquel Raynal Reviewed-by: Tudor Ambarus --- drivers/mtd/nand/spi/core.c | 2 +- include/linux/mtd/spinand.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index ea6b48242ad4a4e51c713907ce5cc55022cdb569..bbf0048104aac86e90b0706793d= b8503c8fc2a3b 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -362,7 +362,7 @@ static void spinand_ondie_ecc_save_status(struct nand_d= evice *nand, u8 status) =20 static int spinand_write_enable_op(struct spinand_device *spinand) { - struct spi_mem_op op =3D SPINAND_WR_EN_DIS_OP(true); + struct spi_mem_op op =3D SPINAND_WR_EN_DIS_1S_0_0_OP(true); =20 return spi_mem_exec_op(spinand->spimem, &op); } diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index 4f47adbe4566d7813ffd8fbfaddd1a85d88d0208..0d2f92d0746e8079e46bac9402d= dd22d3d2a86bf 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -26,7 +26,7 @@ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_NO_DATA) =20 -#define SPINAND_WR_EN_DIS_OP(enable) \ +#define SPINAND_WR_EN_DIS_1S_0_0_OP(enable) \ SPI_MEM_OP(SPI_MEM_OP_CMD((enable) ? 0x06 : 0x04, 1), \ SPI_MEM_OP_NO_ADDR, \ SPI_MEM_OP_NO_DUMMY, \ --=20 2.48.1