From nobody Sun Feb 8 15:42:39 2026 Received: from mail-m49198.qiye.163.com (mail-m49198.qiye.163.com [45.254.49.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 74ADEEEA9; Thu, 6 Mar 2025 15:00:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741273233; cv=none; b=byt+f+mJxqlTq7wvvbD6ByuqEK6Xu3JYTV4CE8lRnTvfI+isDItv3Bt2bUlR44jzN83FNB+iscaLIFJQcyBmFncyREJrWQKvHRJCKIqzrFjAf1zy9cLrwFTMqDckv9dtI7+Ddw/SQ9+1bVfh7yvxeAEwLP8hudyDuwYlXtIqf0Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741273233; c=relaxed/simple; bh=zNCmf2624Z2cYLbBy735O2kbW1NglyH5u7s4xhQyILo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=FV8yv2yOwBytg9q4mzCNYNLhCRJEEncgZ0qPVUl5Vx8CSawS/Kxg0VDQRQXw/Zxoja65aSpRDXux3qbh3rCTUaW7+E9+KkthgQ2OYCiFWjDC8oT5E5fdxVmT22qQFKWuzdcn4vke8evSFZxel0aYIu3vtdPlUCcqYQ6zUUa6Q4E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn; spf=pass smtp.mailfrom=jmu.edu.cn; arc=none smtp.client-ip=45.254.49.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jmu.edu.cn Received: from localhost.localdomain (unknown [119.122.215.89]) by smtp.qiye.163.com (Hmail) with ESMTP id d2dcd17e; Thu, 6 Mar 2025 23:00:27 +0800 (GMT+08:00) From: Chukun Pan To: Heiko Stuebner Cc: Yao Zi , Rob Herring , Conor Dooley , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Chukun Pan Subject: [PATCH v2 1/1] arm64: dts: rockchip: enable SCMI clk for RK3528 SoC Date: Thu, 6 Mar 2025 23:00:17 +0800 Message-Id: <20250306150017.488975-2-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250306150017.488975-1-amadeus@jmu.edu.cn> References: <20250306150017.488975-1-amadeus@jmu.edu.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVkaSx1JVkxNHkMdTEwaTU1MSFYeHw5VEwETFhoSFy QUDg9ZV1kYEgtZQVlKSkJVSklJVUlKTlVDQllXWRYaDxIVHRRZQVlPS0hVSktISk5MTlVKS0tVSk JLS1kG X-HM-Tid: 0a956bf8e0a003a2kunmd2dcd17e X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6MU06TRw*KjJOMjM#DTU5Eg4j GCgwCypVSlVKTE9KSUxISUlDS0NDVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUpK QlVKSUlVSUpOVUNCWVdZCAFZQUpCQ0s3Bg++ Content-Type: text/plain; charset="utf-8" Same as RK3568, RK3528 uses SCMI clk instead of ARMCLK. Add SCMI clk for CPU, GPU and RNG will also use it. Signed-off-by: Chukun Pan --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 33 ++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts= /rockchip/rk3528.dtsi index b1713ed4d7e2..476b83f98834 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -59,6 +59,9 @@ cpu0: cpu@0 { reg =3D <0x0>; device_type =3D "cpu"; enable-method =3D "psci"; + clocks =3D <&scmi_clk SCMI_CLK_CPU>; + assigned-clocks =3D <&scmi_clk SCMI_CLK_CPU>; + assigned-clock-rates =3D <1200000000>; }; =20 cpu1: cpu@1 { @@ -66,6 +69,7 @@ cpu1: cpu@1 { reg =3D <0x1>; device_type =3D "cpu"; enable-method =3D "psci"; + clocks =3D <&scmi_clk SCMI_CLK_CPU>; }; =20 cpu2: cpu@2 { @@ -73,6 +77,7 @@ cpu2: cpu@2 { reg =3D <0x2>; device_type =3D "cpu"; enable-method =3D "psci"; + clocks =3D <&scmi_clk SCMI_CLK_CPU>; }; =20 cpu3: cpu@3 { @@ -80,6 +85,22 @@ cpu3: cpu@3 { reg =3D <0x3>; device_type =3D "cpu"; enable-method =3D "psci"; + clocks =3D <&scmi_clk SCMI_CLK_CPU>; + }; + }; + + firmware { + scmi: scmi { + compatible =3D "arm,scmi-smc"; + arm,smc-id =3D <0x82000010>; + shmem =3D <&scmi_shmem>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + scmi_clk: protocol@14 { + reg =3D <0x14>; + #clock-cells =3D <1>; + }; }; }; =20 @@ -88,6 +109,18 @@ psci { method =3D "smc"; }; =20 + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + scmi_shmem: shmem@10f000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x0010f000 0x0 0x100>; + no-map; + }; + }; + timer { compatible =3D "arm,armv8-timer"; interrupts =3D , --=20 2.25.1