From nobody Sun Feb 8 17:42:32 2026 Received: from mail-m49197.qiye.163.com (mail-m49197.qiye.163.com [45.254.49.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E7727205E25; Thu, 6 Mar 2025 12:38:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741264706; cv=none; b=WcG3UfBtKFhjkG4ZpBIf+yYBgqAsk44T3wYwlkWdXf5x/HrTdzogwr3xmZyIFcEHS9rOtMCyN4fwVQrLUpG7QJPeoWUeV46PT8IVT76eI1uJ6CrEEC68c3hcseFY7PqEcBdPNfIOT1sMrFTsVQzYuxIogiDUhfaRbpJ9ckms5Ac= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741264706; c=relaxed/simple; bh=1gg7yYmXfkSRiKg0BhD1SIHAj1+nZMfwcgoSqHFx7d0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=cIYUxUOFApoNw3Kc1QOixmwFDEvz3eDajiMmKMoLsvBqVlAaD8aENQRnPQ7gIRGvfDbvOnNSneb71HCRr29h5na2cDvRx0MA1FGZ23SfOmyz3246RjaMXlIT2U0rdqo9MzWhxXt3tau85IfbGeRDETgSY/AP3aCkJGUbOBKoErc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn; spf=pass smtp.mailfrom=jmu.edu.cn; arc=none smtp.client-ip=45.254.49.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jmu.edu.cn Received: from localhost.localdomain (unknown [119.122.215.89]) by smtp.qiye.163.com (Hmail) with ESMTP id d2b83ca6; Thu, 6 Mar 2025 20:38:19 +0800 (GMT+08:00) From: Chukun Pan To: Yao Zi Cc: Lee Jones , Rob Herring , Heiko Stuebner , Conor Dooley , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Chukun Pan Subject: [PATCH v2 1/2] dt-bindings: mfd: syscon: Add rk3528 QoS register compatible Date: Thu, 6 Mar 2025 20:38:08 +0800 Message-Id: <20250306123809.273655-2-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250306123809.273655-1-amadeus@jmu.edu.cn> References: <20250306123809.273655-1-amadeus@jmu.edu.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVlDTUhIVkpMHR5DGE9PShkaGlYeHw5VEwETFhoSFy QUDg9ZV1kYEgtZQVlKSkJVSklJVUlKTlVDQllXWRYaDxIVHRRZQVlPS0hVSktISk5MTlVKS0tVSk JLS1kG X-HM-Tid: 0a956b76c06c03a2kunmd2b83ca6 X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6Ny46KCo5PzJJIjMJMBlIIxQU OCkKC05VSlVKTE9KSU1PTEtLSU9KVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUpK QlVKSUlVSUpOVUNCWVdZCAFZQUpLSUo3Bg++ Content-Type: text/plain; charset="utf-8" Document rk3528 compatible for QoS registers. Signed-off-by: Chukun Pan Acked-by: Conor Dooley --- Documentation/devicetree/bindings/mfd/syscon.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentat= ion/devicetree/bindings/mfd/syscon.yaml index 4d67ff26d445..2836e4793afc 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -103,6 +103,7 @@ select: - rockchip,rk3288-qos - rockchip,rk3368-qos - rockchip,rk3399-qos + - rockchip,rk3528-qos - rockchip,rk3562-qos - rockchip,rk3568-qos - rockchip,rk3576-qos @@ -202,6 +203,7 @@ properties: - rockchip,rk3288-qos - rockchip,rk3368-qos - rockchip,rk3399-qos + - rockchip,rk3528-qos - rockchip,rk3562-qos - rockchip,rk3568-qos - rockchip,rk3576-qos --=20 2.25.1 From nobody Sun Feb 8 17:42:32 2026 Received: from mail-m49198.qiye.163.com (mail-m49198.qiye.163.com [45.254.49.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97B531FC0E5; Thu, 6 Mar 2025 12:38:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741264707; cv=none; b=ejjvRauIvIcks2boFco+zXVKWifNMe2dtl+LX8TpMltzb9+5KdckSaiVHAWj9020hxSWld4WHJO3BjSfnKAq5tKQvv8Hn2MLcYIHvaZ74omR/iLrXO65jKgMQ/HrCcqKc9yPLrLu524xtvKnC5qqZ0jY50rZfj9ZhpChPMWHcss= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741264707; c=relaxed/simple; bh=xxOvVK9Sks7tUoVjapi3LlbR4PhZGDeFV3rJrw00MF8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=A2KstlmQwYSL/DFMi12w+a2SlGdCTvY7dH4oQ8h/KbYNhjYDlAjn+yspnRybh96PkmgD8ABQ0077kgSdlcqm1HDpcWvW9eXZlgtj/WQxMLrfAfge9jLT4TuPzA2m5ueq6F6OyJUnM7ux0L5VJKCJsMQXCt2bppqOCG/46hlvOGc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn; spf=pass smtp.mailfrom=jmu.edu.cn; arc=none smtp.client-ip=45.254.49.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jmu.edu.cn Received: from localhost.localdomain (unknown [119.122.215.89]) by smtp.qiye.163.com (Hmail) with ESMTP id d2b83ca7; Thu, 6 Mar 2025 20:38:21 +0800 (GMT+08:00) From: Chukun Pan To: Yao Zi Cc: Lee Jones , Rob Herring , Heiko Stuebner , Conor Dooley , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Chukun Pan Subject: [PATCH v2 2/2] arm64: dts: rockchip: Add rk3528 QoS register node Date: Thu, 6 Mar 2025 20:38:09 +0800 Message-Id: <20250306123809.273655-3-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250306123809.273655-1-amadeus@jmu.edu.cn> References: <20250306123809.273655-1-amadeus@jmu.edu.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVkZTxkZVk9ISx9LGEtCHUsZTlYeHw5VEwETFhoSFy QUDg9ZV1kYEgtZQVlKSkJVSklJVUlKTlVDQllXWRYaDxIVHRRZQVlPS0hVSktJT09PS1VKS0tVS1 kG X-HM-Tid: 0a956b76c86d03a2kunmd2b83ca7 X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6PAg6Hio4QzJMKjM#GiJLIwpN PiIwCTBVSlVKTE9KSU1PTEtJSU9OVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUpK QlVKSUlVSUpOVUNCWVdZCAFZQU9CTUk3Bg++ Content-Type: text/plain; charset="utf-8" The Quality-of-Service (QsS) node stores/restores specific register contents when the power domains is turned off/on. Add QoS node so that they can connect to the power domain. Signed-off-by: Chukun Pan --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 160 +++++++++++++++++++++++ 1 file changed, 160 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts= /rockchip/rk3528.dtsi index b1713ed4d7e2..0c0e7f151462 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -129,6 +129,166 @@ gic: interrupt-controller@fed01000 { #interrupt-cells =3D <3>; }; =20 + qos_crypto_a: qos@ff200000 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff200000 0x0 0x20>; + }; + + qos_crypto_p: qos@ff200080 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff200080 0x0 0x20>; + }; + + qos_dcf: qos@ff200100 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff200100 0x0 0x20>; + }; + + qos_dft2apb: qos@ff200200 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff200200 0x0 0x20>; + }; + + qos_dma2ddr: qos@ff200280 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff200280 0x0 0x20>; + }; + + qos_dmac: qos@ff200300 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff200300 0x0 0x20>; + }; + + qos_keyreader: qos@ff200380 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff200380 0x0 0x20>; + }; + + qos_cpu: qos@ff210000 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff210000 0x0 0x20>; + }; + + qos_debug: qos@ff210080 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff210080 0x0 0x20>; + }; + + qos_gpu_m0: qos@ff220000 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff220000 0x0 0x20>; + }; + + qos_gpu_m1: qos@ff220080 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff220080 0x0 0x20>; + }; + + qos_pmu_mcu: qos@ff240000 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff240000 0x0 0x20>; + }; + + qos_rkvdec: qos@ff250000 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff250000 0x0 0x20>; + }; + + qos_rkvenc: qos@ff260000 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff260000 0x0 0x20>; + }; + + qos_gmac0: qos@ff270000 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff270000 0x0 0x20>; + }; + + qos_hdcp: qos@ff270080 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff270080 0x0 0x20>; + }; + + qos_jpegdec: qos@ff270100 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff270100 0x0 0x20>; + }; + + qos_rga2_m0ro: qos@ff270200 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff270200 0x0 0x20>; + }; + + qos_rga2_m0wo: qos@ff270280 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff270280 0x0 0x20>; + }; + + qos_sdmmc0: qos@ff270300 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff270300 0x0 0x20>; + }; + + qos_usb2host: qos@ff270380 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff270380 0x0 0x20>; + }; + + qos_vdpp: qos@ff270480 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff270480 0x0 0x20>; + }; + + qos_vop: qos@ff270500 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff270500 0x0 0x20>; + }; + + qos_emmc: qos@ff280000 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff280000 0x0 0x20>; + }; + + qos_fspi: qos@ff280080 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff280080 0x0 0x20>; + }; + + qos_gmac1: qos@ff280100 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff280100 0x0 0x20>; + }; + + qos_pcie: qos@ff280180 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff280180 0x0 0x20>; + }; + + qos_sdio0: qos@ff280200 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff280200 0x0 0x20>; + }; + + qos_sdio1: qos@ff280280 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff280280 0x0 0x20>; + }; + + qos_tsp: qos@ff280300 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff280300 0x0 0x20>; + }; + + qos_usb3otg: qos@ff280380 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff280380 0x0 0x20>; + }; + + qos_vpu: qos@ff280400 { + compatible =3D "rockchip,rk3528-qos", "syscon"; + reg =3D <0x0 0xff280400 0x0 0x20>; + }; + cru: clock-controller@ff4a0000 { compatible =3D "rockchip,rk3528-cru"; reg =3D <0x0 0xff4a0000 0x0 0x30000>; --=20 2.25.1