From nobody Wed Dec 17 19:37:34 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 0C98D20AF72 for ; Thu, 6 Mar 2025 09:48:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741254488; cv=none; b=CPRUl88dQvuhkJ2cQq38Qn6ksUOnNoyqzik7iPQ6Nzy5yrqfe1f/cmwl5nmyEqVlbZvg799AoID9ApTVIuOQZgagx7uVIQX5a+tUo7KrjbWrRz7RN715nkl4eXhySnOsSo/3JTv89CwiuzYPAz0OlhJcTWDiWG16AC6A5bLb/fk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741254488; c=relaxed/simple; bh=QSzcCqF2J+IRXhe9nt1lJ9nV2jy7k/V6P+Q6SJ8SJew=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=BsvXV3ZzUz2OvxBeMllGb8K8YJfc+cUilQwXbgJlbGlTnEFJYPvCJ0fAcTuz+IifDISt0cFx9sUtkrRJImTeRGYlgxWrJ0A2r518eaUZEcPom1vREs9gTllBrvmHhm9SOxdbzlVl5R1nakHkCSXvBK5Yz6wanqZo9MJNN/hDtwk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 762A31007; Thu, 6 Mar 2025 01:48:19 -0800 (PST) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B35503F673; Thu, 6 Mar 2025 01:48:04 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, Yeoreum Yun Subject: [PATCH v5 1/9] coresight: change coresight_device lock type to raw_spinlock_t Date: Thu, 6 Mar 2025 09:47:52 +0000 Message-Id: <20250306094800.1082950-2-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250306094800.1082950-1-yeoreum.yun@arm.com> References: <20250306094800.1082950-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" coresight_device->cscfg_csdev_lock can be held during __schedule() by perf_event_task_sched_out()/in(). Since coresight->cscfg_csdev_lock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type of coresight_device->cscfg_csdev_lock from spinlock_t to raw_spinlock_t. Reviewed-by: James Clark Reviewed-by: Mike Leach Signed-off-by: Yeoreum Yun --- .../hwtracing/coresight/coresight-syscfg.c | 26 +++++++++---------- include/linux/coresight.h | 2 +- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-syscfg.c b/drivers/hwtra= cing/coresight/coresight-syscfg.c index 11138a9762b0..a70c1454b410 100644 --- a/drivers/hwtracing/coresight/coresight-syscfg.c +++ b/drivers/hwtracing/coresight/coresight-syscfg.c @@ -89,9 +89,9 @@ static int cscfg_add_csdev_cfg(struct coresight_device *c= sdev, } /* if matched features, add config to device.*/ if (config_csdev) { - spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); + raw_spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); list_add(&config_csdev->node, &csdev->config_csdev_list); - spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); + raw_spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); } =20 return 0; @@ -194,9 +194,9 @@ static int cscfg_load_feat_csdev(struct coresight_devic= e *csdev, =20 /* add to internal csdev feature list & initialise using reset call */ cscfg_reset_feat(feat_csdev); - spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); + raw_spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); list_add(&feat_csdev->node, &csdev->feature_csdev_list); - spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); + raw_spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); =20 return 0; } @@ -765,7 +765,7 @@ static int cscfg_list_add_csdev(struct coresight_device= *csdev, =20 INIT_LIST_HEAD(&csdev->feature_csdev_list); INIT_LIST_HEAD(&csdev->config_csdev_list); - spin_lock_init(&csdev->cscfg_csdev_lock); + raw_spin_lock_init(&csdev->cscfg_csdev_lock); =20 return 0; } @@ -855,7 +855,7 @@ void cscfg_csdev_reset_feats(struct coresight_device *c= sdev) struct cscfg_feature_csdev *feat_csdev; unsigned long flags; =20 - spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); + raw_spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); if (list_empty(&csdev->feature_csdev_list)) goto unlock_exit; =20 @@ -863,7 +863,7 @@ void cscfg_csdev_reset_feats(struct coresight_device *c= sdev) cscfg_reset_feat(feat_csdev); =20 unlock_exit: - spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); + raw_spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); } EXPORT_SYMBOL_GPL(cscfg_csdev_reset_feats); =20 @@ -1059,7 +1059,7 @@ int cscfg_csdev_enable_active_config(struct coresight= _device *csdev, * Look for matching configuration - set the active configuration * context if found. */ - spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); + raw_spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); list_for_each_entry(config_csdev_item, &csdev->config_csdev_list, node) { config_desc =3D config_csdev_item->config_desc; if ((atomic_read(&config_desc->active_cnt)) && @@ -1069,7 +1069,7 @@ int cscfg_csdev_enable_active_config(struct coresight= _device *csdev, break; } } - spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); + raw_spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); =20 /* * If found, attempt to enable @@ -1090,12 +1090,12 @@ int cscfg_csdev_enable_active_config(struct coresig= ht_device *csdev, * * Set enabled if OK, err if not. */ - spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); + raw_spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); if (csdev->active_cscfg_ctxt) config_csdev_active->enabled =3D true; else err =3D -EBUSY; - spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); + raw_spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); } } return err; @@ -1124,7 +1124,7 @@ void cscfg_csdev_disable_active_config(struct coresig= ht_device *csdev) * If it was not enabled, we have no work to do, otherwise mark as disabl= ed. * Clear the active config pointer. */ - spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); + raw_spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); config_csdev =3D (struct cscfg_config_csdev *)csdev->active_cscfg_ctxt; if (config_csdev) { if (!config_csdev->enabled) @@ -1133,7 +1133,7 @@ void cscfg_csdev_disable_active_config(struct coresig= ht_device *csdev) config_csdev->enabled =3D false; } csdev->active_cscfg_ctxt =3D NULL; - spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); + raw_spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); =20 /* true if there was an enabled active config */ if (config_csdev) diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 89b781e70fe7..4541bfc1cc6b 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -302,7 +302,7 @@ struct coresight_device { /* system configuration and feature lists */ struct list_head feature_csdev_list; struct list_head config_csdev_list; - spinlock_t cscfg_csdev_lock; + raw_spinlock_t cscfg_csdev_lock; void *active_cscfg_ctxt; }; =20 --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Wed Dec 17 19:37:34 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4FB3420AF9C for ; Thu, 6 Mar 2025 09:48:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741254491; cv=none; b=WjepHKMREi6PWRDnRWk2tYYT1eKUejjV/tfj0Ocze77Zc+/QYxRJ5ngCa+EQhPhjMZYgo5UKWF+OX09VDmR6t3O9mDwkgze3MSA29QqVzJb6fb7uTUFf/qRPs/YlKfeWeeXUV+dNVannqFfqZsdX/vkvjySYULi8pW4qvbMHn0o= ARC-Message-Signature: i=1; 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Thu, 6 Mar 2025 01:48:06 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, Yeoreum Yun Subject: [PATCH v5 2/9] coresight-etm4x: change etmv4_drvdata spinlock type to raw_spinlock_t Date: Thu, 6 Mar 2025 09:47:53 +0000 Message-Id: <20250306094800.1082950-3-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250306094800.1082950-1-yeoreum.yun@arm.com> References: <20250306094800.1082950-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In coresight-etm4x drivers, etmv4_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since etmv4_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type etmv4_drvdata->spinlock in coresight-etm4x drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Signed-off-by: Yeoreum Yun Reviewed-by: James Clark --- .../hwtracing/coresight/coresight-config.c | 8 +- .../hwtracing/coresight/coresight-config.h | 2 +- .../coresight/coresight-etm4x-core.c | 18 +- .../coresight/coresight-etm4x-sysfs.c | 250 +++++++++--------- drivers/hwtracing/coresight/coresight-etm4x.h | 2 +- 5 files changed, 140 insertions(+), 140 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-config.c b/drivers/hwtra= cing/coresight/coresight-config.c index 4723bf7402a2..4f72ae71b696 100644 --- a/drivers/hwtracing/coresight/coresight-config.c +++ b/drivers/hwtracing/coresight/coresight-config.c @@ -76,10 +76,10 @@ static int cscfg_set_on_enable(struct cscfg_feature_csd= ev *feat_csdev) unsigned long flags; int i; =20 - spin_lock_irqsave(feat_csdev->drv_spinlock, flags); + raw_spin_lock_irqsave(feat_csdev->drv_spinlock, flags); for (i =3D 0; i < feat_csdev->nr_regs; i++) cscfg_set_reg(&feat_csdev->regs_csdev[i]); - spin_unlock_irqrestore(feat_csdev->drv_spinlock, flags); + raw_spin_unlock_irqrestore(feat_csdev->drv_spinlock, flags); dev_dbg(&feat_csdev->csdev->dev, "Feature %s: %s", feat_csdev->feat_desc->name, "set on enable"); return 0; @@ -91,10 +91,10 @@ static void cscfg_save_on_disable(struct cscfg_feature_= csdev *feat_csdev) unsigned long flags; int i; =20 - spin_lock_irqsave(feat_csdev->drv_spinlock, flags); + raw_spin_lock_irqsave(feat_csdev->drv_spinlock, flags); for (i =3D 0; i < feat_csdev->nr_regs; i++) cscfg_save_reg(&feat_csdev->regs_csdev[i]); - spin_unlock_irqrestore(feat_csdev->drv_spinlock, flags); + raw_spin_unlock_irqrestore(feat_csdev->drv_spinlock, flags); dev_dbg(&feat_csdev->csdev->dev, "Feature %s: %s", feat_csdev->feat_desc->name, "save on disable"); } diff --git a/drivers/hwtracing/coresight/coresight-config.h b/drivers/hwtra= cing/coresight/coresight-config.h index 6ba013975741..b9ebc9fcfb7f 100644 --- a/drivers/hwtracing/coresight/coresight-config.h +++ b/drivers/hwtracing/coresight/coresight-config.h @@ -206,7 +206,7 @@ struct cscfg_feature_csdev { const struct cscfg_feature_desc *feat_desc; struct coresight_device *csdev; struct list_head node; - spinlock_t *drv_spinlock; + raw_spinlock_t *drv_spinlock; int nr_params; struct cscfg_parameter_csdev *params_csdev; int nr_regs; diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/h= wtracing/coresight/coresight-etm4x-core.c index bb1e80df2914..e5972f16abff 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -830,7 +830,7 @@ static int etm4_enable_sysfs(struct coresight_device *c= sdev, struct coresight_pa return ret; } =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); =20 drvdata->trcid =3D path->trace_id; =20 @@ -849,7 +849,7 @@ static int etm4_enable_sysfs(struct coresight_device *c= sdev, struct coresight_pa if (ret) etm4_release_trace_id(drvdata); =20 - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); =20 if (!ret) dev_dbg(&csdev->dev, "ETM tracing enabled\n"); @@ -1011,7 +1011,7 @@ static void etm4_disable_sysfs(struct coresight_devic= e *csdev) * DYING hotplug callback is serviced by the ETM driver. */ cpus_read_lock(); - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); =20 /* * Executing etm4_disable_hw on the cpu whose ETM is being disabled @@ -1019,7 +1019,7 @@ static void etm4_disable_sysfs(struct coresight_devic= e *csdev) */ smp_call_function_single(drvdata->cpu, etm4_disable_hw, drvdata, 1); =20 - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); cpus_read_unlock(); =20 /* @@ -1698,13 +1698,13 @@ static int etm4_starting_cpu(unsigned int cpu) if (!etmdrvdata[cpu]) return 0; =20 - spin_lock(&etmdrvdata[cpu]->spinlock); + raw_spin_lock(&etmdrvdata[cpu]->spinlock); if (!etmdrvdata[cpu]->os_unlock) etm4_os_unlock(etmdrvdata[cpu]); =20 if (coresight_get_mode(etmdrvdata[cpu]->csdev)) etm4_enable_hw(etmdrvdata[cpu]); - spin_unlock(&etmdrvdata[cpu]->spinlock); + raw_spin_unlock(&etmdrvdata[cpu]->spinlock); return 0; } =20 @@ -1713,10 +1713,10 @@ static int etm4_dying_cpu(unsigned int cpu) if (!etmdrvdata[cpu]) return 0; =20 - spin_lock(&etmdrvdata[cpu]->spinlock); + raw_spin_lock(&etmdrvdata[cpu]->spinlock); if (coresight_get_mode(etmdrvdata[cpu]->csdev)) etm4_disable_hw(etmdrvdata[cpu]); - spin_unlock(&etmdrvdata[cpu]->spinlock); + raw_spin_unlock(&etmdrvdata[cpu]->spinlock); return 0; } =20 @@ -2160,7 +2160,7 @@ static int etm4_probe(struct device *dev) return -ENOMEM; } =20 - spin_lock_init(&drvdata->spinlock); + raw_spin_lock_init(&drvdata->spinlock); =20 drvdata->cpu =3D coresight_get_cpu(dev); if (drvdata->cpu < 0) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/= hwtracing/coresight/coresight-etm4x-sysfs.c index e5216c0f60da..fdd0956fecb3 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -175,7 +175,7 @@ static ssize_t reset_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); if (val) config->mode =3D 0x0; =20 @@ -267,7 +267,7 @@ static ssize_t reset_store(struct device *dev, config->vmid_mask0 =3D 0x0; config->vmid_mask1 =3D 0x0; =20 - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); =20 /* for sysfs - only release trace id when resetting */ etm4_release_trace_id(drvdata); @@ -301,7 +301,7 @@ static ssize_t mode_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); config->mode =3D val & ETMv4_MODE_ALL; =20 if (drvdata->instrp0 =3D=3D true) { @@ -438,7 +438,7 @@ static ssize_t mode_store(struct device *dev, if (config->mode & (ETM_MODE_EXCL_KERN | ETM_MODE_EXCL_USER)) etm4_config_trace_mode(config); =20 - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); =20 return size; } @@ -467,14 +467,14 @@ static ssize_t pe_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); if (val > drvdata->nr_pe) { - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return -EINVAL; } =20 config->pe_sel =3D val; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(pe); @@ -502,7 +502,7 @@ static ssize_t event_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); switch (drvdata->nr_event) { case 0x0: /* EVENT0, bits[7:0] */ @@ -523,7 +523,7 @@ static ssize_t event_store(struct device *dev, default: break; } - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(event); @@ -551,7 +551,7 @@ static ssize_t event_instren_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); /* start by clearing all instruction event enable bits */ config->eventctrl1 &=3D ~TRCEVENTCTL1R_INSTEN_MASK; switch (drvdata->nr_event) { @@ -579,7 +579,7 @@ static ssize_t event_instren_store(struct device *dev, default: break; } - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(event_instren); @@ -740,11 +740,11 @@ static ssize_t event_vinst_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); val &=3D TRCVICTLR_EVENT_MASK >> __bf_shf(TRCVICTLR_EVENT_MASK); config->vinst_ctrl &=3D ~TRCVICTLR_EVENT_MASK; config->vinst_ctrl |=3D FIELD_PREP(TRCVICTLR_EVENT_MASK, val); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(event_vinst); @@ -772,13 +772,13 @@ static ssize_t s_exlevel_vinst_store(struct device *d= ev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); /* clear all EXLEVEL_S bits */ config->vinst_ctrl &=3D ~TRCVICTLR_EXLEVEL_S_MASK; /* enable instruction tracing for corresponding exception level */ val &=3D drvdata->s_ex_level; config->vinst_ctrl |=3D val << __bf_shf(TRCVICTLR_EXLEVEL_S_MASK); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(s_exlevel_vinst); @@ -807,13 +807,13 @@ static ssize_t ns_exlevel_vinst_store(struct device *= dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); /* clear EXLEVEL_NS bits */ config->vinst_ctrl &=3D ~TRCVICTLR_EXLEVEL_NS_MASK; /* enable instruction tracing for corresponding exception level */ val &=3D drvdata->ns_ex_level; config->vinst_ctrl |=3D val << __bf_shf(TRCVICTLR_EXLEVEL_NS_MASK); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(ns_exlevel_vinst); @@ -847,9 +847,9 @@ static ssize_t addr_idx_store(struct device *dev, * Use spinlock to ensure index doesn't change while it gets * dereferenced multiple times within a spinlock block elsewhere. */ - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); config->addr_idx =3D val; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(addr_idx); @@ -863,7 +863,7 @@ static ssize_t addr_instdatatype_show(struct device *de= v, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->addr_idx; val =3D FIELD_GET(TRCACATRn_TYPE_MASK, config->addr_acc[idx]); len =3D scnprintf(buf, PAGE_SIZE, "%s\n", @@ -871,7 +871,7 @@ static ssize_t addr_instdatatype_show(struct device *de= v, (val =3D=3D TRCACATRn_TYPE_DATA_LOAD_ADDR ? "data_load" : (val =3D=3D TRCACATRn_TYPE_DATA_STORE_ADDR ? "data_store" : "data_load_store"))); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return len; } =20 @@ -889,13 +889,13 @@ static ssize_t addr_instdatatype_store(struct device = *dev, if (sscanf(buf, "%s", str) !=3D 1) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->addr_idx; if (!strcmp(str, "instr")) /* TYPE, bits[1:0] */ config->addr_acc[idx] &=3D ~TRCACATRn_TYPE_MASK; =20 - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(addr_instdatatype); @@ -910,14 +910,14 @@ static ssize_t addr_single_show(struct device *dev, struct etmv4_config *config =3D &drvdata->config; =20 idx =3D config->addr_idx; - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); if (!(config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE || config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_SINGLE)) { - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return -EPERM; } val =3D (unsigned long)config->addr_val[idx]; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -933,17 +933,17 @@ static ssize_t addr_single_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->addr_idx; if (!(config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE || config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_SINGLE)) { - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return -EPERM; } =20 config->addr_val[idx] =3D (u64)val; config->addr_type[idx] =3D ETM_ADDR_TYPE_SINGLE; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(addr_single); @@ -957,23 +957,23 @@ static ssize_t addr_range_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->addr_idx; if (idx % 2 !=3D 0) { - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return -EPERM; } if (!((config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE && config->addr_type[idx + 1] =3D=3D ETM_ADDR_TYPE_NONE) || (config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_RANGE && config->addr_type[idx + 1] =3D=3D ETM_ADDR_TYPE_RANGE))) { - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return -EPERM; } =20 val1 =3D (unsigned long)config->addr_val[idx]; val2 =3D (unsigned long)config->addr_val[idx + 1]; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2); } =20 @@ -996,10 +996,10 @@ static ssize_t addr_range_store(struct device *dev, if (val1 > val2) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->addr_idx; if (idx % 2 !=3D 0) { - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return -EPERM; } =20 @@ -1007,7 +1007,7 @@ static ssize_t addr_range_store(struct device *dev, config->addr_type[idx + 1] =3D=3D ETM_ADDR_TYPE_NONE) || (config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_RANGE && config->addr_type[idx + 1] =3D=3D ETM_ADDR_TYPE_RANGE))) { - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return -EPERM; } =20 @@ -1024,7 +1024,7 @@ static ssize_t addr_range_store(struct device *dev, exclude =3D config->mode & ETM_MODE_EXCLUDE; etm4_set_mode_exclude(drvdata, exclude ? true : false); =20 - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(addr_range); @@ -1038,17 +1038,17 @@ static ssize_t addr_start_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->addr_idx; =20 if (!(config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE || config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_START)) { - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return -EPERM; } =20 val =3D (unsigned long)config->addr_val[idx]; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1064,22 +1064,22 @@ static ssize_t addr_start_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->addr_idx; if (!drvdata->nr_addr_cmp) { - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return -EINVAL; } if (!(config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE || config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_START)) { - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return -EPERM; } =20 config->addr_val[idx] =3D (u64)val; config->addr_type[idx] =3D ETM_ADDR_TYPE_START; config->vissctlr |=3D BIT(idx); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(addr_start); @@ -1093,17 +1093,17 @@ static ssize_t addr_stop_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->addr_idx; =20 if (!(config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE || config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_STOP)) { - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return -EPERM; } =20 val =3D (unsigned long)config->addr_val[idx]; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1119,22 +1119,22 @@ static ssize_t addr_stop_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->addr_idx; if (!drvdata->nr_addr_cmp) { - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return -EINVAL; } if (!(config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE || config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_STOP)) { - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return -EPERM; } =20 config->addr_val[idx] =3D (u64)val; config->addr_type[idx] =3D ETM_ADDR_TYPE_STOP; config->vissctlr |=3D BIT(idx + 16); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(addr_stop); @@ -1148,14 +1148,14 @@ static ssize_t addr_ctxtype_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->addr_idx; /* CONTEXTTYPE, bits[3:2] */ val =3D FIELD_GET(TRCACATRn_CONTEXTTYPE_MASK, config->addr_acc[idx]); len =3D scnprintf(buf, PAGE_SIZE, "%s\n", val =3D=3D ETM_CTX_NONE ? "none= " : (val =3D=3D ETM_CTX_CTXID ? "ctxid" : (val =3D=3D ETM_CTX_VMID ? "vmid" : "all"))); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return len; } =20 @@ -1173,7 +1173,7 @@ static ssize_t addr_ctxtype_store(struct device *dev, if (sscanf(buf, "%s", str) !=3D 1) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->addr_idx; if (!strcmp(str, "none")) /* start by clearing context type bits */ @@ -1200,7 +1200,7 @@ static ssize_t addr_ctxtype_store(struct device *dev, if (drvdata->numvmidc) config->addr_acc[idx] |=3D TRCACATRn_CONTEXTTYPE_VMID; } - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(addr_ctxtype); @@ -1214,11 +1214,11 @@ static ssize_t addr_context_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->addr_idx; /* context ID comparator bits[6:4] */ val =3D FIELD_GET(TRCACATRn_CONTEXT_MASK, config->addr_acc[idx]); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1239,12 +1239,12 @@ static ssize_t addr_context_store(struct device *de= v, drvdata->numcidc : drvdata->numvmidc)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->addr_idx; /* clear context ID comparator bits[6:4] */ config->addr_acc[idx] &=3D ~TRCACATRn_CONTEXT_MASK; config->addr_acc[idx] |=3D val << __bf_shf(TRCACATRn_CONTEXT_MASK); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(addr_context); @@ -1258,10 +1258,10 @@ static ssize_t addr_exlevel_s_ns_show(struct device= *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->addr_idx; val =3D FIELD_GET(TRCACATRn_EXLEVEL_MASK, config->addr_acc[idx]); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1280,12 +1280,12 @@ static ssize_t addr_exlevel_s_ns_store(struct devic= e *dev, if (val & ~(TRCACATRn_EXLEVEL_MASK >> __bf_shf(TRCACATRn_EXLEVEL_MASK))) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->addr_idx; /* clear Exlevel_ns & Exlevel_s bits[14:12, 11:8], bit[15] is res0 */ config->addr_acc[idx] &=3D ~TRCACATRn_EXLEVEL_MASK; config->addr_acc[idx] |=3D val << __bf_shf(TRCACATRn_EXLEVEL_MASK); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(addr_exlevel_s_ns); @@ -1308,7 +1308,7 @@ static ssize_t addr_cmp_view_show(struct device *dev, int size =3D 0; bool exclude =3D false; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->addr_idx; addr_v =3D config->addr_val[idx]; addr_ctrl =3D config->addr_acc[idx]; @@ -1323,7 +1323,7 @@ static ssize_t addr_cmp_view_show(struct device *dev, } exclude =3D config->viiectlr & BIT(idx / 2 + 16); } - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); if (addr_type) { size =3D scnprintf(buf, PAGE_SIZE, "addr_cmp[%i] %s %#lx", idx, addr_type_names[addr_type], addr_v); @@ -1367,9 +1367,9 @@ static ssize_t vinst_pe_cmp_start_stop_store(struct d= evice *dev, if (!drvdata->nr_pe_cmp) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); config->vipcssctlr =3D val; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(vinst_pe_cmp_start_stop); @@ -1403,9 +1403,9 @@ static ssize_t seq_idx_store(struct device *dev, * Use spinlock to ensure index doesn't change while it gets * dereferenced multiple times within a spinlock block elsewhere. */ - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); config->seq_idx =3D val; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(seq_idx); @@ -1449,10 +1449,10 @@ static ssize_t seq_event_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->seq_idx; val =3D config->seq_ctrl[idx]; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1468,11 +1468,11 @@ static ssize_t seq_event_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->seq_idx; /* Seq control has two masks B[15:8] F[7:0] */ config->seq_ctrl[idx] =3D val & 0xFFFF; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(seq_event); @@ -1536,9 +1536,9 @@ static ssize_t cntr_idx_store(struct device *dev, * Use spinlock to ensure index doesn't change while it gets * dereferenced multiple times within a spinlock block elsewhere. */ - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); config->cntr_idx =3D val; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(cntr_idx); @@ -1552,10 +1552,10 @@ static ssize_t cntrldvr_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->cntr_idx; val =3D config->cntrldvr[idx]; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1573,10 +1573,10 @@ static ssize_t cntrldvr_store(struct device *dev, if (val > ETM_CNTR_MAX_VAL) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->cntr_idx; config->cntrldvr[idx] =3D val; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(cntrldvr); @@ -1590,10 +1590,10 @@ static ssize_t cntr_val_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->cntr_idx; val =3D config->cntr_val[idx]; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1611,10 +1611,10 @@ static ssize_t cntr_val_store(struct device *dev, if (val > ETM_CNTR_MAX_VAL) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->cntr_idx; config->cntr_val[idx] =3D val; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(cntr_val); @@ -1628,10 +1628,10 @@ static ssize_t cntr_ctrl_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->cntr_idx; val =3D config->cntr_ctrl[idx]; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1647,10 +1647,10 @@ static ssize_t cntr_ctrl_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->cntr_idx; config->cntr_ctrl[idx] =3D val; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(cntr_ctrl); @@ -1688,9 +1688,9 @@ static ssize_t res_idx_store(struct device *dev, * Use spinlock to ensure index doesn't change while it gets * dereferenced multiple times within a spinlock block elsewhere. */ - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); config->res_idx =3D val; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(res_idx); @@ -1704,10 +1704,10 @@ static ssize_t res_ctrl_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->res_idx; val =3D config->res_ctrl[idx]; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1723,7 +1723,7 @@ static ssize_t res_ctrl_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->res_idx; /* For odd idx pair inversal bit is RES0 */ if (idx % 2 !=3D 0) @@ -1733,7 +1733,7 @@ static ssize_t res_ctrl_store(struct device *dev, TRCRSCTLRn_INV | TRCRSCTLRn_GROUP_MASK | TRCRSCTLRn_SELECT_MASK); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(res_ctrl); @@ -1762,9 +1762,9 @@ static ssize_t sshot_idx_store(struct device *dev, if (val >=3D drvdata->nr_ss_cmp) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); config->ss_idx =3D val; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(sshot_idx); @@ -1777,9 +1777,9 @@ static ssize_t sshot_ctrl_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); val =3D config->ss_ctrl[config->ss_idx]; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1795,12 +1795,12 @@ static ssize_t sshot_ctrl_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->ss_idx; config->ss_ctrl[idx] =3D FIELD_PREP(TRCSSCCRn_SAC_ARC_RST_MASK, val); /* must clear bit 31 in related status register on programming */ config->ss_status[idx] &=3D ~TRCSSCSRn_STATUS; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(sshot_ctrl); @@ -1812,9 +1812,9 @@ static ssize_t sshot_status_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); val =3D config->ss_status[config->ss_idx]; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } static DEVICE_ATTR_RO(sshot_status); @@ -1827,9 +1827,9 @@ static ssize_t sshot_pe_ctrl_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); val =3D config->ss_pe_cmp[config->ss_idx]; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1845,12 +1845,12 @@ static ssize_t sshot_pe_ctrl_store(struct device *d= ev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->ss_idx; config->ss_pe_cmp[idx] =3D FIELD_PREP(TRCSSPCICRn_PC_MASK, val); /* must clear bit 31 in related status register on programming */ config->ss_status[idx] &=3D ~TRCSSCSRn_STATUS; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(sshot_pe_ctrl); @@ -1884,9 +1884,9 @@ static ssize_t ctxid_idx_store(struct device *dev, * Use spinlock to ensure index doesn't change while it gets * dereferenced multiple times within a spinlock block elsewhere. */ - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); config->ctxid_idx =3D val; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(ctxid_idx); @@ -1907,10 +1907,10 @@ static ssize_t ctxid_pid_show(struct device *dev, if (task_active_pid_ns(current) !=3D &init_pid_ns) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->ctxid_idx; val =3D (unsigned long)config->ctxid_pid[idx]; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1945,10 +1945,10 @@ static ssize_t ctxid_pid_store(struct device *dev, if (kstrtoul(buf, 16, &pid)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); idx =3D config->ctxid_idx; config->ctxid_pid[idx] =3D (u64)pid; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(ctxid_pid); @@ -1968,10 +1968,10 @@ static ssize_t ctxid_masks_show(struct device *dev, if (task_active_pid_ns(current) !=3D &init_pid_ns) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); val1 =3D config->ctxid_mask0; val2 =3D config->ctxid_mask1; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2); } =20 @@ -2004,7 +2004,7 @@ static ssize_t ctxid_masks_store(struct device *dev, if ((drvdata->numcidc > 4) && (nr_inputs !=3D 2)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); /* * each byte[0..3] controls mask value applied to ctxid * comparator[0..3] @@ -2076,7 +2076,7 @@ static ssize_t ctxid_masks_store(struct device *dev, mask >>=3D 0x8; } =20 - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(ctxid_masks); @@ -2110,9 +2110,9 @@ static ssize_t vmid_idx_store(struct device *dev, * Use spinlock to ensure index doesn't change while it gets * dereferenced multiple times within a spinlock block elsewhere. */ - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); config->vmid_idx =3D val; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(vmid_idx); @@ -2132,9 +2132,9 @@ static ssize_t vmid_val_show(struct device *dev, if (!task_is_in_init_pid_ns(current)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); val =3D (unsigned long)config->vmid_val[config->vmid_idx]; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -2162,9 +2162,9 @@ static ssize_t vmid_val_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); config->vmid_val[config->vmid_idx] =3D (u64)val; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(vmid_val); @@ -2183,10 +2183,10 @@ static ssize_t vmid_masks_show(struct device *dev, if (!task_is_in_init_pid_ns(current)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); val1 =3D config->vmid_mask0; val2 =3D config->vmid_mask1; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2); } =20 @@ -2218,7 +2218,7 @@ static ssize_t vmid_masks_store(struct device *dev, if ((drvdata->numvmidc > 4) && (nr_inputs !=3D 2)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); =20 /* * each byte[0..3] controls mask value applied to vmid @@ -2291,7 +2291,7 @@ static ssize_t vmid_masks_store(struct device *dev, else mask >>=3D 0x8; } - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(vmid_masks); diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtrac= ing/coresight/coresight-etm4x.h index 2b92de17b5a2..bd7db36ba197 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -989,7 +989,7 @@ struct etmv4_drvdata { struct clk *pclk; void __iomem *base; struct coresight_device *csdev; - spinlock_t spinlock; + raw_spinlock_t spinlock; int cpu; u8 arch; u8 nr_pe; --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Wed Dec 17 19:37:34 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4199620ADE9 for ; Thu, 6 Mar 2025 09:48:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741254494; cv=none; b=JGX3EEmLalqCZ9UKHvvqOJEkOijVFc7oyNfjvyFzw9Dane5YhZiEhxiJNauj+8bzcQaJ5qjyFvCseBNDdWN9C+qBik7JkOBjWnxbgsz0FA24718LOvZCuNP6ec8f6Js+3at2dtTFMFFP8Nmw90Io7Cwm2t/FJLKmMjWEE0hyWy4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741254494; c=relaxed/simple; bh=0SjD4y2lb8a1yDuiYxladzJFWaK70WOkGkG9TdoOQU0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=feBhbWPlojF+SWPnZnhUY+EBQaSpQQJxX8yh0gmXxHa18YnA8u+S1HbGIyNYoAwRDEw9FVep/p/wXlkcPM794YzIwIHCvgoZrekWL3Ng32km5bArXXA2KATXe8ue2fkEkKVguyuouffx+WKTI3W6jrrDISEP1YhF6eCvPSXT684= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A065D1AED; Thu, 6 Mar 2025 01:48:23 -0800 (PST) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DD8613F673; Thu, 6 Mar 2025 01:48:08 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, Yeoreum Yun Subject: [PATCH v5 3/9] coresight: change coresight_trace_id_map's lock type to raw_spinlock_t Date: Thu, 6 Mar 2025 09:47:54 +0000 Message-Id: <20250306094800.1082950-4-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250306094800.1082950-1-yeoreum.yun@arm.com> References: <20250306094800.1082950-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" coresight_trace_id_map->lock can be acquired while coresight devices' drvdata_lock. But the drvdata_lock can be raw_spinlock_t (i.e) coresight-etm4x. To address this, change type of coresight_trace_id_map->lock to raw_spinlock_t Signed-off-by: Yeoreum Yun Reviewed-by: James Clark Reviewed-by: Mike Leach --- drivers/hwtracing/coresight/coresight-core.c | 2 +- .../hwtracing/coresight/coresight-trace-id.c | 22 +++++++++---------- include/linux/coresight.h | 2 +- 3 files changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtraci= ng/coresight/coresight-core.c index bd0a7edd38c9..90649837c29e 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -1296,7 +1296,7 @@ struct coresight_device *coresight_register(struct co= resight_desc *desc) =20 if (csdev->type =3D=3D CORESIGHT_DEV_TYPE_SINK || csdev->type =3D=3D CORESIGHT_DEV_TYPE_LINKSINK) { - spin_lock_init(&csdev->perf_sink_id_map.lock); + raw_spin_lock_init(&csdev->perf_sink_id_map.lock); csdev->perf_sink_id_map.cpu_map =3D alloc_percpu(atomic_t); if (!csdev->perf_sink_id_map.cpu_map) { kfree(csdev); diff --git a/drivers/hwtracing/coresight/coresight-trace-id.c b/drivers/hwt= racing/coresight/coresight-trace-id.c index 378af743be45..7ed337d54d3e 100644 --- a/drivers/hwtracing/coresight/coresight-trace-id.c +++ b/drivers/hwtracing/coresight/coresight-trace-id.c @@ -22,7 +22,7 @@ enum trace_id_flags { static DEFINE_PER_CPU(atomic_t, id_map_default_cpu_ids) =3D ATOMIC_INIT(0); static struct coresight_trace_id_map id_map_default =3D { .cpu_map =3D &id_map_default_cpu_ids, - .lock =3D __SPIN_LOCK_UNLOCKED(id_map_default.lock) + .lock =3D __RAW_SPIN_LOCK_UNLOCKED(id_map_default.lock) }; =20 /* #define TRACE_ID_DEBUG 1 */ @@ -131,11 +131,11 @@ static void coresight_trace_id_release_all(struct cor= esight_trace_id_map *id_map unsigned long flags; int cpu; =20 - spin_lock_irqsave(&id_map->lock, flags); + raw_spin_lock_irqsave(&id_map->lock, flags); bitmap_zero(id_map->used_ids, CORESIGHT_TRACE_IDS_MAX); for_each_possible_cpu(cpu) atomic_set(per_cpu_ptr(id_map->cpu_map, cpu), 0); - spin_unlock_irqrestore(&id_map->lock, flags); + raw_spin_unlock_irqrestore(&id_map->lock, flags); DUMP_ID_MAP(id_map); } =20 @@ -144,7 +144,7 @@ static int _coresight_trace_id_get_cpu_id(int cpu, stru= ct coresight_trace_id_map unsigned long flags; int id; =20 - spin_lock_irqsave(&id_map->lock, flags); + raw_spin_lock_irqsave(&id_map->lock, flags); =20 /* check for existing allocation for this CPU */ id =3D _coresight_trace_id_read_cpu_id(cpu, id_map); @@ -171,7 +171,7 @@ static int _coresight_trace_id_get_cpu_id(int cpu, stru= ct coresight_trace_id_map atomic_set(per_cpu_ptr(id_map->cpu_map, cpu), id); =20 get_cpu_id_out_unlock: - spin_unlock_irqrestore(&id_map->lock, flags); + raw_spin_unlock_irqrestore(&id_map->lock, flags); =20 DUMP_ID_CPU(cpu, id); DUMP_ID_MAP(id_map); @@ -188,12 +188,12 @@ static void _coresight_trace_id_put_cpu_id(int cpu, s= truct coresight_trace_id_ma if (!id) return; =20 - spin_lock_irqsave(&id_map->lock, flags); + raw_spin_lock_irqsave(&id_map->lock, flags); =20 coresight_trace_id_free(id, id_map); atomic_set(per_cpu_ptr(id_map->cpu_map, cpu), 0); =20 - spin_unlock_irqrestore(&id_map->lock, flags); + raw_spin_unlock_irqrestore(&id_map->lock, flags); DUMP_ID_CPU(cpu, id); DUMP_ID_MAP(id_map); } @@ -204,9 +204,9 @@ static int coresight_trace_id_map_get_system_id(struct = coresight_trace_id_map *i unsigned long flags; int id; =20 - spin_lock_irqsave(&id_map->lock, flags); + raw_spin_lock_irqsave(&id_map->lock, flags); id =3D coresight_trace_id_alloc_new_id(id_map, preferred_id, traceid_flag= s); - spin_unlock_irqrestore(&id_map->lock, flags); + raw_spin_unlock_irqrestore(&id_map->lock, flags); =20 DUMP_ID(id); DUMP_ID_MAP(id_map); @@ -217,9 +217,9 @@ static void coresight_trace_id_map_put_system_id(struct= coresight_trace_id_map * { unsigned long flags; =20 - spin_lock_irqsave(&id_map->lock, flags); + raw_spin_lock_irqsave(&id_map->lock, flags); coresight_trace_id_free(id, id_map); - spin_unlock_irqrestore(&id_map->lock, flags); + raw_spin_unlock_irqrestore(&id_map->lock, flags); =20 DUMP_ID(id); DUMP_ID_MAP(id_map); diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 4541bfc1cc6b..d79a242b271d 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -239,7 +239,7 @@ struct coresight_trace_id_map { DECLARE_BITMAP(used_ids, CORESIGHT_TRACE_IDS_MAX); atomic_t __percpu *cpu_map; atomic_t perf_cs_etm_session_active; - spinlock_t lock; + raw_spinlock_t lock; }; =20 /** --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Wed Dec 17 19:37:34 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1E55220B1EC for ; Thu, 6 Mar 2025 09:48:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741254495; cv=none; b=MTakCf26FKPXC8srMOJ1q4IXDEz8noTSQhNMKeCrH04w9N8+ZkMXr0LKX1nKJ7kyovnNCo8zQSSavLJ5Jr3uQk1ipIKEvcFSrhrQXyETiFFiEI+XfcrqUpmwK403wla129BA8GP7NN2C35fWqMJH+H73Gac4L5v91dYGVhrquYU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741254495; c=relaxed/simple; bh=9fhJnJK2CZHBs+4MOq6R7obFm4Cl3cYiUtrlVQnsg3U=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=qLCXQpSLc7dJRyTd2AvTaK2whS9lkTIqdPTVUJgN0astsmfP7I6jZSQyMf6scnHuBYdKq2BusciEvxLppmb2To0LB3hw7Qob80znVhjpjB3mA7T0d3PZIXu7R1L8JrWs8aaexyw23m2xrtVxvApDrW8NQBrPdgMuwbxmhx1yKlA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B03D7FEC; Thu, 6 Mar 2025 01:48:25 -0800 (PST) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E33FE3F673; Thu, 6 Mar 2025 01:48:10 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, Yeoreum Yun Subject: [PATCH v5 4/9] coresight-cti: change cti_drvdata spinlock's type to raw_spinlock_t Date: Thu, 6 Mar 2025 09:47:55 +0000 Message-Id: <20250306094800.1082950-5-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250306094800.1082950-1-yeoreum.yun@arm.com> References: <20250306094800.1082950-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In coresight-cti drivers, cti_drvdata->spinlock can be held during __schedu= le() by perf_event_task_sched_out()/in(). Since cti_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type cti_drvdata->spinlock in coresight-cti drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Reviewed-by: James Clark Reviewed-by: Mike Leach Signed-off-by: Yeoreum Yun --- .../hwtracing/coresight/coresight-cti-core.c | 44 +++++------ .../hwtracing/coresight/coresight-cti-sysfs.c | 76 +++++++++---------- drivers/hwtracing/coresight/coresight-cti.h | 2 +- 3 files changed, 61 insertions(+), 61 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-cti-core.c b/drivers/hwt= racing/coresight/coresight-cti-core.c index d2b5a5718c29..80f6265e3740 100644 --- a/drivers/hwtracing/coresight/coresight-cti-core.c +++ b/drivers/hwtracing/coresight/coresight-cti-core.c @@ -93,7 +93,7 @@ static int cti_enable_hw(struct cti_drvdata *drvdata) unsigned long flags; int rc =3D 0; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 /* no need to do anything if enabled or unpowered*/ if (config->hw_enabled || !config->hw_powered) @@ -108,7 +108,7 @@ static int cti_enable_hw(struct cti_drvdata *drvdata) =20 config->hw_enabled =3D true; drvdata->config.enable_req_count++; - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return rc; =20 cti_state_unchanged: @@ -116,7 +116,7 @@ static int cti_enable_hw(struct cti_drvdata *drvdata) =20 /* cannot enable due to error */ cti_err_not_enabled: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return rc; } =20 @@ -125,7 +125,7 @@ static void cti_cpuhp_enable_hw(struct cti_drvdata *drv= data) { struct cti_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); config->hw_powered =3D true; =20 /* no need to do anything if no enable request */ @@ -138,12 +138,12 @@ static void cti_cpuhp_enable_hw(struct cti_drvdata *d= rvdata) =20 cti_write_all_hw_regs(drvdata); config->hw_enabled =3D true; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return; =20 /* did not re-enable due to no claim / no request */ cti_hp_not_enabled: - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); } =20 /* disable hardware */ @@ -153,7 +153,7 @@ static int cti_disable_hw(struct cti_drvdata *drvdata) struct coresight_device *csdev =3D drvdata->csdev; int ret =3D 0; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); =20 /* don't allow negative refcounts, return an error */ if (!drvdata->config.enable_req_count) { @@ -177,12 +177,12 @@ static int cti_disable_hw(struct cti_drvdata *drvdata) =20 coresight_disclaim_device_unlocked(csdev); CS_LOCK(drvdata->base); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return ret; =20 /* not disabled this call */ cti_not_disabled: - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return ret; } =20 @@ -198,11 +198,11 @@ void cti_write_intack(struct device *dev, u32 ackval) struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct cti_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); /* write if enabled */ if (cti_active(config)) cti_write_single_reg(drvdata, CTIINTACK, ackval); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); } =20 /* @@ -369,7 +369,7 @@ int cti_channel_trig_op(struct device *dev, enum cti_ch= an_op op, reg_offset =3D (direction =3D=3D CTI_TRIG_IN ? CTIINEN(trigger_idx) : CTIOUTEN(trigger_idx)); =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); =20 /* read - modify write - the trigger / channel enable value */ reg_value =3D direction =3D=3D CTI_TRIG_IN ? config->ctiinen[trigger_idx]= : @@ -388,7 +388,7 @@ int cti_channel_trig_op(struct device *dev, enum cti_ch= an_op op, /* write through if enabled */ if (cti_active(config)) cti_write_single_reg(drvdata, reg_offset, reg_value); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return 0; } =20 @@ -406,7 +406,7 @@ int cti_channel_gate_op(struct device *dev, enum cti_ch= an_gate_op op, =20 chan_bitmask =3D BIT(channel_idx); =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); reg_value =3D config->ctigate; switch (op) { case CTI_GATE_CHAN_ENABLE: @@ -426,7 +426,7 @@ int cti_channel_gate_op(struct device *dev, enum cti_ch= an_gate_op op, if (cti_active(config)) cti_write_single_reg(drvdata, CTIGATE, reg_value); } - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return err; } =20 @@ -445,7 +445,7 @@ int cti_channel_setop(struct device *dev, enum cti_chan= _set_op op, =20 chan_bitmask =3D BIT(channel_idx); =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); reg_value =3D config->ctiappset; switch (op) { case CTI_CHAN_SET: @@ -473,7 +473,7 @@ int cti_channel_setop(struct device *dev, enum cti_chan= _set_op op, =20 if ((err =3D=3D 0) && cti_active(config)) cti_write_single_reg(drvdata, reg_offset, reg_value); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); =20 return err; } @@ -676,7 +676,7 @@ static int cti_cpu_pm_notify(struct notifier_block *nb,= unsigned long cmd, if (WARN_ON_ONCE(drvdata->ctidev.cpu !=3D cpu)) return NOTIFY_BAD; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); =20 switch (cmd) { case CPU_PM_ENTER: @@ -716,7 +716,7 @@ static int cti_cpu_pm_notify(struct notifier_block *nb,= unsigned long cmd, } =20 cti_notify_exit: - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return notify_res; } =20 @@ -743,11 +743,11 @@ static int cti_dying_cpu(unsigned int cpu) if (!drvdata) return 0; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); drvdata->config.hw_powered =3D false; if (drvdata->config.hw_enabled) coresight_disclaim_device(drvdata->csdev); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return 0; } =20 @@ -888,7 +888,7 @@ static int cti_probe(struct amba_device *adev, const st= ruct amba_id *id) drvdata->ctidev.ctm_id =3D 0; INIT_LIST_HEAD(&drvdata->ctidev.trig_cons); =20 - spin_lock_init(&drvdata->spinlock); + raw_spin_lock_init(&drvdata->spinlock); =20 /* initialise CTI driver config values */ cti_set_default_config(dev, drvdata); diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hw= tracing/coresight/coresight-cti-sysfs.c index d25dd2737b49..572b80ee96fb 100644 --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c @@ -84,11 +84,11 @@ static ssize_t enable_show(struct device *dev, bool enabled, powered; struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); enable_req =3D drvdata->config.enable_req_count; powered =3D drvdata->config.hw_powered; enabled =3D drvdata->config.hw_enabled; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); =20 if (powered) return sprintf(buf, "%d\n", enabled); @@ -134,9 +134,9 @@ static ssize_t powered_show(struct device *dev, bool powered; struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); powered =3D drvdata->config.hw_powered; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); =20 return sprintf(buf, "%d\n", powered); } @@ -181,10 +181,10 @@ static ssize_t coresight_cti_reg_show(struct device *= dev, u32 val =3D 0; =20 pm_runtime_get_sync(dev->parent); - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); if (drvdata->config.hw_powered) val =3D readl_relaxed(drvdata->base + cti_attr->off); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); pm_runtime_put_sync(dev->parent); return sysfs_emit(buf, "0x%x\n", val); } @@ -202,10 +202,10 @@ static __maybe_unused ssize_t coresight_cti_reg_store= (struct device *dev, return -EINVAL; =20 pm_runtime_get_sync(dev->parent); - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); if (drvdata->config.hw_powered) cti_write_single_reg(drvdata, cti_attr->off, val); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); pm_runtime_put_sync(dev->parent); return size; } @@ -264,7 +264,7 @@ static ssize_t cti_reg32_show(struct device *dev, char = *buf, struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct cti_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); if ((reg_offset >=3D 0) && cti_active(config)) { CS_UNLOCK(drvdata->base); val =3D readl_relaxed(drvdata->base + reg_offset); @@ -274,7 +274,7 @@ static ssize_t cti_reg32_show(struct device *dev, char = *buf, } else if (pcached_val) { val =3D *pcached_val; } - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return sprintf(buf, "%#x\n", val); } =20 @@ -293,7 +293,7 @@ static ssize_t cti_reg32_store(struct device *dev, cons= t char *buf, if (kstrtoul(buf, 0, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); /* local store */ if (pcached_val) *pcached_val =3D (u32)val; @@ -301,7 +301,7 @@ static ssize_t cti_reg32_store(struct device *dev, cons= t char *buf, /* write through if offset and enabled */ if ((reg_offset >=3D 0) && cti_active(config)) cti_write_single_reg(drvdata, reg_offset, val); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } =20 @@ -349,9 +349,9 @@ static ssize_t inout_sel_store(struct device *dev, if (val > (CTIINOUTEN_MAX - 1)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); drvdata->config.ctiinout_sel =3D val; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(inout_sel); @@ -364,10 +364,10 @@ static ssize_t inen_show(struct device *dev, int index; struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); index =3D drvdata->config.ctiinout_sel; val =3D drvdata->config.ctiinen[index]; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return sprintf(buf, "%#lx\n", val); } =20 @@ -383,14 +383,14 @@ static ssize_t inen_store(struct device *dev, if (kstrtoul(buf, 0, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); index =3D config->ctiinout_sel; config->ctiinen[index] =3D val; =20 /* write through if enabled */ if (cti_active(config)) cti_write_single_reg(drvdata, CTIINEN(index), val); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(inen); @@ -403,10 +403,10 @@ static ssize_t outen_show(struct device *dev, int index; struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); index =3D drvdata->config.ctiinout_sel; val =3D drvdata->config.ctiouten[index]; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return sprintf(buf, "%#lx\n", val); } =20 @@ -422,14 +422,14 @@ static ssize_t outen_store(struct device *dev, if (kstrtoul(buf, 0, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); index =3D config->ctiinout_sel; config->ctiouten[index] =3D val; =20 /* write through if enabled */ if (cti_active(config)) cti_write_single_reg(drvdata, CTIOUTEN(index), val); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(outen); @@ -463,7 +463,7 @@ static ssize_t appclear_store(struct device *dev, if (kstrtoul(buf, 0, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); =20 /* a 1'b1 in appclr clears down the same bit in appset*/ config->ctiappset &=3D ~val; @@ -471,7 +471,7 @@ static ssize_t appclear_store(struct device *dev, /* write through if enabled */ if (cti_active(config)) cti_write_single_reg(drvdata, CTIAPPCLEAR, val); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_WO(appclear); @@ -487,12 +487,12 @@ static ssize_t apppulse_store(struct device *dev, if (kstrtoul(buf, 0, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); =20 /* write through if enabled */ if (cti_active(config)) cti_write_single_reg(drvdata, CTIAPPPULSE, val); - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_WO(apppulse); @@ -681,9 +681,9 @@ static ssize_t trig_filter_enable_show(struct device *d= ev, u32 val; struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); val =3D drvdata->config.trig_filter_enable; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return sprintf(buf, "%d\n", val); } =20 @@ -697,9 +697,9 @@ static ssize_t trig_filter_enable_store(struct device *= dev, if (kstrtoul(buf, 0, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); drvdata->config.trig_filter_enable =3D !!val; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(trig_filter_enable); @@ -728,7 +728,7 @@ static ssize_t chan_xtrigs_reset_store(struct device *d= ev, struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct cti_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); =20 /* clear the CTI trigger / channel programming registers */ for (i =3D 0; i < config->nr_trig_max; i++) { @@ -747,7 +747,7 @@ static ssize_t chan_xtrigs_reset_store(struct device *d= ev, if (cti_active(config)) cti_write_all_hw_regs(drvdata); =20 - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_WO(chan_xtrigs_reset); @@ -768,9 +768,9 @@ static ssize_t chan_xtrigs_sel_store(struct device *dev, if (val > (drvdata->config.nr_ctm_channels - 1)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); drvdata->config.xtrig_rchan_sel =3D val; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); return size; } =20 @@ -781,9 +781,9 @@ static ssize_t chan_xtrigs_sel_show(struct device *dev, unsigned long val; struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); =20 - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); val =3D drvdata->config.xtrig_rchan_sel; - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); =20 return sprintf(buf, "%ld\n", val); } @@ -838,12 +838,12 @@ static ssize_t print_chan_list(struct device *dev, unsigned long inuse_bits =3D 0, chan_mask; =20 /* scan regs to get bitmap of channels in use. */ - spin_lock(&drvdata->spinlock); + raw_spin_lock(&drvdata->spinlock); for (i =3D 0; i < config->nr_trig_max; i++) { inuse_bits |=3D config->ctiinen[i]; inuse_bits |=3D config->ctiouten[i]; } - spin_unlock(&drvdata->spinlock); + raw_spin_unlock(&drvdata->spinlock); =20 /* inverse bits if printing free channels */ if (!inuse) diff --git a/drivers/hwtracing/coresight/coresight-cti.h b/drivers/hwtracin= g/coresight/coresight-cti.h index cb9ee616d01f..16e310e7e9d4 100644 --- a/drivers/hwtracing/coresight/coresight-cti.h +++ b/drivers/hwtracing/coresight/coresight-cti.h @@ -175,7 +175,7 @@ struct cti_drvdata { void __iomem *base; struct coresight_device *csdev; struct cti_device ctidev; - spinlock_t spinlock; + raw_spinlock_t spinlock; struct cti_config config; struct list_head node; void (*csdev_release)(struct device *dev); --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Wed Dec 17 19:37:34 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 63E2820B800 for ; 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dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AB5781007; Thu, 6 Mar 2025 01:48:27 -0800 (PST) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E879A3F673; Thu, 6 Mar 2025 01:48:12 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, Yeoreum Yun Subject: [PATCH v5 5/9] coresight-etb10: change etb_drvdata spinlock's type to raw_spinlock_t Date: Thu, 6 Mar 2025 09:47:56 +0000 Message-Id: <20250306094800.1082950-6-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250306094800.1082950-1-yeoreum.yun@arm.com> References: <20250306094800.1082950-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In coresight-etb10 drivers, etb_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since etb_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type etb_drvdata->spinlock in coresight-etb10 drive= rs, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Reviewed-by: James Clark Reviewed-by: Mike Leach Signed-off-by: Yeoreum Yun --- drivers/hwtracing/coresight/coresight-etb10.c | 26 +++++++++---------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtrac= ing/coresight/coresight-etb10.c index aea9ac9c4bd0..7948597d483d 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -84,7 +84,7 @@ struct etb_drvdata { struct clk *atclk; struct coresight_device *csdev; struct miscdevice miscdev; - spinlock_t spinlock; + raw_spinlock_t spinlock; local_t reading; pid_t pid; u8 *buf; @@ -145,7 +145,7 @@ static int etb_enable_sysfs(struct coresight_device *cs= dev) unsigned long flags; struct etb_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 /* Don't messup with perf sessions. */ if (coresight_get_mode(csdev) =3D=3D CS_MODE_PERF) { @@ -163,7 +163,7 @@ static int etb_enable_sysfs(struct coresight_device *cs= dev) =20 csdev->refcnt++; out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return ret; } =20 @@ -176,7 +176,7 @@ static int etb_enable_perf(struct coresight_device *csd= ev, void *data) struct perf_output_handle *handle =3D data; struct cs_buffers *buf =3D etm_perf_sink_config(handle); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 /* No need to continue if the component is already in used by sysFS. */ if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_SYSFS) { @@ -219,7 +219,7 @@ static int etb_enable_perf(struct coresight_device *csd= ev, void *data) } =20 out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return ret; } =20 @@ -352,11 +352,11 @@ static int etb_disable(struct coresight_device *csdev) struct etb_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); unsigned long flags; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 csdev->refcnt--; if (csdev->refcnt) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return -EBUSY; } =20 @@ -366,7 +366,7 @@ static int etb_disable(struct coresight_device *csdev) /* Dissociate from monitored process. */ drvdata->pid =3D -1; coresight_set_mode(csdev, CS_MODE_DISABLED); - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 dev_dbg(&csdev->dev, "ETB disabled\n"); return 0; @@ -443,7 +443,7 @@ static unsigned long etb_update_buffer(struct coresight= _device *csdev, =20 capacity =3D drvdata->buffer_depth * ETB_FRAME_SIZE_WORDS; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 /* Don't do anything if another tracer is using this sink */ if (csdev->refcnt !=3D 1) @@ -566,7 +566,7 @@ static unsigned long etb_update_buffer(struct coresight= _device *csdev, __etb_enable_hw(drvdata); CS_LOCK(drvdata->base); out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 return to_read; } @@ -587,13 +587,13 @@ static void etb_dump(struct etb_drvdata *drvdata) { unsigned long flags; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_SYSFS) { __etb_disable_hw(drvdata); etb_dump_hw(drvdata); __etb_enable_hw(drvdata); } - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 dev_dbg(&drvdata->csdev->dev, "ETB dumped\n"); } @@ -746,7 +746,7 @@ static int etb_probe(struct amba_device *adev, const st= ruct amba_id *id) drvdata->base =3D base; desc.access =3D CSDEV_ACCESS_IOMEM(base); =20 - spin_lock_init(&drvdata->spinlock); + raw_spin_lock_init(&drvdata->spinlock); =20 drvdata->buffer_depth =3D etb_get_buffer_depth(drvdata); =20 --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Wed Dec 17 19:37:34 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id D9D2120B80A for ; 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dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B0D00FEC; Thu, 6 Mar 2025 01:48:29 -0800 (PST) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id ED2C53F673; Thu, 6 Mar 2025 01:48:14 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, Yeoreum Yun Subject: [PATCH v5 6/9] coresight-funnel: change funnel_drvdata spinlock's type to raw_spinlock_t Date: Thu, 6 Mar 2025 09:47:57 +0000 Message-Id: <20250306094800.1082950-7-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250306094800.1082950-1-yeoreum.yun@arm.com> References: <20250306094800.1082950-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In coresight-funnel drivers, cti_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since funnel_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type funnel_drvdata->spinlock in coresight-funnel drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Signed-off-by: Yeoreum Yun Reviewed-by: James Clark Reviewed-by: Mike Leach --- drivers/hwtracing/coresight/coresight-funnel.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtra= cing/coresight/coresight-funnel.c index 8faf51469bb8..0541712b2bcb 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -47,7 +47,7 @@ struct funnel_drvdata { struct clk *pclk; struct coresight_device *csdev; unsigned long priority; - spinlock_t spinlock; + raw_spinlock_t spinlock; }; =20 static int dynamic_funnel_enable_hw(struct funnel_drvdata *drvdata, int po= rt) @@ -85,7 +85,7 @@ static int funnel_enable(struct coresight_device *csdev, unsigned long flags; bool first_enable =3D false; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); if (in->dest_refcnt =3D=3D 0) { if (drvdata->base) rc =3D dynamic_funnel_enable_hw(drvdata, in->dest_port); @@ -94,7 +94,7 @@ static int funnel_enable(struct coresight_device *csdev, } if (!rc) in->dest_refcnt++; - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 if (first_enable) dev_dbg(&csdev->dev, "FUNNEL inport %d enabled\n", @@ -129,13 +129,13 @@ static void funnel_disable(struct coresight_device *c= sdev, unsigned long flags; bool last_disable =3D false; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); if (--in->dest_refcnt =3D=3D 0) { if (drvdata->base) dynamic_funnel_disable_hw(drvdata, in->dest_port); last_disable =3D true; } - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 if (last_disable) dev_dbg(&csdev->dev, "FUNNEL inport %d disabled\n", @@ -266,7 +266,7 @@ static int funnel_probe(struct device *dev, struct reso= urce *res) } dev->platform_data =3D pdata; =20 - spin_lock_init(&drvdata->spinlock); + raw_spin_lock_init(&drvdata->spinlock); desc.type =3D CORESIGHT_DEV_TYPE_LINK; desc.subtype.link_subtype =3D CORESIGHT_DEV_SUBTYPE_LINK_MERG; desc.ops =3D &funnel_cs_ops; --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Wed Dec 17 19:37:34 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5472920C470 for ; Thu, 6 Mar 2025 09:48:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741254501; cv=none; b=mO31pHHRqFbzZLru/DWJRI6pxx5h5bcWlMh32u19g+8vdmBxbFrTzkw4lQYYYukWDLw6p6vW/jWC0hzcXOzgP+lKo6c5/HvJ4tFLB6O8aM33ndLtJ0DHZEYh2k8lsBLYX2mfKow9qhIc3oTi84SMWATcE1tHPOAaQd/BvM6aJrU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741254501; c=relaxed/simple; bh=qkd1t71drJ6W7pHT5e59hqeyQYJUG9fWKod/5k7xJ5E=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=bBFA/TlrzSDVKTqA8zmd56heN4c+LP9RVR1u61HPcUFnKiJ/Ke+qaaWi1D3mSwoMFGOuCcBakOyGQWkUge7CWdS+8sRa25+b1f6Qp8OpZVcHG2NO2d/Hr9E1fJ7DE4U6vc1sUi9o4/pPPq14sML6fHikRqlR6BsiukEcYKW7nUw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B589B1007; Thu, 6 Mar 2025 01:48:31 -0800 (PST) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id F2AD33F673; Thu, 6 Mar 2025 01:48:16 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, Yeoreum Yun Subject: [PATCH v5 7/9] coresight-replicator: change replicator_drvdata spinlock's type to raw_spinlock_t Date: Thu, 6 Mar 2025 09:47:58 +0000 Message-Id: <20250306094800.1082950-8-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250306094800.1082950-1-yeoreum.yun@arm.com> References: <20250306094800.1082950-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In coresight-replicator drivers, replicator_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since replicator_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type replicator_drvdata->spinlock in coresight-replicator drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Reviewed-by: James Clark Reviewed-by: Mike Leach Signed-off-by: Yeoreum Yun --- drivers/hwtracing/coresight/coresight-replicator.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/h= wtracing/coresight/coresight-replicator.c index a1181c9048c0..ee7ee79f6cf7 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -41,7 +41,7 @@ struct replicator_drvdata { struct clk *atclk; struct clk *pclk; struct coresight_device *csdev; - spinlock_t spinlock; + raw_spinlock_t spinlock; bool check_idfilter_val; }; =20 @@ -125,7 +125,7 @@ static int replicator_enable(struct coresight_device *c= sdev, unsigned long flags; bool first_enable =3D false; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); if (out->src_refcnt =3D=3D 0) { if (drvdata->base) rc =3D dynamic_replicator_enable(drvdata, in->dest_port, @@ -135,7 +135,7 @@ static int replicator_enable(struct coresight_device *c= sdev, } if (!rc) out->src_refcnt++; - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 if (first_enable) dev_dbg(&csdev->dev, "REPLICATOR enabled\n"); @@ -179,14 +179,14 @@ static void replicator_disable(struct coresight_devic= e *csdev, unsigned long flags; bool last_disable =3D false; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); if (--out->src_refcnt =3D=3D 0) { if (drvdata->base) dynamic_replicator_disable(drvdata, in->dest_port, out->src_port); last_disable =3D true; } - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 if (last_disable) dev_dbg(&csdev->dev, "REPLICATOR disabled\n"); @@ -277,7 +277,7 @@ static int replicator_probe(struct device *dev, struct = resource *res) } dev->platform_data =3D pdata; =20 - spin_lock_init(&drvdata->spinlock); + raw_spin_lock_init(&drvdata->spinlock); desc.type =3D CORESIGHT_DEV_TYPE_LINK; desc.subtype.link_subtype =3D CORESIGHT_DEV_SUBTYPE_LINK_SPLIT; desc.ops =3D &replicator_cs_ops; --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Wed Dec 17 19:37:34 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 270B220B800 for ; Thu, 6 Mar 2025 09:48:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741254503; cv=none; b=eClm3HtVhRtbOQG5w3rMLArHl2sMOkYfThLeC8BOSfvdqT7aBWk5W2bL4f2EZKNqeSB1TTgGERUlWy3R1EIxw3+DpFYkDYJKNqIH692Pb1NLRQtS+j5YHrM88mLTR7HWnHuzirFTMnRbojOFvHIZ/MB7bSUYu7SJizU8WDealCM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741254503; c=relaxed/simple; bh=//gvwVma+oPF1bOphMNrpTrFJBnmM+5Cg5OM2SAc2x4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=LUnOu/hS1t2ztRnxahGkgerq2251aY3IQey6UGmD3hZFgrjC6QnSdY6OSFmh6SbajxU+yN2+oNoD8nGySBpgkYJEHR68LNvV235bWbnLpvnqaLnkVVSzWbti17HxD1T4Z8d21dzmZTT3WqFQuf/EqyEk75pghgENrjLk90E8i9Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CC3C4FEC; Thu, 6 Mar 2025 01:48:33 -0800 (PST) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0408D3F673; Thu, 6 Mar 2025 01:48:18 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, Yeoreum Yun Subject: [PATCH v5 8/9] coresight-tmc: change tmc_drvdata spinlock's type to raw_spinlock_t Date: Thu, 6 Mar 2025 09:47:59 +0000 Message-Id: <20250306094800.1082950-9-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250306094800.1082950-1-yeoreum.yun@arm.com> References: <20250306094800.1082950-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In coresight-tmc drivers, tmc_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since tmc_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type tmc_drvdata->spinlock in coresight-tmc drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Reviewed-by: James Clark Reviewed-by: Mike Leach Signed-off-by: Yeoreum Yun --- .../hwtracing/coresight/coresight-tmc-core.c | 6 +-- .../hwtracing/coresight/coresight-tmc-etf.c | 48 +++++++++---------- .../hwtracing/coresight/coresight-tmc-etr.c | 40 ++++++++-------- drivers/hwtracing/coresight/coresight-tmc.h | 2 +- 4 files changed, 48 insertions(+), 48 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwt= racing/coresight/coresight-tmc-core.c index d5122e12daa7..829d104fdaca 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -801,7 +801,7 @@ static int __tmc_probe(struct device *dev, struct resou= rce *res) drvdata->base =3D base; desc.access =3D CSDEV_ACCESS_IOMEM(base); =20 - spin_lock_init(&drvdata->spinlock); + raw_spin_lock_init(&drvdata->spinlock); =20 devid =3D readl_relaxed(drvdata->base + CORESIGHT_DEVID); drvdata->config_type =3D BMVAL(devid, 6, 7); @@ -913,7 +913,7 @@ static void tmc_shutdown(struct amba_device *adev) unsigned long flags; struct tmc_drvdata *drvdata =3D amba_get_drvdata(adev); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_DISABLED) goto out; @@ -927,7 +927,7 @@ static void tmc_shutdown(struct amba_device *adev) * the system is going down after this. */ out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); } =20 static void __tmc_remove(struct device *dev) diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtr= acing/coresight/coresight-tmc-etf.c index bdc3a7e9ba06..d858740001c2 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -185,9 +185,9 @@ static int tmc_enable_etf_sink_sysfs(struct coresight_d= evice *csdev) * If we don't have a buffer release the lock and allocate memory. * Otherwise keep the lock and move along. */ - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); if (!drvdata->buf) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 /* Allocating the memory here while outside of the spinlock */ buf =3D kzalloc(drvdata->size, GFP_KERNEL); @@ -195,7 +195,7 @@ static int tmc_enable_etf_sink_sysfs(struct coresight_d= evice *csdev) return -ENOMEM; =20 /* Let's try again */ - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); } =20 if (drvdata->reading) { @@ -237,7 +237,7 @@ static int tmc_enable_etf_sink_sysfs(struct coresight_d= evice *csdev) used =3D false; } out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 /* Free memory outside the spinlock if need be */ if (!used) @@ -255,7 +255,7 @@ static int tmc_enable_etf_sink_perf(struct coresight_de= vice *csdev, void *data) struct perf_output_handle *handle =3D data; struct cs_buffers *buf =3D etm_perf_sink_config(handle); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); do { ret =3D -EINVAL; if (drvdata->reading) @@ -298,7 +298,7 @@ static int tmc_enable_etf_sink_perf(struct coresight_de= vice *csdev, void *data) csdev->refcnt++; } } while (0); - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 return ret; } @@ -333,16 +333,16 @@ static int tmc_disable_etf_sink(struct coresight_devi= ce *csdev) unsigned long flags; struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 if (drvdata->reading) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return -EBUSY; } =20 csdev->refcnt--; if (csdev->refcnt) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return -EBUSY; } =20 @@ -353,7 +353,7 @@ static int tmc_disable_etf_sink(struct coresight_device= *csdev) drvdata->pid =3D -1; coresight_set_mode(csdev, CS_MODE_DISABLED); =20 - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 dev_dbg(&csdev->dev, "TMC-ETB/ETF disabled\n"); return 0; @@ -368,9 +368,9 @@ static int tmc_enable_etf_link(struct coresight_device = *csdev, struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); bool first_enable =3D false; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); if (drvdata->reading) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return -EBUSY; } =20 @@ -383,7 +383,7 @@ static int tmc_enable_etf_link(struct coresight_device = *csdev, } if (!ret) csdev->refcnt++; - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 if (first_enable) dev_dbg(&csdev->dev, "TMC-ETF enabled\n"); @@ -398,9 +398,9 @@ static void tmc_disable_etf_link(struct coresight_devic= e *csdev, struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); bool last_disable =3D false; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); if (drvdata->reading) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return; } =20 @@ -410,7 +410,7 @@ static void tmc_disable_etf_link(struct coresight_devic= e *csdev, coresight_set_mode(csdev, CS_MODE_DISABLED); last_disable =3D true; } - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 if (last_disable) dev_dbg(&csdev->dev, "TMC-ETF disabled\n"); @@ -490,7 +490,7 @@ static unsigned long tmc_update_etf_buffer(struct cores= ight_device *csdev, if (WARN_ON_ONCE(coresight_get_mode(csdev) !=3D CS_MODE_PERF)) return 0; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 /* Don't do anything if another tracer is using this sink */ if (csdev->refcnt !=3D 1) @@ -587,7 +587,7 @@ static unsigned long tmc_update_etf_buffer(struct cores= ight_device *csdev, */ CS_LOCK(drvdata->base); out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 return to_read; } @@ -705,7 +705,7 @@ int tmc_read_prepare_etb(struct tmc_drvdata *drvdata) drvdata->config_type !=3D TMC_CONFIG_TYPE_ETF)) return -EINVAL; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 if (drvdata->reading) { ret =3D -EBUSY; @@ -737,7 +737,7 @@ int tmc_read_prepare_etb(struct tmc_drvdata *drvdata) =20 drvdata->reading =3D true; out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 return ret; } @@ -754,14 +754,14 @@ int tmc_read_unprepare_etb(struct tmc_drvdata *drvdat= a) drvdata->config_type !=3D TMC_CONFIG_TYPE_ETF)) return -EINVAL; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 /* Re-enable the TMC if need be */ if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_SYSFS) { /* There is no point in reading a TMC in HW FIFO mode */ mode =3D readl_relaxed(drvdata->base + TMC_MODE); if (mode !=3D TMC_MODE_CIRCULAR_BUFFER) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return -EINVAL; } /* @@ -775,7 +775,7 @@ int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata) memset(drvdata->buf, 0, drvdata->size); rc =3D __tmc_etb_enable_hw(drvdata); if (rc) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return rc; } } else { @@ -788,7 +788,7 @@ int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata) } =20 drvdata->reading =3D false; - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 /* * Free allocated memory outside of the spinlock. There is no need diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtr= acing/coresight/coresight-tmc-etr.c index eda7cdad0e2b..e501bd5ac6e9 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1251,10 +1251,10 @@ static struct etr_buf *tmc_etr_get_sysfs_buffer(str= uct coresight_device *csdev) * buffer, provided the size matches. Any allocation has to be done * with the lock released. */ - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); sysfs_buf =3D READ_ONCE(drvdata->sysfs_buf); if (!sysfs_buf || (sysfs_buf->size !=3D drvdata->size)) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 /* Allocate memory with the locks released */ free_buf =3D new_buf =3D tmc_etr_setup_sysfs_buf(drvdata); @@ -1262,7 +1262,7 @@ static struct etr_buf *tmc_etr_get_sysfs_buffer(struc= t coresight_device *csdev) return new_buf; =20 /* Let's try again */ - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); } =20 if (drvdata->reading || coresight_get_mode(csdev) =3D=3D CS_MODE_PERF) { @@ -1281,7 +1281,7 @@ static struct etr_buf *tmc_etr_get_sysfs_buffer(struc= t coresight_device *csdev) } =20 out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 /* Free memory outside the spinlock if need be */ if (free_buf) @@ -1299,7 +1299,7 @@ static int tmc_enable_etr_sink_sysfs(struct coresight= _device *csdev) if (IS_ERR(sysfs_buf)) return PTR_ERR(sysfs_buf); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 /* * In sysFS mode we can have multiple writers per sink. Since this @@ -1318,7 +1318,7 @@ static int tmc_enable_etr_sink_sysfs(struct coresight= _device *csdev) } =20 out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 if (!ret) dev_dbg(&csdev->dev, "TMC-ETR enabled\n"); @@ -1637,17 +1637,17 @@ tmc_update_etr_buffer(struct coresight_device *csde= v, struct etr_perf_buffer *etr_perf =3D config; struct etr_buf *etr_buf =3D etr_perf->etr_buf; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 /* Don't do anything if another tracer is using this sink */ if (csdev->refcnt !=3D 1) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); goto out; } =20 if (WARN_ON(drvdata->perf_buf !=3D etr_buf)) { lost =3D true; - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); goto out; } =20 @@ -1657,7 +1657,7 @@ tmc_update_etr_buffer(struct coresight_device *csdev, tmc_sync_etr_buf(drvdata); =20 CS_LOCK(drvdata->base); - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 lost =3D etr_buf->full; offset =3D etr_buf->offset; @@ -1726,7 +1726,7 @@ static int tmc_enable_etr_sink_perf(struct coresight_= device *csdev, void *data) struct perf_output_handle *handle =3D data; struct etr_perf_buffer *etr_perf =3D etm_perf_sink_config(handle); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); /* Don't use this sink if it is already claimed by sysFS */ if (coresight_get_mode(csdev) =3D=3D CS_MODE_SYSFS) { rc =3D -EBUSY; @@ -1766,7 +1766,7 @@ static int tmc_enable_etr_sink_perf(struct coresight_= device *csdev, void *data) } =20 unlock_out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return rc; } =20 @@ -1788,16 +1788,16 @@ static int tmc_disable_etr_sink(struct coresight_de= vice *csdev) unsigned long flags; struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 if (drvdata->reading) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return -EBUSY; } =20 csdev->refcnt--; if (csdev->refcnt) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return -EBUSY; } =20 @@ -1810,7 +1810,7 @@ static int tmc_disable_etr_sink(struct coresight_devi= ce *csdev) /* Reset perf specific data */ drvdata->perf_buf =3D NULL; =20 - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 dev_dbg(&csdev->dev, "TMC-ETR disabled\n"); return 0; @@ -1910,7 +1910,7 @@ int tmc_read_prepare_etr(struct tmc_drvdata *drvdata) if (WARN_ON_ONCE(drvdata->config_type !=3D TMC_CONFIG_TYPE_ETR)) return -EINVAL; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); if (drvdata->reading) { ret =3D -EBUSY; goto out; @@ -1932,7 +1932,7 @@ int tmc_read_prepare_etr(struct tmc_drvdata *drvdata) =20 drvdata->reading =3D true; out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 return ret; } @@ -1946,7 +1946,7 @@ int tmc_read_unprepare_etr(struct tmc_drvdata *drvdat= a) if (WARN_ON_ONCE(drvdata->config_type !=3D TMC_CONFIG_TYPE_ETR)) return -EINVAL; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 /* RE-enable the TMC if need be */ if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_SYSFS) { @@ -1966,7 +1966,7 @@ int tmc_read_unprepare_etr(struct tmc_drvdata *drvdat= a) } =20 drvdata->reading =3D false; - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 /* Free allocated memory out side of the spinlock */ if (sysfs_buf) diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracin= g/coresight/coresight-tmc.h index b48bc9a01cc0..6541a27a018e 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -249,7 +249,7 @@ struct tmc_drvdata { struct coresight_device *csdev; struct miscdevice miscdev; struct miscdevice crashdev; - spinlock_t spinlock; + raw_spinlock_t spinlock; pid_t pid; bool reading; bool stop_on_flush; --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Wed Dec 17 19:37:34 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 56DC720CCF0 for ; Thu, 6 Mar 2025 09:48:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741254504; cv=none; b=Uft5ngQxRnZEJhI4hQnsWLpPB7tcgJJoMwrZXyvBFwZUf4DRKf3qgh7QfioN5e8v6id1qX8DUM2NSclHJ+21F0m1j4WKauS6l0znonfwTaglQwDWASazIebBIg5PRxqxUzAWTP1u7jKHAmTx2fbwwzUjeeNsW4UFix4B9moBVjM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741254504; c=relaxed/simple; bh=RIe/5ZaCtNLHo29qreZI0j1qk+lpe9VGGmd6j6rEDJ4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=R8tD1u3kcKLK+4fYaYgeeFBvGG/fzqYEu89xNTXk2Z91UCSAyZuOnsO3xwZxQ+0YRx9sipCpLg7vSJeUybdE3Ml7zQlN2f4nQAS9U1UOFuBnDmr2Ouz2hNkiA+8ql1s3AhLBfhq5SI7cpWl5dxRTiBJGipRj/xkwJ8vfRE5Nzlw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DE2A21007; Thu, 6 Mar 2025 01:48:35 -0800 (PST) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0DD043F673; Thu, 6 Mar 2025 01:48:20 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, Yeoreum Yun Subject: [PATCH v5 9/9] coresight/ultrasoc: change smb_drv_data spinlock's type to raw_spinlock_t Date: Thu, 6 Mar 2025 09:48:00 +0000 Message-Id: <20250306094800.1082950-10-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250306094800.1082950-1-yeoreum.yun@arm.com> References: <20250306094800.1082950-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In ultrasoc-smb drivers, smb_drv_data->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since smb__drv_data->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type smb_drv_data->spinlock in ultrasoc-smb drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Reviewed-by: James Clark Signed-off-by: Yeoreum Yun --- drivers/hwtracing/coresight/ultrasoc-smb.c | 12 ++++++------ drivers/hwtracing/coresight/ultrasoc-smb.h | 2 +- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/hwtracing/coresight/ultrasoc-smb.c b/drivers/hwtracing= /coresight/ultrasoc-smb.c index dc3c9504dd7c..26cfc939e5bd 100644 --- a/drivers/hwtracing/coresight/ultrasoc-smb.c +++ b/drivers/hwtracing/coresight/ultrasoc-smb.c @@ -98,7 +98,7 @@ static int smb_open(struct inode *inode, struct file *fil= e) struct smb_drv_data *drvdata =3D container_of(file->private_data, struct smb_drv_data, miscdev); =20 - guard(spinlock)(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); =20 if (drvdata->reading) return -EBUSY; @@ -152,7 +152,7 @@ static int smb_release(struct inode *inode, struct file= *file) struct smb_drv_data *drvdata =3D container_of(file->private_data, struct smb_drv_data, miscdev); =20 - guard(spinlock)(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); drvdata->reading =3D false; =20 return 0; @@ -245,7 +245,7 @@ static int smb_enable(struct coresight_device *csdev, e= num cs_mode mode, struct smb_drv_data *drvdata =3D dev_get_drvdata(csdev->dev.parent); int ret =3D 0; =20 - guard(spinlock)(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); =20 /* Do nothing, the trace data is reading by other interface now */ if (drvdata->reading) @@ -280,7 +280,7 @@ static int smb_disable(struct coresight_device *csdev) { struct smb_drv_data *drvdata =3D dev_get_drvdata(csdev->dev.parent); =20 - guard(spinlock)(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); =20 if (drvdata->reading) return -EBUSY; @@ -378,7 +378,7 @@ static unsigned long smb_update_buffer(struct coresight= _device *csdev, if (!buf) return 0; =20 - guard(spinlock)(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); =20 /* Don't do anything if another tracer is using this sink. */ if (csdev->refcnt !=3D 1) @@ -563,7 +563,7 @@ static int smb_probe(struct platform_device *pdev) =20 smb_reset_buffer(drvdata); platform_set_drvdata(pdev, drvdata); - spin_lock_init(&drvdata->spinlock); + raw_spin_lock_init(&drvdata->spinlock); drvdata->pid =3D -1; =20 ret =3D smb_register_sink(pdev, drvdata); diff --git a/drivers/hwtracing/coresight/ultrasoc-smb.h b/drivers/hwtracing= /coresight/ultrasoc-smb.h index a91d39cfccb8..c4c111275627 100644 --- a/drivers/hwtracing/coresight/ultrasoc-smb.h +++ b/drivers/hwtracing/coresight/ultrasoc-smb.h @@ -115,7 +115,7 @@ struct smb_drv_data { struct coresight_device *csdev; struct smb_data_buffer sdb; struct miscdevice miscdev; - spinlock_t spinlock; + raw_spinlock_t spinlock; bool reading; pid_t pid; }; --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}