From nobody Mon Feb 9 22:38:39 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 882B5221F33 for ; Thu, 6 Mar 2025 11:31:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741260667; cv=none; b=pjbppobwuxic03XFxx6ttb82C90/ZE9eZqXX70oafWKjORVJKGVYzd8Y96/s1nLJnyRrG0AczRxlvhXrF/kEmornNhLsgp3THH56FRDlXijP0IX/RjwkNPj4svsCNPquMt724TLwdoLnv22W6+NUFyTe6Qhts+CTxzp8x6PeqQA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741260667; c=relaxed/simple; bh=Icsf5mwdszxckwhH0w5L/002CVczlNt3EFhEPGNLsiE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=bZ1VTKlcqDjh3iHARrk5Ro1mrl6BCK+0X3G2ngIkqogIxY6Y3PGWuWij4j2TR/EH+W+8XKcZxDPJcwPyoVUFvgYdk0c+3U8oZmF7BwPbgCCbTwe9sUeZl12kk+3yVO5TzYJsPCLh7OGPFgpz2TtjiXpLWst8K4NnVT7I7u2551w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZtoVQAom; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZtoVQAom" Received: by smtp.kernel.org (Postfix) with ESMTPS id 1FAA4C4CEEB; Thu, 6 Mar 2025 11:31:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741260667; bh=Icsf5mwdszxckwhH0w5L/002CVczlNt3EFhEPGNLsiE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ZtoVQAomgaertC2eD5j/CgQORDHI0fpJW6SHEoYDv6oSbIiWaQn1qA6nvFrYonu+K 92ZlFCU3TEoIsSAClS8kBaNxh6xdrHcm9QZkYuEze4EOpZA6y0yMnTliB/D4Gqzz7t NMwGrtTwi1Sx1IADx2LONpYTPNVXCi2dgYlPi8TOCd6ONx9ZikSfwsSnovQFtjK3uG 4f60du3Hh3XL93mkqSOcrX558ibre7ZHXRrg5S3O1sq3Qet9fPScd+qaDLe5oYpPgN ElVj2Si06oDKtV1Eeuh9uHwynFFRyi26o6i0YBamVVzxCICzIDfIx3jZ8tP2ugPiRJ SmyMicDm4f1Cw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16E1AC282D1; Thu, 6 Mar 2025 11:31:07 +0000 (UTC) From: Vincent Mailhol via B4 Relay Date: Thu, 06 Mar 2025 20:29:52 +0900 Subject: [PATCH v5 1/7] bits: split the definition of the asm and non-asm GENMASK() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250306-fixed-type-genmasks-v5-1-b443e9dcba63@wanadoo.fr> References: <20250306-fixed-type-genmasks-v5-0-b443e9dcba63@wanadoo.fr> In-Reply-To: <20250306-fixed-type-genmasks-v5-0-b443e9dcba63@wanadoo.fr> To: Yury Norov , Lucas De Marchi , Rasmus Villemoes , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Simona Vetter , Andrew Morton Cc: linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Andi Shyti , David Laight , Dmitry Baryshkov , Andy Shevchenko , Vincent Mailhol X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1855; i=mailhol.vincent@wanadoo.fr; h=from:subject:message-id; bh=dJfvjZxC8SCVRVjYV16O3WdcDhHgqH5OViLGYTkkouk=; b=owGbwMvMwCV2McXO4Xp97WbG02pJDOkn21PYfefvEdA3yhG+9Jq79IzZW82JNUeNNe8m24S6c YgvryvsKGVhEONikBVTZFlWzsmt0FHoHXboryXMHFYmkCEMXJwCMBGFIkaGR30Lt08Xuyu9/cIV F4W3IRM6uNKsebJvcss/WLAufYMLIyNDp3eijYz85ushG4vF4pZMLfyz4EQK49VnS25OFEqIs65 mAgA= X-Developer-Key: i=mailhol.vincent@wanadoo.fr; a=openpgp; fpr=ED8F700574E67F20E574E8E2AB5FEB886DBB99C2 X-Endpoint-Received: by B4 Relay for mailhol.vincent@wanadoo.fr/default with auth_id=291 X-Original-From: Vincent Mailhol Reply-To: mailhol.vincent@wanadoo.fr From: Vincent Mailhol In an upcoming change, GENMASK() and its friends will indirectly depend on sizeof() which is not available in asm. Instead of adding further complexity to __GENMASK() to make it work for both asm and non asm, just split the definition of the two variants. Signed-off-by: Vincent Mailhol --- Changelog: v4 -> v5: - Use tab indentations instead of single space to separate the macro name from its body. v3 -> v4: - New patch in the series --- include/linux/bits.h | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/include/linux/bits.h b/include/linux/bits.h index 14fd0ca9a6cd17339dd2f69e449558312a8a001b..4819cbe7bd48fbae796fc6005c9= f92b1c93a034c 100644 --- a/include/linux/bits.h +++ b/include/linux/bits.h @@ -19,23 +19,17 @@ * GENMASK_ULL(39, 21) gives us the 64bit vector 0x000000ffffe00000. */ #if !defined(__ASSEMBLY__) + #include #include + #define GENMASK_INPUT_CHECK(h, l) BUILD_BUG_ON_ZERO(const_true((l) > (h))) -#else -/* - * BUILD_BUG_ON_ZERO is not available in h files included from asm files, - * disable the input check if that is the case. - */ -#define GENMASK_INPUT_CHECK(h, l) 0 -#endif =20 #define GENMASK(h, l) \ (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) #define GENMASK_ULL(h, l) \ (GENMASK_INPUT_CHECK(h, l) + __GENMASK_ULL(h, l)) =20 -#if !defined(__ASSEMBLY__) /* * Missing asm support * @@ -48,6 +42,12 @@ */ #define GENMASK_U128(h, l) \ (GENMASK_INPUT_CHECK(h, l) + __GENMASK_U128(h, l)) -#endif + +#else /* defined(__ASSEMBLY__) */ + +#define GENMASK(h, l) __GENMASK(h, l) +#define GENMASK_ULL(h, l) __GENMASK_ULL(h, l) + +#endif /* !defined(__ASSEMBLY__) */ =20 #endif /* __LINUX_BITS_H */ --=20 2.45.3