From nobody Sun Feb 8 01:31:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 47FF524C667; Wed, 5 Mar 2025 13:01:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741179669; cv=none; b=ouV0zjShhaXkK1og5UX2PA9zHjYpkUyujWO8YRsLS13hJAc/v3yW1N2RbgYL5LC7IZMOG4v2B5USPsoFQwduxvXfp03wNaqguMMXn9SBoY9/NJjHXJdREd5IBWCSaKaf00MlG9oVPbdF5fG00YDYHxn/Vo6o9WshKs6M6E50gUI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741179669; c=relaxed/simple; bh=TXMXBDUa/9mgqdVRYWJGOfGPn2lcvQjcuO+122LWB50=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=cm4PbOxSg/rg6oWvw+UBwNDfgf4muGgM2cUD47xlF0Tjs7U+C6uiuH0ft5YTW1kKMSHCEaaGStfpiAK1qW9A/pJTnHFsEK1XRIqX3YvcaAtFSaUHCc1dltt3DnjtDFoGBFDNuwDEc217/pt+FFg//UATs/UVNXMP9Px6FTpdP+U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=lV5s5632; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="lV5s5632" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741179669; x=1772715669; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=TXMXBDUa/9mgqdVRYWJGOfGPn2lcvQjcuO+122LWB50=; b=lV5s5632W5DHYaeUvd5DYqaDgBiL+sKteCQdncTUVrzF0ycZaPa5+xvU 1QER3V1VXLbgS8GNncad0DTtBiwI826blBiw2Hjtw5U6XlXIy4xa59IYM BmS9mQCErbHSVt7i7APS4ICdAfxNHsSgVWnvJMmbMG4gSO6yjZ+txj5n3 bxriD5JWCCi2raVSOMftVnnGzipu+wQQ/QTYTt8LXNqRaLFm+Z/e/zWDJ pO8M3x5Ay+wTP6Snvv0vahG8hextqhbA2HqrmcKXitFt1yc/Lm6uuaBQ0 wFTmgzRLHyBaJVlIsXKgL9zRlg1ovonyLGpq+5s6ANUQ55KM8cPCoruSs g==; X-CSE-ConnectionGUID: CS2i7OWPTAqI/Sm/408aaA== X-CSE-MsgGUID: xz4mBPimQ9Ok5Y5x0fZAMw== X-IronPort-AV: E=McAfee;i="6700,10204,11363"; a="45794883" X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="45794883" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2025 05:01:08 -0800 X-CSE-ConnectionGUID: 0dfTdEU5QF6bz8I116yfCQ== X-CSE-MsgGUID: vYf5Oc5dTd+WzvrtST/0Dg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="123276969" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa005.fm.intel.com with ESMTP; 05 Mar 2025 05:01:00 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Simon Horman , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Furong Xu <0x1207@gmail.com>, Russell King , Vladimir Oltean , Serge Semin , Xiaolei Wang , Suraj Jaiswal , Kory Maincent , Gal Pressman , Jesper Nilsson , Choong Yong Liang , Chwee-Lin Choong , Faizal Rahim , Kunihiko Hayashi , Vinicius Costa Gomes , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, bpf@vger.kernel.org Subject: [PATCH iwl-next v8 01/11] net: stmmac: move frag_size handling out of spin_lock Date: Wed, 5 Mar 2025 08:00:16 -0500 Message-Id: <20250305130026.642219-2-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> References: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The upcoming patch will extract verification logic into a new module, MMSV (MAC Merge Software Verification). MMSV will handle most FPE fields, except frag_size. It introduces its own lock (mmsv->lock), replacing fpe_cfg->lock. Since frag_size handling remains in the driver, the existing rtnl_lock() is sufficient. Move frag_size handling out of spin_lock_irq_save() to keep the upcoming patch a pure refactoring without behavior changes. Signed-off-by: Faizal Rahim Reviewed-by: Furong Xu <0x1207@gmail.com> Reviewed-by: Vladimir Oltean --- drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers= /net/ethernet/stmicro/stmmac/stmmac_ethtool.c index 918a32f8fda8..cfe5aea24549 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c @@ -1216,6 +1216,10 @@ static int stmmac_get_mm(struct net_device *ndev, if (!stmmac_fpe_supported(priv)) return -EOPNOTSUPP; =20 + state->rx_min_frag_size =3D ETH_ZLEN; + frag_size =3D stmmac_fpe_get_add_frag_size(priv); + state->tx_min_frag_size =3D ethtool_mm_frag_size_add_to_min(frag_size); + spin_lock_irqsave(&priv->fpe_cfg.lock, flags); =20 state->max_verify_time =3D STMMAC_FPE_MM_MAX_VERIFY_TIME_MS; @@ -1224,7 +1228,6 @@ static int stmmac_get_mm(struct net_device *ndev, state->verify_time =3D priv->fpe_cfg.verify_time; state->tx_enabled =3D priv->fpe_cfg.tx_enabled; state->verify_status =3D priv->fpe_cfg.status; - state->rx_min_frag_size =3D ETH_ZLEN; =20 /* FPE active if common tx_enabled and * (verification success or disabled(forced)) @@ -1236,9 +1239,6 @@ static int stmmac_get_mm(struct net_device *ndev, else state->tx_active =3D false; =20 - frag_size =3D stmmac_fpe_get_add_frag_size(priv); - state->tx_min_frag_size =3D ethtool_mm_frag_size_add_to_min(frag_size); - spin_unlock_irqrestore(&priv->fpe_cfg.lock, flags); =20 return 0; @@ -1258,6 +1258,8 @@ static int stmmac_set_mm(struct net_device *ndev, str= uct ethtool_mm_cfg *cfg, if (err) return err; =20 + stmmac_fpe_set_add_frag_size(priv, frag_size); + /* Wait for the verification that's currently in progress to finish */ timer_shutdown_sync(&fpe_cfg->verify_timer); =20 @@ -1271,7 +1273,6 @@ static int stmmac_set_mm(struct net_device *ndev, str= uct ethtool_mm_cfg *cfg, if (!cfg->verify_enabled) fpe_cfg->status =3D ETHTOOL_MM_VERIFY_STATUS_DISABLED; =20 - stmmac_fpe_set_add_frag_size(priv, frag_size); stmmac_fpe_apply(priv); =20 spin_unlock_irqrestore(&fpe_cfg->lock, flags); --=20 2.34.1 From nobody Sun Feb 8 01:31:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE8852459E7; Wed, 5 Mar 2025 13:01:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741179679; cv=none; b=Tom/XhPZAgGaV+71iDPzad8dP0tA6vWxawqIor06TYkIDidGmjo68v52Zl+cXv5yC2C4u86hCCGbhGBsZvNJcrIFfuw3WhW3XkwwTSTtGy7Bv8ERgz3T3rchfbJN8+ohttwbCCLBud2mPMGc2iGV6c0sI7SeO2GIiamqXVibqPo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741179679; c=relaxed/simple; bh=BKczIM/iv/tW3rlIaF0CRsUnEXwCL6ChUSGdYn9WpPA=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; 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05 Mar 2025 05:01:08 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Simon Horman , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Furong Xu <0x1207@gmail.com>, Russell King , Vladimir Oltean , Serge Semin , Xiaolei Wang , Suraj Jaiswal , Kory Maincent , Gal Pressman , Jesper Nilsson , Choong Yong Liang , Chwee-Lin Choong , Faizal Rahim , Kunihiko Hayashi , Vinicius Costa Gomes , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, bpf@vger.kernel.org Subject: [PATCH iwl-next v8 02/11] net: ethtool: mm: extract stmmac verification logic into common library Date: Wed, 5 Mar 2025 08:00:17 -0500 Message-Id: <20250305130026.642219-3-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> References: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Vladimir Oltean It appears that stmmac is not the only hardware which requires a software-driven verification state machine for the MAC Merge layer. While on the one hand it's good to encourage hardware implementations, on the other hand it's quite difficult to tolerate multiple drivers implementing independently fairly non-trivial logic. Extract the hardware-independent logic from stmmac into library code and put it in ethtool. Name the state structure "mmsv" for MAC Merge Software Verification. Let this expose an operations structure for executing the hardware stuff: sync hardware with the tx_active boolean (result of verification process), enable/disable the pMAC, send mPackets, notify library of external events (reception of mPackets), as well as link state changes. Note that it is assumed that the external events are received in hardirq context. If they are not, it is probably a good idea to disable hardirqs when calling ethtool_mmsv_event_handle(), because the library does not do so. Also, the MM software verification process has no business with the tx_min_frag_size, that is all the driver's to handle. Signed-off-by: Vladimir Oltean Co-developed-by: Choong Yong Liang Signed-off-by: Choong Yong Liang Co-developed-by: Faizal Rahim Signed-off-by: Faizal Rahim Tested-by: Choong Yong Liang Tested-by: Furong Xu <0x1207@gmail.com> --- drivers/net/ethernet/stmicro/stmmac/stmmac.h | 16 +- .../ethernet/stmicro/stmmac/stmmac_ethtool.c | 42 +-- .../net/ethernet/stmicro/stmmac/stmmac_fpe.c | 174 +++-------- .../net/ethernet/stmicro/stmmac/stmmac_fpe.h | 5 - .../net/ethernet/stmicro/stmmac/stmmac_main.c | 8 +- include/linux/ethtool.h | 73 +++++ net/ethtool/mm.c | 278 +++++++++++++++++- 7 files changed, 394 insertions(+), 202 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/eth= ernet/stmicro/stmmac/stmmac.h index f05cae103d83..c9cc41af258a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h @@ -147,21 +147,9 @@ struct stmmac_channel { }; =20 struct stmmac_fpe_cfg { - /* Serialize access to MAC Merge state between ethtool requests - * and link state updates. - */ - spinlock_t lock; - + struct ethtool_mmsv mmsv; const struct stmmac_fpe_reg *reg; - u32 fpe_csr; /* MAC_FPE_CTRL_STS reg cache */ - - enum ethtool_mm_verify_status status; - struct timer_list verify_timer; - bool verify_enabled; - int verify_retries; - bool pmac_enabled; - u32 verify_time; - bool tx_enabled; + u32 fpe_csr; /* MAC_FPE_CTRL_STS reg cache */ }; =20 struct stmmac_tc_entry { diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers= /net/ethernet/stmicro/stmmac/stmmac_ethtool.c index cfe5aea24549..44ee73569cb1 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c @@ -1210,7 +1210,6 @@ static int stmmac_get_mm(struct net_device *ndev, struct ethtool_mm_state *state) { struct stmmac_priv *priv =3D netdev_priv(ndev); - unsigned long flags; u32 frag_size; =20 if (!stmmac_fpe_supported(priv)) @@ -1220,26 +1219,7 @@ static int stmmac_get_mm(struct net_device *ndev, frag_size =3D stmmac_fpe_get_add_frag_size(priv); state->tx_min_frag_size =3D ethtool_mm_frag_size_add_to_min(frag_size); =20 - spin_lock_irqsave(&priv->fpe_cfg.lock, flags); - - state->max_verify_time =3D STMMAC_FPE_MM_MAX_VERIFY_TIME_MS; - state->verify_enabled =3D priv->fpe_cfg.verify_enabled; - state->pmac_enabled =3D priv->fpe_cfg.pmac_enabled; - state->verify_time =3D priv->fpe_cfg.verify_time; - state->tx_enabled =3D priv->fpe_cfg.tx_enabled; - state->verify_status =3D priv->fpe_cfg.status; - - /* FPE active if common tx_enabled and - * (verification success or disabled(forced)) - */ - if (state->tx_enabled && - (state->verify_status =3D=3D ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED || - state->verify_status =3D=3D ETHTOOL_MM_VERIFY_STATUS_DISABLED)) - state->tx_active =3D true; - else - state->tx_active =3D false; - - spin_unlock_irqrestore(&priv->fpe_cfg.lock, flags); + ethtool_mmsv_get_mm(&priv->fpe_cfg.mmsv, state); =20 return 0; } @@ -1248,8 +1228,6 @@ static int stmmac_set_mm(struct net_device *ndev, str= uct ethtool_mm_cfg *cfg, struct netlink_ext_ack *extack) { struct stmmac_priv *priv =3D netdev_priv(ndev); - struct stmmac_fpe_cfg *fpe_cfg =3D &priv->fpe_cfg; - unsigned long flags; u32 frag_size; int err; =20 @@ -1259,23 +1237,7 @@ static int stmmac_set_mm(struct net_device *ndev, st= ruct ethtool_mm_cfg *cfg, return err; =20 stmmac_fpe_set_add_frag_size(priv, frag_size); - - /* Wait for the verification that's currently in progress to finish */ - timer_shutdown_sync(&fpe_cfg->verify_timer); - - spin_lock_irqsave(&fpe_cfg->lock, flags); - - fpe_cfg->verify_enabled =3D cfg->verify_enabled; - fpe_cfg->pmac_enabled =3D cfg->pmac_enabled; - fpe_cfg->verify_time =3D cfg->verify_time; - fpe_cfg->tx_enabled =3D cfg->tx_enabled; - - if (!cfg->verify_enabled) - fpe_cfg->status =3D ETHTOOL_MM_VERIFY_STATUS_DISABLED; - - stmmac_fpe_apply(priv); - - spin_unlock_irqrestore(&fpe_cfg->lock, flags); + ethtool_mmsv_set_mm(&priv->fpe_cfg.mmsv, cfg); =20 return 0; } diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c b/drivers/net= /ethernet/stmicro/stmmac/stmmac_fpe.c index 3a4bee029c7f..75b470ee621a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c @@ -27,12 +27,6 @@ #define STMMAC_MAC_FPE_CTRL_STS_SVER BIT(1) #define STMMAC_MAC_FPE_CTRL_STS_EFPE BIT(0) =20 -/* FPE link-partner hand-shaking mPacket type */ -enum stmmac_mpacket_type { - MPACKET_VERIFY =3D 0, - MPACKET_RESPONSE =3D 1, -}; - struct stmmac_fpe_reg { const u32 mac_fpe_reg; /* offset of MAC_FPE_CTRL_STS */ const u32 mtl_fpe_reg; /* offset of MTL_FPE_CTRL_STS */ @@ -48,10 +42,10 @@ bool stmmac_fpe_supported(struct stmmac_priv *priv) priv->hw->mac->fpe_map_preemption_class; } =20 -static void stmmac_fpe_configure(struct stmmac_priv *priv, bool tx_enable, - bool pmac_enable) +static void stmmac_fpe_configure_tx(struct ethtool_mmsv *mmsv, bool tx_ena= ble) { - struct stmmac_fpe_cfg *cfg =3D &priv->fpe_cfg; + struct stmmac_fpe_cfg *cfg =3D container_of(mmsv, struct stmmac_fpe_cfg, = mmsv); + struct stmmac_priv *priv =3D container_of(cfg, struct stmmac_priv, fpe_cf= g); const struct stmmac_fpe_reg *reg =3D cfg->reg; u32 num_rxq =3D priv->plat->rx_queues_to_use; void __iomem *ioaddr =3D priv->ioaddr; @@ -68,6 +62,15 @@ static void stmmac_fpe_configure(struct stmmac_priv *pri= v, bool tx_enable, cfg->fpe_csr =3D 0; } writel(cfg->fpe_csr, ioaddr + reg->mac_fpe_reg); +} + +static void stmmac_fpe_configure_pmac(struct ethtool_mmsv *mmsv, bool pmac= _enable) +{ + struct stmmac_fpe_cfg *cfg =3D container_of(mmsv, struct stmmac_fpe_cfg, = mmsv); + struct stmmac_priv *priv =3D container_of(cfg, struct stmmac_priv, fpe_cf= g); + const struct stmmac_fpe_reg *reg =3D cfg->reg; + void __iomem *ioaddr =3D priv->ioaddr; + u32 value; =20 value =3D readl(ioaddr + reg->int_en_reg); =20 @@ -85,47 +88,45 @@ static void stmmac_fpe_configure(struct stmmac_priv *pr= iv, bool tx_enable, writel(value, ioaddr + reg->int_en_reg); } =20 -static void stmmac_fpe_send_mpacket(struct stmmac_priv *priv, - enum stmmac_mpacket_type type) +static void stmmac_fpe_send_mpacket(struct ethtool_mmsv *mmsv, + enum ethtool_mpacket type) { - const struct stmmac_fpe_reg *reg =3D priv->fpe_cfg.reg; + struct stmmac_fpe_cfg *cfg =3D container_of(mmsv, struct stmmac_fpe_cfg, = mmsv); + struct stmmac_priv *priv =3D container_of(cfg, struct stmmac_priv, fpe_cf= g); + const struct stmmac_fpe_reg *reg =3D cfg->reg; void __iomem *ioaddr =3D priv->ioaddr; - u32 value =3D priv->fpe_cfg.fpe_csr; + u32 value =3D cfg->fpe_csr; =20 - if (type =3D=3D MPACKET_VERIFY) + if (type =3D=3D ETHTOOL_MPACKET_VERIFY) value |=3D STMMAC_MAC_FPE_CTRL_STS_SVER; - else if (type =3D=3D MPACKET_RESPONSE) + else if (type =3D=3D ETHTOOL_MPACKET_RESPONSE) value |=3D STMMAC_MAC_FPE_CTRL_STS_SRSP; =20 writel(value, ioaddr + reg->mac_fpe_reg); } =20 +static const struct ethtool_mmsv_ops stmmac_mmsv_ops =3D { + .configure_tx =3D stmmac_fpe_configure_tx, + .configure_pmac =3D stmmac_fpe_configure_pmac, + .send_mpacket =3D stmmac_fpe_send_mpacket, +}; + static void stmmac_fpe_event_status(struct stmmac_priv *priv, int status) { struct stmmac_fpe_cfg *fpe_cfg =3D &priv->fpe_cfg; + struct ethtool_mmsv *mmsv =3D &fpe_cfg->mmsv; =20 - /* This is interrupt context, just spin_lock() */ - spin_lock(&fpe_cfg->lock); - - if (!fpe_cfg->pmac_enabled || status =3D=3D FPE_EVENT_UNKNOWN) - goto unlock_out; + if (status =3D=3D FPE_EVENT_UNKNOWN) + return; =20 - /* LP has sent verify mPacket */ if ((status & FPE_EVENT_RVER) =3D=3D FPE_EVENT_RVER) - stmmac_fpe_send_mpacket(priv, MPACKET_RESPONSE); + ethtool_mmsv_event_handle(mmsv, ETHTOOL_MMSV_LP_SENT_VERIFY_MPACKET); =20 - /* Local has sent verify mPacket */ - if ((status & FPE_EVENT_TVER) =3D=3D FPE_EVENT_TVER && - fpe_cfg->status !=3D ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED) - fpe_cfg->status =3D ETHTOOL_MM_VERIFY_STATUS_VERIFYING; + if ((status & FPE_EVENT_TVER) =3D=3D FPE_EVENT_TVER) + ethtool_mmsv_event_handle(mmsv, ETHTOOL_MMSV_LD_SENT_VERIFY_MPACKET); =20 - /* LP has sent response mPacket */ - if ((status & FPE_EVENT_RRSP) =3D=3D FPE_EVENT_RRSP && - fpe_cfg->status =3D=3D ETHTOOL_MM_VERIFY_STATUS_VERIFYING) - fpe_cfg->status =3D ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED; - -unlock_out: - spin_unlock(&fpe_cfg->lock); + if ((status & FPE_EVENT_RRSP) =3D=3D FPE_EVENT_RRSP) + ethtool_mmsv_event_handle(mmsv, ETHTOOL_MMSV_LP_SENT_RESPONSE_MPACKET); } =20 void stmmac_fpe_irq_status(struct stmmac_priv *priv) @@ -164,119 +165,16 @@ void stmmac_fpe_irq_status(struct stmmac_priv *priv) stmmac_fpe_event_status(priv, status); } =20 -/** - * stmmac_fpe_verify_timer - Timer for MAC Merge verification - * @t: timer_list struct containing private info - * - * Verify the MAC Merge capability in the local TX direction, by - * transmitting Verify mPackets up to 3 times. Wait until link - * partner responds with a Response mPacket, otherwise fail. - */ -static void stmmac_fpe_verify_timer(struct timer_list *t) -{ - struct stmmac_fpe_cfg *fpe_cfg =3D from_timer(fpe_cfg, t, verify_timer); - struct stmmac_priv *priv =3D container_of(fpe_cfg, struct stmmac_priv, - fpe_cfg); - unsigned long flags; - bool rearm =3D false; - - spin_lock_irqsave(&fpe_cfg->lock, flags); - - switch (fpe_cfg->status) { - case ETHTOOL_MM_VERIFY_STATUS_INITIAL: - case ETHTOOL_MM_VERIFY_STATUS_VERIFYING: - if (fpe_cfg->verify_retries !=3D 0) { - stmmac_fpe_send_mpacket(priv, MPACKET_VERIFY); - rearm =3D true; - } else { - fpe_cfg->status =3D ETHTOOL_MM_VERIFY_STATUS_FAILED; - } - - fpe_cfg->verify_retries--; - break; - - case ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED: - stmmac_fpe_configure(priv, true, true); - break; - - default: - break; - } - - if (rearm) { - mod_timer(&fpe_cfg->verify_timer, - jiffies + msecs_to_jiffies(fpe_cfg->verify_time)); - } - - spin_unlock_irqrestore(&fpe_cfg->lock, flags); -} - -static void stmmac_fpe_verify_timer_arm(struct stmmac_fpe_cfg *fpe_cfg) -{ - if (fpe_cfg->pmac_enabled && fpe_cfg->tx_enabled && - fpe_cfg->verify_enabled && - fpe_cfg->status !=3D ETHTOOL_MM_VERIFY_STATUS_FAILED && - fpe_cfg->status !=3D ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED) { - timer_setup(&fpe_cfg->verify_timer, stmmac_fpe_verify_timer, 0); - mod_timer(&fpe_cfg->verify_timer, jiffies); - } -} - void stmmac_fpe_init(struct stmmac_priv *priv) { - priv->fpe_cfg.verify_retries =3D STMMAC_FPE_MM_MAX_VERIFY_RETRIES; - priv->fpe_cfg.verify_time =3D STMMAC_FPE_MM_MAX_VERIFY_TIME_MS; - priv->fpe_cfg.status =3D ETHTOOL_MM_VERIFY_STATUS_DISABLED; - timer_setup(&priv->fpe_cfg.verify_timer, stmmac_fpe_verify_timer, 0); - spin_lock_init(&priv->fpe_cfg.lock); + ethtool_mmsv_init(&priv->fpe_cfg.mmsv, priv->dev, + &stmmac_mmsv_ops); =20 if ((!priv->fpe_cfg.reg || !priv->hw->mac->fpe_map_preemption_class) && priv->dma_cap.fpesel) dev_info(priv->device, "FPE is not supported by driver.\n"); } =20 -void stmmac_fpe_apply(struct stmmac_priv *priv) -{ - struct stmmac_fpe_cfg *fpe_cfg =3D &priv->fpe_cfg; - - /* If verification is disabled, configure FPE right away. - * Otherwise let the timer code do it. - */ - if (!fpe_cfg->verify_enabled) { - stmmac_fpe_configure(priv, fpe_cfg->tx_enabled, - fpe_cfg->pmac_enabled); - } else { - fpe_cfg->status =3D ETHTOOL_MM_VERIFY_STATUS_INITIAL; - fpe_cfg->verify_retries =3D STMMAC_FPE_MM_MAX_VERIFY_RETRIES; - - if (netif_running(priv->dev)) - stmmac_fpe_verify_timer_arm(fpe_cfg); - } -} - -void stmmac_fpe_link_state_handle(struct stmmac_priv *priv, bool is_up) -{ - struct stmmac_fpe_cfg *fpe_cfg =3D &priv->fpe_cfg; - unsigned long flags; - - timer_shutdown_sync(&fpe_cfg->verify_timer); - - spin_lock_irqsave(&fpe_cfg->lock, flags); - - if (is_up && fpe_cfg->pmac_enabled) { - /* VERIFY process requires pmac enabled when NIC comes up */ - stmmac_fpe_configure(priv, false, true); - - /* New link =3D> maybe new partner =3D> new verification process */ - stmmac_fpe_apply(priv); - } else { - /* No link =3D> turn off EFPE */ - stmmac_fpe_configure(priv, false, false); - } - - spin_unlock_irqrestore(&fpe_cfg->lock, flags); -} - int stmmac_fpe_get_add_frag_size(struct stmmac_priv *priv) { const struct stmmac_fpe_reg *reg =3D priv->fpe_cfg.reg; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h b/drivers/net= /ethernet/stmicro/stmmac/stmmac_fpe.h index b884eac7142d..3fc46acf7001 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h @@ -9,15 +9,10 @@ #include #include =20 -#define STMMAC_FPE_MM_MAX_VERIFY_RETRIES 3 -#define STMMAC_FPE_MM_MAX_VERIFY_TIME_MS 128 - struct stmmac_priv; =20 -void stmmac_fpe_link_state_handle(struct stmmac_priv *priv, bool is_up); bool stmmac_fpe_supported(struct stmmac_priv *priv); void stmmac_fpe_init(struct stmmac_priv *priv); -void stmmac_fpe_apply(struct stmmac_priv *priv); void stmmac_fpe_irq_status(struct stmmac_priv *priv); int stmmac_fpe_get_add_frag_size(struct stmmac_priv *priv); void stmmac_fpe_set_add_frag_size(struct stmmac_priv *priv, u32 add_frag_s= ize); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/ne= t/ethernet/stmicro/stmmac/stmmac_main.c index d04543e5697b..8f723f9e84ba 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -992,7 +992,7 @@ static void stmmac_mac_link_down(struct phylink_config = *config, stmmac_set_eee_pls(priv, priv->hw, false); =20 if (stmmac_fpe_supported(priv)) - stmmac_fpe_link_state_handle(priv, false); + ethtool_mmsv_link_state_handle(&priv->fpe_cfg.mmsv, false); } =20 static void stmmac_mac_link_up(struct phylink_config *config, @@ -1100,7 +1100,7 @@ static void stmmac_mac_link_up(struct phylink_config = *config, stmmac_set_eee_pls(priv, priv->hw, true); =20 if (stmmac_fpe_supported(priv)) - stmmac_fpe_link_state_handle(priv, true); + ethtool_mmsv_link_state_handle(&priv->fpe_cfg.mmsv, true); =20 if (priv->plat->flags & STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY) stmmac_hwtstamp_correct_latency(priv, priv); @@ -4097,7 +4097,7 @@ static int stmmac_release(struct net_device *dev) stmmac_release_ptp(priv); =20 if (stmmac_fpe_supported(priv)) - timer_shutdown_sync(&priv->fpe_cfg.verify_timer); + ethtool_mmsv_stop(&priv->fpe_cfg.mmsv); =20 pm_runtime_put(priv->device); =20 @@ -7822,7 +7822,7 @@ int stmmac_suspend(struct device *dev) rtnl_unlock(); =20 if (stmmac_fpe_supported(priv)) - timer_shutdown_sync(&priv->fpe_cfg.verify_timer); + ethtool_mmsv_stop(&priv->fpe_cfg.mmsv); =20 priv->speed =3D SPEED_UNKNOWN; return 0; diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h index 870994cc3ef7..b4b8eaf1f256 100644 --- a/include/linux/ethtool.h +++ b/include/linux/ethtool.h @@ -17,9 +17,13 @@ #include #include #include +#include #include #include =20 +#define ETHTOOL_MM_MAX_VERIFY_TIME_MS 128 +#define ETHTOOL_MM_MAX_VERIFY_RETRIES 3 + struct compat_ethtool_rx_flow_spec { u32 flow_type; union ethtool_flow_union h_u; @@ -710,6 +714,75 @@ struct ethtool_mm_stats { u64 MACMergeHoldCount; }; =20 +enum ethtool_mmsv_event { + ETHTOOL_MMSV_LP_SENT_VERIFY_MPACKET, + ETHTOOL_MMSV_LD_SENT_VERIFY_MPACKET, + ETHTOOL_MMSV_LP_SENT_RESPONSE_MPACKET, +}; + +/* MAC Merge verification mPacket type */ +enum ethtool_mpacket { + ETHTOOL_MPACKET_VERIFY, + ETHTOOL_MPACKET_RESPONSE, +}; + +struct ethtool_mmsv; + +/** + * struct ethtool_mmsv_ops - Operations for MAC Merge Software Verification + * @configure_tx: Driver callback for the event where the preemptible TX + * becomes active or inactive. Preemptible traffic + * classes must be committed to hardware only while + * preemptible TX is active. + * @configure_pmac: Driver callback for the event where the pMAC state + * changes as result of an administrative setting + * (ethtool) or a call to ethtool_mmsv_link_state_handle(). + * @send_mpacket: Driver-provided method for sending a Verify or a Response + * mPacket. + */ +struct ethtool_mmsv_ops { + void (*configure_tx)(struct ethtool_mmsv *mmsv, bool tx_active); + void (*configure_pmac)(struct ethtool_mmsv *mmsv, bool pmac_enabled); + void (*send_mpacket)(struct ethtool_mmsv *mmsv, enum ethtool_mpacket mpac= ket); +}; + +/** + * struct ethtool_mmsv - MAC Merge Software Verification + * @ops: operations for MAC Merge Software Verification + * @dev: pointer to net_device structure + * @lock: serialize access to MAC Merge state between + * ethtool requests and link state updates. + * @status: current verification FSM state + * @verify_timer: timer for verification in local TX direction + * @verify_enabled: indicates if verification is enabled + * @verify_retries: number of retries for verification + * @pmac_enabled: indicates if the preemptible MAC is enabled + * @verify_time: time for verification in milliseconds + * @tx_enabled: indicates if transmission is enabled + */ +struct ethtool_mmsv { + const struct ethtool_mmsv_ops *ops; + struct net_device *dev; + spinlock_t lock; + enum ethtool_mm_verify_status status; + struct timer_list verify_timer; + bool verify_enabled; + int verify_retries; + bool pmac_enabled; + u32 verify_time; + bool tx_enabled; +}; + +void ethtool_mmsv_stop(struct ethtool_mmsv *mmsv); +void ethtool_mmsv_link_state_handle(struct ethtool_mmsv *mmsv, bool up); +void ethtool_mmsv_event_handle(struct ethtool_mmsv *mmsv, + enum ethtool_mmsv_event event); +void ethtool_mmsv_get_mm(struct ethtool_mmsv *mmsv, + struct ethtool_mm_state *state); +void ethtool_mmsv_set_mm(struct ethtool_mmsv *mmsv, struct ethtool_mm_cfg = *cfg); +void ethtool_mmsv_init(struct ethtool_mmsv *mmsv, struct net_device *dev, + const struct ethtool_mmsv_ops *ops); + /** * struct ethtool_rxfh_param - RXFH (RSS) parameters * @hfunc: Defines the current RSS hash function used by HW (or to be set = to). diff --git a/net/ethtool/mm.c b/net/ethtool/mm.c index 2816bb23c3ad..aa43df2ecac0 100644 --- a/net/ethtool/mm.c +++ b/net/ethtool/mm.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright 2022-2023 NXP + * Copyright 2022-2025 NXP + * Copyright 2024 Furong Xu <0x1207@gmail.com> */ #include "common.h" #include "netlink.h" @@ -282,3 +283,278 @@ bool ethtool_dev_mm_supported(struct net_device *dev) return supported; } EXPORT_SYMBOL_GPL(ethtool_dev_mm_supported); + +static void ethtool_mmsv_configure_tx(struct ethtool_mmsv *mmsv, + bool tx_active) +{ + if (mmsv->ops->configure_tx) + mmsv->ops->configure_tx(mmsv, tx_active); +} + +static void ethtool_mmsv_configure_pmac(struct ethtool_mmsv *mmsv, + bool pmac_enabled) +{ + if (mmsv->ops->configure_pmac) + mmsv->ops->configure_pmac(mmsv, pmac_enabled); +} + +static void ethtool_mmsv_send_mpacket(struct ethtool_mmsv *mmsv, + enum ethtool_mpacket mpacket) +{ + if (mmsv->ops->send_mpacket) + mmsv->ops->send_mpacket(mmsv, mpacket); +} + +/** + * ethtool_mmsv_verify_timer - Timer for MAC Merge verification + * @t: timer_list struct containing private info + * + * Verify the MAC Merge capability in the local TX direction, by + * transmitting Verify mPackets up to 3 times. Wait until link + * partner responds with a Response mPacket, otherwise fail. + */ +static void ethtool_mmsv_verify_timer(struct timer_list *t) +{ + struct ethtool_mmsv *mmsv =3D from_timer(mmsv, t, verify_timer); + unsigned long flags; + bool rearm =3D false; + + spin_lock_irqsave(&mmsv->lock, flags); + + switch (mmsv->status) { + case ETHTOOL_MM_VERIFY_STATUS_INITIAL: + case ETHTOOL_MM_VERIFY_STATUS_VERIFYING: + if (mmsv->verify_retries !=3D 0) { + ethtool_mmsv_send_mpacket(mmsv, ETHTOOL_MPACKET_VERIFY); + rearm =3D true; + } else { + mmsv->status =3D ETHTOOL_MM_VERIFY_STATUS_FAILED; + } + + mmsv->verify_retries--; + break; + + case ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED: + ethtool_mmsv_configure_tx(mmsv, true); + break; + + default: + break; + } + + if (rearm) { + mod_timer(&mmsv->verify_timer, + jiffies + msecs_to_jiffies(mmsv->verify_time)); + } + + spin_unlock_irqrestore(&mmsv->lock, flags); +} + +static void ethtool_mmsv_verify_timer_arm(struct ethtool_mmsv *mmsv) +{ + if (mmsv->pmac_enabled && mmsv->tx_enabled && mmsv->verify_enabled && + mmsv->status !=3D ETHTOOL_MM_VERIFY_STATUS_FAILED && + mmsv->status !=3D ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED) { + timer_setup(&mmsv->verify_timer, ethtool_mmsv_verify_timer, 0); + mod_timer(&mmsv->verify_timer, jiffies); + } +} + +static void ethtool_mmsv_apply(struct ethtool_mmsv *mmsv) +{ + /* If verification is disabled, configure FPE right away. + * Otherwise let the timer code do it. + */ + if (!mmsv->verify_enabled) { + ethtool_mmsv_configure_pmac(mmsv, mmsv->pmac_enabled); + ethtool_mmsv_configure_tx(mmsv, mmsv->tx_enabled); + } else { + mmsv->status =3D ETHTOOL_MM_VERIFY_STATUS_INITIAL; + mmsv->verify_retries =3D ETHTOOL_MM_MAX_VERIFY_RETRIES; + + if (netif_running(mmsv->dev)) + ethtool_mmsv_verify_timer_arm(mmsv); + } +} + +/** + * ethtool_mmsv_stop() - Stop MAC Merge Software Verification + * @mmsv: MAC Merge Software Verification state + * + * Drivers should call this method in a state where the hardware is + * about to lose state, like ndo_stop() or suspend(), and turning off + * MAC Merge features would be superfluous. Otherwise, prefer + * ethtool_mmsv_link_state_handle() with up=3Dfalse. + */ +void ethtool_mmsv_stop(struct ethtool_mmsv *mmsv) +{ + timer_shutdown_sync(&mmsv->verify_timer); +} +EXPORT_SYMBOL_GPL(ethtool_mmsv_stop); + +/** + * ethtool_mmsv_link_state_handle() - Inform MAC Merge Software Verificati= on + * of link state changes + * @mmsv: MAC Merge Software Verification state + * @up: True if device carrier is up and able to pass verification packets + * + * Calling context is expected to be from a task, interrupts enabled. + */ +void ethtool_mmsv_link_state_handle(struct ethtool_mmsv *mmsv, bool up) +{ + unsigned long flags; + + ethtool_mmsv_stop(mmsv); + + spin_lock_irqsave(&mmsv->lock, flags); + + if (up && mmsv->pmac_enabled) { + /* VERIFY process requires pMAC enabled when NIC comes up */ + ethtool_mmsv_configure_pmac(mmsv, true); + + /* New link =3D> maybe new partner =3D> new verification process */ + ethtool_mmsv_apply(mmsv); + } else { + mmsv->status =3D ETHTOOL_MM_VERIFY_STATUS_INITIAL; + mmsv->verify_retries =3D ETHTOOL_MM_MAX_VERIFY_RETRIES; + + /* No link or pMAC not enabled */ + ethtool_mmsv_configure_pmac(mmsv, false); + ethtool_mmsv_configure_tx(mmsv, false); + } + + spin_unlock_irqrestore(&mmsv->lock, flags); +} +EXPORT_SYMBOL_GPL(ethtool_mmsv_link_state_handle); + +/** + * ethtool_mmsv_event_handle() - Inform MAC Merge Software Verification + * of interrupt-based events + * @mmsv: MAC Merge Software Verification state + * @event: Event which took place (packet transmission or reception) + * + * Calling context expects to have interrupts disabled. + */ +void ethtool_mmsv_event_handle(struct ethtool_mmsv *mmsv, + enum ethtool_mmsv_event event) +{ + /* This is interrupt context, just spin_lock() */ + spin_lock(&mmsv->lock); + + if (!mmsv->pmac_enabled) + goto unlock; + + switch (event) { + case ETHTOOL_MMSV_LP_SENT_VERIFY_MPACKET: + /* Link partner has sent verify mPacket */ + ethtool_mmsv_send_mpacket(mmsv, ETHTOOL_MPACKET_RESPONSE); + break; + case ETHTOOL_MMSV_LD_SENT_VERIFY_MPACKET: + /* Local device has sent verify mPacket */ + if (mmsv->status !=3D ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED) + mmsv->status =3D ETHTOOL_MM_VERIFY_STATUS_VERIFYING; + break; + case ETHTOOL_MMSV_LP_SENT_RESPONSE_MPACKET: + /* Link partner has sent response mPacket */ + if (mmsv->status =3D=3D ETHTOOL_MM_VERIFY_STATUS_VERIFYING) + mmsv->status =3D ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED; + break; + } + +unlock: + spin_unlock(&mmsv->lock); +} +EXPORT_SYMBOL_GPL(ethtool_mmsv_event_handle); + +static bool ethtool_mmsv_is_tx_active(struct ethtool_mmsv *mmsv) +{ + /* TX is active if administratively enabled, and verification either + * succeeded, or was administratively disabled. + */ + return mmsv->tx_enabled && + (mmsv->status =3D=3D ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED || + mmsv->status =3D=3D ETHTOOL_MM_VERIFY_STATUS_DISABLED); +} + +/** + * ethtool_mmsv_get_mm() - get_mm() hook for MAC Merge Software Verificati= on + * @mmsv: MAC Merge Software Verification state + * @state: see struct ethtool_mm_state + * + * Drivers are expected to call this from their ethtool_ops :: get_mm() + * method. + */ +void ethtool_mmsv_get_mm(struct ethtool_mmsv *mmsv, + struct ethtool_mm_state *state) +{ + unsigned long flags; + + spin_lock_irqsave(&mmsv->lock, flags); + + state->max_verify_time =3D ETHTOOL_MM_MAX_VERIFY_TIME_MS; + state->verify_enabled =3D mmsv->verify_enabled; + state->pmac_enabled =3D mmsv->pmac_enabled; + state->verify_time =3D mmsv->verify_time; + state->tx_enabled =3D mmsv->tx_enabled; + state->verify_status =3D mmsv->status; + state->tx_active =3D ethtool_mmsv_is_tx_active(mmsv); + + spin_unlock_irqrestore(&mmsv->lock, flags); +} +EXPORT_SYMBOL_GPL(ethtool_mmsv_get_mm); + +/** + * ethtool_mmsv_set_mm() - set_mm() hook for MAC Merge Software Verificati= on + * @mmsv: MAC Merge Software Verification state + * @cfg: see struct ethtool_mm_cfg + * + * Drivers are expected to call this from their ethtool_ops :: set_mm() + * method. + */ +void ethtool_mmsv_set_mm(struct ethtool_mmsv *mmsv, struct ethtool_mm_cfg = *cfg) +{ + unsigned long flags; + + /* Wait for the verification that's currently in progress to finish */ + ethtool_mmsv_stop(mmsv); + + spin_lock_irqsave(&mmsv->lock, flags); + + mmsv->verify_enabled =3D cfg->verify_enabled; + mmsv->pmac_enabled =3D cfg->pmac_enabled; + mmsv->verify_time =3D cfg->verify_time; + mmsv->tx_enabled =3D cfg->tx_enabled; + + if (!cfg->verify_enabled) + mmsv->status =3D ETHTOOL_MM_VERIFY_STATUS_DISABLED; + + ethtool_mmsv_apply(mmsv); + + spin_unlock_irqrestore(&mmsv->lock, flags); +} +EXPORT_SYMBOL_GPL(ethtool_mmsv_set_mm); + +/** + * ethtool_mmsv_init() - Initialize MAC Merge Software Verification state + * @mmsv: MAC Merge Software Verification state + * @dev: Pointer to network interface + * @ops: Methods for implementing the generic functionality + * + * The MAC Merge Software Verification is a timer- and event-based state + * machine intended for network interfaces which lack a hardware-based + * TX verification process (as per IEEE 802.3 clause 99.4.3). The timer + * is managed by the core code, whereas events are supplied by the + * driver explicitly calling one of the other API functions. + */ +void ethtool_mmsv_init(struct ethtool_mmsv *mmsv, struct net_device *dev, + const struct ethtool_mmsv_ops *ops) +{ + mmsv->ops =3D ops; + mmsv->dev =3D dev; + mmsv->verify_retries =3D ETHTOOL_MM_MAX_VERIFY_RETRIES; + mmsv->verify_time =3D ETHTOOL_MM_MAX_VERIFY_TIME_MS; + mmsv->status =3D ETHTOOL_MM_VERIFY_STATUS_DISABLED; + timer_setup(&mmsv->verify_timer, ethtool_mmsv_verify_timer, 0); + spin_lock_init(&mmsv->lock); +} +EXPORT_SYMBOL_GPL(ethtool_mmsv_init); --=20 2.34.1 From nobody Sun Feb 8 01:31:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4D7F7248883; Wed, 5 Mar 2025 13:01:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741179684; cv=none; b=Dsy4yp/Vh8v6TGYuG+RDayXw37b4yPAoUnddzjIzpw0f21CKHSHgWyOlVjvmZ7Cds+jM9KZY7ltjpPNIUSq8rZODFUp4Hf9X12fVyzcGDpXmzfLR8z69B7KppOqOkQxNZIcX7iJ2LFX5SJCAYhbVFOI3mOj+sGmSVBZYiM0nyi4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741179684; c=relaxed/simple; bh=Y//C+KyY9JDiVXwSEk627cRg7D/ALr5oNlQGwg/5vVQ=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=rt1z3Z6fjzUISDruRh5fur/RTx2eR4/4EfWC3HTIHvABSUeGM3N0kkUewmASs83l7Egg5c7/RQKE8qULzfaLtM8J0wtR0Y2bV2gqriAKvng/Vb8o70Hg872us+exz1ODIlnsWbcgJLNWN0d1i0hFlDkRciM0ZuOAOrd4/WLg61k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=mMlSoufq; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="mMlSoufq" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741179684; x=1772715684; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=Y//C+KyY9JDiVXwSEk627cRg7D/ALr5oNlQGwg/5vVQ=; b=mMlSoufqJwien0MgFABi0tFra/oc7ajKnIZh0NXzhrZj1fdiDQmtiKeI D5Jp0oZLHwIIIigeNyPRXS61k/tP6MszGd+TksQjDrzAKbuqaJ0iSOs7j PQwtiKgn7MLkxyjn3t0mbYf7JkaeXTBK131OBc4RYdYzn+fzqxN3Z75NF NEKQuffz9RsNXQD4vYKKjbzTZ/IB9iBe+ObunfebgOYI2wDVYr7irSkRA 3JSNKiqbYW6cB90TxDl4DI+qYXwF1uOivw2u1SM4H6CQAsHGfob1xco1I tOfTHwJ3+xuPiA32IeqYjIuSn/xhnGuctCpfGU3y4iV8S1j4JvriB52Nh Q==; X-CSE-ConnectionGUID: 79dLLd93TzWcFRejszyMOQ== X-CSE-MsgGUID: MH52ft6ISn+aqySE2E0Wtg== X-IronPort-AV: E=McAfee;i="6700,10204,11363"; a="45794963" X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="45794963" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2025 05:01:23 -0800 X-CSE-ConnectionGUID: 9mXuV+xOTeqFLxVCFnBCTA== X-CSE-MsgGUID: yj4NzQiUSh+rtly7s9bQ+w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="123277001" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa005.fm.intel.com with ESMTP; 05 Mar 2025 05:01:16 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Simon Horman , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Furong Xu <0x1207@gmail.com>, Russell King , Vladimir Oltean , Serge Semin , Xiaolei Wang , Suraj Jaiswal , Kory Maincent , Gal Pressman , Jesper Nilsson , Choong Yong Liang , Chwee-Lin Choong , Faizal Rahim , Kunihiko Hayashi , Vinicius Costa Gomes , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, bpf@vger.kernel.org Subject: [PATCH iwl-next v8 03/11] net: ethtool: mm: reset verification status when link is down Date: Wed, 5 Mar 2025 08:00:18 -0500 Message-Id: <20250305130026.642219-4-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> References: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When the link partner goes down, "ethtool --show-mm" still displays "Verification status: SUCCEEDED," reflecting a previous state that is no longer valid. Reset the verification status to ensure it reflects the current state. Signed-off-by: Faizal Rahim --- net/ethtool/mm.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/net/ethtool/mm.c b/net/ethtool/mm.c index aa43df2ecac0..ad9b40034003 100644 --- a/net/ethtool/mm.c +++ b/net/ethtool/mm.c @@ -415,8 +415,9 @@ void ethtool_mmsv_link_state_handle(struct ethtool_mmsv= *mmsv, bool up) /* New link =3D> maybe new partner =3D> new verification process */ ethtool_mmsv_apply(mmsv); } else { - mmsv->status =3D ETHTOOL_MM_VERIFY_STATUS_INITIAL; - mmsv->verify_retries =3D ETHTOOL_MM_MAX_VERIFY_RETRIES; + /* Reset the reported verification state while the link is down */ + if (mmsv->verify_enabled) + mmsv->status =3D ETHTOOL_MM_VERIFY_STATUS_INITIAL; =20 /* No link or pMAC not enabled */ ethtool_mmsv_configure_pmac(mmsv, false); --=20 2.34.1 From nobody Sun Feb 8 01:31:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C5CC22E400; Wed, 5 Mar 2025 13:01:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741179693; cv=none; b=o99Stetez5rrMAC+5VU+xix/R0lgmqm6dhDbTeUq4IhWpNqTQOCTNYvNgk9iPLNCmTAAVeAOHlVjSnwzjLW4Ld6ypuprf0TzMoY14zr+TLMxFqR9pHyNzsvgRvWidswlFjUnh44YjqgatzKuu2e30AH2I+zB0vav7s95h1vJM/4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741179693; c=relaxed/simple; bh=T8A6HBID+bnKK/poo4ku3s8z+sc9q3eeNC3dnooWZpk=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=dvWM8ilKrPKVzwQog4YUlaZDAHG8f6iUZcQfR/705BrbCa7cfjOtVAyU5CBr3MaN+uF+NcqmWVScEVCL7zY9vH5dWlOvqPM03C5fS9JHwtjL3gmuT3N4QfyJkyblHjmuzB/EEVg/dcNF+EY82iC6K605Yfa+Db4hwJgsosOmqto= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=TfzWCUPP; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="TfzWCUPP" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741179693; x=1772715693; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=T8A6HBID+bnKK/poo4ku3s8z+sc9q3eeNC3dnooWZpk=; b=TfzWCUPPm2qBqq2OoWT9DEjVrvmWpX62cDTPtgrcYyneP1CN2T8GD+b4 yw1Ic0PCC5e0afnJeryPP+j+jCHiT8hf/pbxeRH0pEg6AAYLLm2m6aWoS dMn3Z3aPdRhpN5UpLUm2uS0duxa53EXf2v0JwxiyGtahiRHF3/cBMl2g3 Oq1eoUreNaomiZDZeqXtrAdR9EnVaoB5mhAm0r+KECl8/DL2SCS+esHMU a5oa4qBriFqMEzIkXjUYs4Zx8fm1GG3r/W+DLaXb420pvlkKIYpnPmsDI YrV7EK4Ci7311cOlqb2ooI6NQ/nRxyc0L07qWS53aZud5XwdMLDBIkEZR Q==; X-CSE-ConnectionGUID: iPni+AaGRbum4yfR1FfOsA== X-CSE-MsgGUID: MItdoIeYTTiAawJ5402puw== X-IronPort-AV: E=McAfee;i="6700,10204,11363"; a="45794992" X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="45794992" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2025 05:01:31 -0800 X-CSE-ConnectionGUID: pubTXDQ+Rvyotxh2dqI6TQ== X-CSE-MsgGUID: hVICYxHCSZqdtIEeu4mnVQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="123277028" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa005.fm.intel.com with ESMTP; 05 Mar 2025 05:01:23 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Simon Horman , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Furong Xu <0x1207@gmail.com>, Russell King , Vladimir Oltean , Serge Semin , Xiaolei Wang , Suraj Jaiswal , Kory Maincent , Gal Pressman , Jesper Nilsson , Choong Yong Liang , Chwee-Lin Choong , Faizal Rahim , Kunihiko Hayashi , Vinicius Costa Gomes , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, bpf@vger.kernel.org Subject: [PATCH iwl-next v8 04/11] igc: rename xdp_get_tx_ring() for non-xdp usage Date: Wed, 5 Mar 2025 08:00:19 -0500 Message-Id: <20250305130026.642219-5-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> References: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Renamed xdp_get_tx_ring() function to a more generic name for use in upcoming frame preemption patches. Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc.h | 2 +- drivers/net/ethernet/intel/igc/igc_main.c | 9 ++++----- 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/in= tel/igc/igc.h index b8111ad9a9a8..22ecdac26cf4 100644 --- a/drivers/net/ethernet/intel/igc/igc.h +++ b/drivers/net/ethernet/intel/igc/igc.h @@ -736,7 +736,7 @@ struct igc_nfc_rule *igc_get_nfc_rule(struct igc_adapte= r *adapter, u32 location); int igc_add_nfc_rule(struct igc_adapter *adapter, struct igc_nfc_rule *rul= e); void igc_del_nfc_rule(struct igc_adapter *adapter, struct igc_nfc_rule *ru= le); - +struct igc_ring *igc_get_tx_ring(struct igc_adapter *adapter, int cpu); void igc_ptp_init(struct igc_adapter *adapter); void igc_ptp_reset(struct igc_adapter *adapter); void igc_ptp_suspend(struct igc_adapter *adapter); diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethern= et/intel/igc/igc_main.c index 56a35d58e7a6..db4a36afcec6 100644 --- a/drivers/net/ethernet/intel/igc/igc_main.c +++ b/drivers/net/ethernet/intel/igc/igc_main.c @@ -2444,8 +2444,7 @@ static int igc_xdp_init_tx_descriptor(struct igc_ring= *ring, return -ENOMEM; } =20 -static struct igc_ring *igc_xdp_get_tx_ring(struct igc_adapter *adapter, - int cpu) +struct igc_ring *igc_get_tx_ring(struct igc_adapter *adapter, int cpu) { int index =3D cpu; =20 @@ -2469,7 +2468,7 @@ static int igc_xdp_xmit_back(struct igc_adapter *adap= ter, struct xdp_buff *xdp) if (unlikely(!xdpf)) return -EFAULT; =20 - ring =3D igc_xdp_get_tx_ring(adapter, cpu); + ring =3D igc_get_tx_ring(adapter, cpu); nq =3D txring_txq(ring); =20 __netif_tx_lock(nq, cpu); @@ -2546,7 +2545,7 @@ static void igc_finalize_xdp(struct igc_adapter *adap= ter, int status) struct igc_ring *ring; =20 if (status & IGC_XDP_TX) { - ring =3D igc_xdp_get_tx_ring(adapter, cpu); + ring =3D igc_get_tx_ring(adapter, cpu); nq =3D txring_txq(ring); =20 __netif_tx_lock(nq, cpu); @@ -6699,7 +6698,7 @@ static int igc_xdp_xmit(struct net_device *dev, int n= um_frames, if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK)) return -EINVAL; =20 - ring =3D igc_xdp_get_tx_ring(adapter, cpu); + ring =3D igc_get_tx_ring(adapter, cpu); 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X-CSE-ConnectionGUID: qPBWvkd1QoeQFVTEeHtbsw== X-CSE-MsgGUID: aLlC39ltQfmGYL3UedZ57A== X-IronPort-AV: E=McAfee;i="6700,10204,11363"; a="45795019" X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="45795019" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2025 05:01:38 -0800 X-CSE-ConnectionGUID: 0uMt2p1XRaOoAu7PqxK9yg== X-CSE-MsgGUID: GiQZI9deSpiHVFQFohpiqA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="123277045" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa005.fm.intel.com with ESMTP; 05 Mar 2025 05:01:30 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Simon Horman , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Furong Xu <0x1207@gmail.com>, Russell King , Vladimir Oltean , Serge Semin , Xiaolei Wang , Suraj Jaiswal , Kory Maincent , Gal Pressman , Jesper Nilsson , Choong Yong Liang , Chwee-Lin Choong , Faizal Rahim , Kunihiko Hayashi , Vinicius Costa Gomes , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, bpf@vger.kernel.org Subject: [PATCH iwl-next v8 05/11] igc: optimize the TX packet buffer utilization Date: Wed, 5 Mar 2025 08:00:20 -0500 Message-Id: <20250305130026.642219-6-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> References: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Packet buffers (RX + TX) total 64KB. Neither RX or TX buffers can be larger than 34KB. So divide the buffer equally, 32KB for each. Co-developed-by: Vinicius Costa Gomes Signed-off-by: Vinicius Costa Gomes Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc_defines.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/eth= ernet/intel/igc/igc_defines.h index 8e449904aa7d..516ef70c98e9 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -400,7 +400,8 @@ #define I225_TXPBSIZE_DEFAULT 0x04000014 /* TXPBSIZE default */ #define IGC_RXPBS_CFG_TS_EN 0x80000000 /* Timestamp in Rx buffer */ =20 -#define IGC_TXPBSIZE_TSN 0x04145145 /* 5k bytes buffer for each queue */ + /* 7KB bytes buffer for each tx queue (total 4 queues) + 4KB for BMC*/ +#define IGC_TXPBSIZE_TSN 0x041c71c7 =20 #define IGC_DTXMXPKTSZ_TSN 0x19 /* 1600 bytes of max TX DMA packet size */ #define IGC_DTXMXPKTSZ_DEFAULT 0x98 /* 9728-byte Jumbo frames */ --=20 2.34.1 From nobody Sun Feb 8 01:31:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 836DB24A062; Wed, 5 Mar 2025 13:01:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741179707; cv=none; b=qYXfokPo0dYEb9i0TdkIixZyrJJgUriI+X/eJxlni0Y3BTD0nGnAHY9N95lC7C4G9cDuDqBBf57/pQdpODy7M8tGX0qZvv2hpRbrxZIQ908YzxKRCdtL/Sxw9xYia75XH3DlflJpN1KBFo2+ZR+6+bs1TgQJFZV04aombDzQzT8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741179707; c=relaxed/simple; bh=2Msp7YoBmanu425m0MXmljH1/c1Or8M2lkzZSA8x+50=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Z/aljEX0rx9tbLX3EwqiQwhPvSXoFRG0D+c2DsKd7QMOfD0NPV22zFrHRslxWb410658DEoKSjtfZsFLEzz96xbjuOv49ptN1CdFseU7x+NSysrykBT5Nnna2mLPx6OfnJoqcj63lytc5tfXzHhdpXPGGJO3EXJiEIBGJO6bI5I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=dgVm38Bv; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="dgVm38Bv" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741179706; x=1772715706; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=2Msp7YoBmanu425m0MXmljH1/c1Or8M2lkzZSA8x+50=; b=dgVm38BvQzllclLMYfQ9tG+6JkeVvxdDZxCn8ls/KWnoNQLEQii7sRDo G3QFZr4mY9LC+KcIh5RmzLJVB/Pb8zM5IWZe3TPD5+TrcHOcn+PFAEJ2s FFJHLGAb9Kyf5MyCulo6Kg4ub/Uvey6LbzddbWsEpbxf+8kNdDWPqlYwq Ml3e1PAXS1mFIic5Lu76PsfNqnlW3hdoxBEJIEjkJg2QRdsMb4Zahj2KI OnzXHAhAS8CqPjxLWBnm6cPzecAGgyhbOsj5plcBoe5SQbZKayPzH4dYg BxdSVeldo0lG5oAtmCTQvalX8hp+YfSQ3/xSoY/XPD0RUnhX9zvUuaco+ Q==; X-CSE-ConnectionGUID: fGKqcv9mQCma4fAKM4qC+Q== X-CSE-MsgGUID: rajMyYgUT9ee8BBj6JxmAQ== X-IronPort-AV: E=McAfee;i="6700,10204,11363"; a="45795056" X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="45795056" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2025 05:01:46 -0800 X-CSE-ConnectionGUID: xQgVjQU7RRCRvWCDSeerzQ== X-CSE-MsgGUID: TF0vvx1aSsaNv7LIwQ9VCg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="123277066" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa005.fm.intel.com with ESMTP; 05 Mar 2025 05:01:38 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Simon Horman , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Furong Xu <0x1207@gmail.com>, Russell King , Vladimir Oltean , Serge Semin , Xiaolei Wang , Suraj Jaiswal , Kory Maincent , Gal Pressman , Jesper Nilsson , Choong Yong Liang , Chwee-Lin Choong , Faizal Rahim , Kunihiko Hayashi , Vinicius Costa Gomes , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, bpf@vger.kernel.org Subject: [PATCH iwl-next v8 06/11] igc: set the RX packet buffer size for TSN mode Date: Wed, 5 Mar 2025 08:00:21 -0500 Message-Id: <20250305130026.642219-7-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> References: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In preparation for supporting frame preemption, when entering TSN mode set the receive packet buffer to 16KB for the Express MAC, 16KB for the Preemptible MAC and 2KB for the BMC, according to the datasheet section 7.1.3.2. Co-developed-by: Vinicius Costa Gomes Signed-off-by: Vinicius Costa Gomes Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc_defines.h | 3 +++ drivers/net/ethernet/intel/igc/igc_tsn.c | 13 +++++++++++-- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/eth= ernet/intel/igc/igc_defines.h index 516ef70c98e9..b19ac6f30dac 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -402,6 +402,9 @@ =20 /* 7KB bytes buffer for each tx queue (total 4 queues) + 4KB for BMC*/ #define IGC_TXPBSIZE_TSN 0x041c71c7 +/* 15KB for EXP + 15KB for BE + 2KB for BMC */ +#define IGC_RXPBSIZE_TSN 0x0000f08f +#define IGC_RXPBSIZE_SIZE_MASK 0x0001FFFF =20 #define IGC_DTXMXPKTSZ_TSN 0x19 /* 1600 bytes of max TX DMA packet size */ #define IGC_DTXMXPKTSZ_DEFAULT 0x98 /* 9728-byte Jumbo frames */ diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/etherne= t/intel/igc/igc_tsn.c index 1e44374ca1ff..f0213cfce07d 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -132,13 +132,17 @@ static int igc_tsn_disable_offload(struct igc_adapter= *adapter) { u16 queue_per_tc[4] =3D { 3, 2, 1, 0 }; struct igc_hw *hw =3D &adapter->hw; - u32 tqavctrl; + u32 tqavctrl, rxpbs; int i; =20 wr32(IGC_GTXOFFSET, 0); wr32(IGC_TXPBS, I225_TXPBSIZE_DEFAULT); wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_DEFAULT); =20 + rxpbs =3D rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK; + rxpbs |=3D I225_RXPBSIZE_DEFAULT; + wr32(IGC_RXPBS, rxpbs); + if (igc_is_device_id_i226(hw)) igc_tsn_restore_retx_default(adapter); =20 @@ -194,7 +198,7 @@ static int igc_tsn_enable_offload(struct igc_adapter *a= dapter) { struct igc_hw *hw =3D &adapter->hw; u32 tqavctrl, baset_l, baset_h; - u32 sec, nsec, cycle; + u32 sec, nsec, cycle, rxpbs; ktime_t base_time, systim; int i; =20 @@ -202,6 +206,11 @@ static int igc_tsn_enable_offload(struct igc_adapter *= adapter) wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_TSN); wr32(IGC_TXPBS, IGC_TXPBSIZE_TSN); =20 + rxpbs =3D rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK; + rxpbs |=3D IGC_RXPBSIZE_TSN; + + wr32(IGC_RXPBS, rxpbs); + if (igc_is_device_id_i226(hw)) igc_tsn_set_retx_qbvfullthreshold(adapter); =20 --=20 2.34.1 From nobody Sun Feb 8 01:31:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8732C24A07B; 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a="45795069" X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="45795069" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2025 05:01:53 -0800 X-CSE-ConnectionGUID: MQ0+ct9UQB+TkO86xLAnBQ== X-CSE-MsgGUID: fnarx/B0RH+KDO0WILpGeg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="123277095" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa005.fm.intel.com with ESMTP; 05 Mar 2025 05:01:45 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Simon Horman , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Furong Xu <0x1207@gmail.com>, Russell King , Vladimir Oltean , Serge Semin , Xiaolei Wang , Suraj Jaiswal , Kory Maincent , Gal Pressman , Jesper Nilsson , Choong Yong Liang , Chwee-Lin Choong , Faizal Rahim , Kunihiko Hayashi , Vinicius Costa Gomes , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, bpf@vger.kernel.org Subject: [PATCH iwl-next v8 07/11] igc: add support for frame preemption verification Date: Wed, 5 Mar 2025 08:00:22 -0500 Message-Id: <20250305130026.642219-8-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> References: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable This patch implements the "ethtool --set-mm" callback to trigger the frame preemption verification handshake. Uses the MAC Merge Software Verification (mmsv) mechanism in ethtool to perform the verification handshake for igc. The structure fpe.mmsv is set by mmsv in ethtool and should remain read-only for the driver. Other mmsv callbacks: a) configure_tx() -> not used yet at this point - igc lacks registers to configure FPE in the transmit direction, so this API is not utilized for now. A future patch will use it to control preemptible queue config. b) configure_pmac() -> not used - this callback dynamically controls pmac_enabled at runtime. For example, mmsv calls configure_pmac() and disables pmac_enabled when the link partner goes down, even if the user previously enabled it. The intention is to save power but it is not feasible in igc because it causes an endless adapter reset loop: 1) Board A and Board B complete the verification handshake. Tx mode register for both boards are in TSN mode. 2) Board B link goes down. On Board A: 3) mmsv calls configure_pmac() with pmac_enabled =3D false. 4) configure_pmac() in igc updates a new field based on pmac_enabled. Driver uses this field in igc_tsn_new_flags() to indicate that the user enabled/disabled FPE. 5) configure_pmac() in igc calls igc_tsn_offload_apply() to check whether an adapter reset is needed. Calls existing logic in igc_tsn_will_tx_mode_change() and igc_tsn_new_flags(). 6) Since pmac_enabled is now disabled and no other TSN feature is active, igc_tsn_will_tx_mode_change() evaluates to true because Tx mode will switch from TSN to Legacy. 7) Driver resets the adapter. 8) Registers are set, and Tx mode switches to Legacy. 9) When link partner is up, steps 3=E2=80=938 repeat, but this time with pmac_enabled =3D true, reactivating TSN. igc_tsn_will_tx_mode_change() evaluates to true again, since Tx mode will switch from Legacy to TSN. 10) Driver resets the adapter. 11) Rest adapter completes, registers are set, and Tx mode switches to TSN. On Board B: 12) Adapter reset on Board A at step 10 causes it to detect its link partner as down. 13) Repeats steps 3=E2=80=938. 14) Once reset adapter on Board A is completed at step 11, it detects its link partner as up. 15) Repeats steps 9=E2=80=9311. - this cycle repeats indefinitely. To avoid this issue, igc only uses mmsv.pmac_enabled to track whether FPE is enabled or disabled. Co-developed-by: Vinicius Costa Gomes Signed-off-by: Vinicius Costa Gomes Co-developed-by: Choong Yong Liang Signed-off-by: Choong Yong Liang Co-developed-by: Chwee-Lin Choong Signed-off-by: Chwee-Lin Choong Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc.h | 12 +- drivers/net/ethernet/intel/igc/igc_base.h | 1 + drivers/net/ethernet/intel/igc/igc_defines.h | 8 +- drivers/net/ethernet/intel/igc/igc_ethtool.c | 21 +++ drivers/net/ethernet/intel/igc/igc_main.c | 53 ++++++- drivers/net/ethernet/intel/igc/igc_tsn.c | 146 ++++++++++++++++++- drivers/net/ethernet/intel/igc/igc_tsn.h | 53 +++++++ 7 files changed, 289 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/in= tel/igc/igc.h index 22ecdac26cf4..d9ecb7cf80c9 100644 --- a/drivers/net/ethernet/intel/igc/igc.h +++ b/drivers/net/ethernet/intel/igc/igc.h @@ -40,6 +40,10 @@ void igc_ethtool_set_ops(struct net_device *); =20 #define IGC_MAX_TX_TSTAMP_REGS 4 =20 +struct igc_fpe_t { + struct ethtool_mmsv mmsv; +}; + enum igc_mac_filter_type { IGC_MAC_FILTER_TYPE_DST =3D 0, IGC_MAC_FILTER_TYPE_SRC @@ -332,6 +336,8 @@ struct igc_adapter { struct timespec64 period; } perout[IGC_N_PEROUT]; =20 + struct igc_fpe_t fpe; + /* LEDs */ struct mutex led_mutex; struct igc_led_classdev *leds; @@ -389,10 +395,11 @@ extern char igc_driver_name[]; #define IGC_FLAG_TSN_QBV_ENABLED BIT(17) #define IGC_FLAG_TSN_QAV_ENABLED BIT(18) #define IGC_FLAG_TSN_LEGACY_ENABLED BIT(19) +#define IGC_FLAG_TSN_PREEMPT_ENABLED BIT(20) =20 #define IGC_FLAG_TSN_ANY_ENABLED \ (IGC_FLAG_TSN_QBV_ENABLED | IGC_FLAG_TSN_QAV_ENABLED | \ - IGC_FLAG_TSN_LEGACY_ENABLED) + IGC_FLAG_TSN_LEGACY_ENABLED | IGC_FLAG_TSN_PREEMPT_ENABLED) =20 #define IGC_FLAG_RSS_FIELD_IPV4_UDP BIT(6) #define IGC_FLAG_RSS_FIELD_IPV6_UDP BIT(7) @@ -736,7 +743,10 @@ struct igc_nfc_rule *igc_get_nfc_rule(struct igc_adapt= er *adapter, u32 location); int igc_add_nfc_rule(struct igc_adapter *adapter, struct igc_nfc_rule *rul= e); void igc_del_nfc_rule(struct igc_adapter *adapter, struct igc_nfc_rule *ru= le); +void igc_disable_empty_addr_recv(struct igc_adapter *adapter); +int igc_enable_empty_addr_recv(struct igc_adapter *adapter); struct igc_ring *igc_get_tx_ring(struct igc_adapter *adapter, int cpu); +void igc_flush_tx_descriptors(struct igc_ring *ring); void igc_ptp_init(struct igc_adapter *adapter); void igc_ptp_reset(struct igc_adapter *adapter); void igc_ptp_suspend(struct igc_adapter *adapter); diff --git a/drivers/net/ethernet/intel/igc/igc_base.h b/drivers/net/ethern= et/intel/igc/igc_base.h index bf8cdfbba9ff..6320eabb72fe 100644 --- a/drivers/net/ethernet/intel/igc/igc_base.h +++ b/drivers/net/ethernet/intel/igc/igc_base.h @@ -49,6 +49,7 @@ struct igc_adv_tx_context_desc { #define IGC_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor extension (1=3DAdv) = */ #define IGC_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */ #define IGC_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */ +#define IGC_ADVTXD_PAYLEN_MASK 0XFFFFC000 /* Adv desc PAYLEN mask */ #define IGC_ADVTXD_PAYLEN_SHIFT 14 /* Adv desc PAYLEN shift */ =20 #define IGC_RAR_ENTRIES 16 diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/eth= ernet/intel/igc/igc_defines.h index b19ac6f30dac..22db1de02964 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -308,6 +308,8 @@ #define IGC_TXD_DTYP_C 0x00000000 /* Context Descriptor */ #define IGC_TXD_POPTS_IXSM 0x01 /* Insert IP checksum */ #define IGC_TXD_POPTS_TXSM 0x02 /* Insert TCP/UDP checksum */ +#define IGC_TXD_POPTS_SMD_MASK 0x3000 /* Indicates whether it's SMD-V = or SMD-R */ + #define IGC_TXD_CMD_EOP 0x01000000 /* End of Packet */ #define IGC_TXD_CMD_IC 0x04000000 /* Insert Checksum */ #define IGC_TXD_CMD_DEXT 0x20000000 /* Desc extension (0 =3D legacy) */ @@ -363,6 +365,8 @@ #define IGC_SRRCTL_TIMER0SEL(timer) (((timer) & 0x3) << 17) =20 /* Receive Descriptor bit definitions */ +#define IGC_RXD_STAT_SMD_TYPE_V 0x01 /* SMD-V Packet */ +#define IGC_RXD_STAT_SMD_TYPE_R 0x02 /* SMD-R Packet */ #define IGC_RXD_STAT_EOP 0x02 /* End of Packet */ #define IGC_RXD_STAT_IXSM 0x04 /* Ignore checksum */ #define IGC_RXD_STAT_UDPCS 0x10 /* UDP xsum calculated */ @@ -372,7 +376,8 @@ #define IGC_RXDEXT_STATERR_LB 0x00040000 =20 /* Advanced Receive Descriptor bit definitions */ -#define IGC_RXDADV_STAT_TSIP 0x08000 /* timestamp in packet */ +#define IGC_RXDADV_STAT_SMD_TYPE_MASK 0x06000 +#define IGC_RXDADV_STAT_TSIP 0x08000 /* timestamp in packet */ =20 #define IGC_RXDEXT_STATERR_L4E 0x20000000 #define IGC_RXDEXT_STATERR_IPE 0x40000000 @@ -543,6 +548,7 @@ =20 /* Transmit Scheduling */ #define IGC_TQAVCTRL_TRANSMIT_MODE_TSN 0x00000001 +#define IGC_TQAVCTRL_PREEMPT_ENA 0x00000002 #define IGC_TQAVCTRL_ENHANCED_QAV 0x00000008 #define IGC_TQAVCTRL_FUTSCDDIS 0x00000080 =20 diff --git a/drivers/net/ethernet/intel/igc/igc_ethtool.c b/drivers/net/eth= ernet/intel/igc/igc_ethtool.c index 817838677817..b64d5c6c1d20 100644 --- a/drivers/net/ethernet/intel/igc/igc_ethtool.c +++ b/drivers/net/ethernet/intel/igc/igc_ethtool.c @@ -8,6 +8,7 @@ =20 #include "igc.h" #include "igc_diag.h" +#include "igc_tsn.h" =20 /* forward declaration */ struct igc_stats { @@ -1781,6 +1782,25 @@ static int igc_ethtool_set_eee(struct net_device *ne= tdev, return 0; } =20 +static int igc_ethtool_set_mm(struct net_device *netdev, + struct ethtool_mm_cfg *cmd, + struct netlink_ext_ack *extack) +{ + struct igc_adapter *adapter =3D netdev_priv(netdev); + struct igc_fpe_t *fpe =3D &adapter->fpe; + + if (fpe->mmsv.pmac_enabled !=3D cmd->pmac_enabled) { + if (cmd->pmac_enabled) + static_branch_inc(&igc_fpe_enabled); + else + static_branch_dec(&igc_fpe_enabled); + } + + ethtool_mmsv_set_mm(&fpe->mmsv, cmd); + + return igc_tsn_offload_apply(adapter); +} + static int igc_ethtool_get_link_ksettings(struct net_device *netdev, struct ethtool_link_ksettings *cmd) { @@ -2076,6 +2096,7 @@ static const struct ethtool_ops igc_ethtool_ops =3D { .get_link_ksettings =3D igc_ethtool_get_link_ksettings, .set_link_ksettings =3D igc_ethtool_set_link_ksettings, .self_test =3D igc_ethtool_diag_test, + .set_mm =3D igc_ethtool_set_mm, }; =20 void igc_ethtool_set_ops(struct net_device *netdev) diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethern= et/intel/igc/igc_main.c index db4a36afcec6..a9f40fffc4fd 100644 --- a/drivers/net/ethernet/intel/igc/igc_main.c +++ b/drivers/net/ethernet/intel/igc/igc_main.c @@ -2528,7 +2528,7 @@ static int igc_xdp_run_prog(struct igc_adapter *adapt= er, struct xdp_buff *xdp) } =20 /* This function assumes __netif_tx_lock is held by the caller. */ -static void igc_flush_tx_descriptors(struct igc_ring *ring) +void igc_flush_tx_descriptors(struct igc_ring *ring) { /* Once tail pointer is updated, hardware can fetch the descriptors * any time so we issue a write membar here to ensure all memory @@ -2617,6 +2617,15 @@ static int igc_clean_rx_irq(struct igc_q_vector *q_v= ector, const int budget) size -=3D IGC_TS_HDR_LEN; } =20 + if (igc_fpe_is_pmac_enabled(adapter) && + igc_fpe_is_verify_or_response(rx_desc, size, pktbuf)) { + igc_fpe_lp_event_status(rx_desc, &adapter->fpe.mmsv); + /* Advance the ring next-to-clean */ + igc_is_non_eop(rx_ring, rx_desc); + cleaned_count++; + continue; + } + if (!skb) { xdp_init_buff(&ctx.xdp, truesize, &rx_ring->xdp_rxq); xdp_prepare_buff(&ctx.xdp, pktbuf - igc_rx_offset(rx_ring), @@ -3064,6 +3073,11 @@ static bool igc_clean_tx_irq(struct igc_q_vector *q_= vector, int napi_budget) if (!(eop_desc->wb.status & cpu_to_le32(IGC_TXD_STAT_DD))) break; =20 + if (igc_fpe_is_pmac_enabled(adapter) && + igc_fpe_transmitted_smd_v(tx_desc)) + ethtool_mmsv_event_handle(&adapter->fpe.mmsv, + ETHTOOL_MMSV_LD_SENT_VERIFY_MPACKET); + /* Hold the completions while there's a pending tx hardware * timestamp request from XDP Tx metadata. */ @@ -3955,6 +3969,30 @@ static int igc_uc_unsync(struct net_device *netdev, = const unsigned char *addr) return 0; } =20 +/** + * igc_enable_empty_addr_recv - Enable Rx of packets with all-zeroes MAC a= ddress + * @adapter: Pointer to the igc_adapter structure. + * + * Frame preemption verification requires that packets with the all-zeroes + * MAC address are allowed to be received by the driver. This function add= s the + * all-zeroes destination address to the list of acceptable addresses. + * + * Return: 0 on success, negative value otherwise. + */ +int igc_enable_empty_addr_recv(struct igc_adapter *adapter) +{ + u8 empty[ETH_ALEN] =3D {}; + + return igc_add_mac_filter(adapter, IGC_MAC_FILTER_TYPE_DST, empty, -1); +} + +void igc_disable_empty_addr_recv(struct igc_adapter *adapter) +{ + u8 empty[ETH_ALEN] =3D {}; + + igc_del_mac_filter(adapter, IGC_MAC_FILTER_TYPE_DST, empty); +} + /** * igc_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set * @netdev: network interface device structure @@ -5230,6 +5268,9 @@ void igc_down(struct igc_adapter *adapter) igc_disable_all_tx_rings_hw(adapter); igc_clean_all_tx_rings(adapter); igc_clean_all_rx_rings(adapter); + + if (adapter->fpe.mmsv.pmac_enabled) + ethtool_mmsv_stop(&adapter->fpe.mmsv); } =20 void igc_reinit_locked(struct igc_adapter *adapter) @@ -5754,6 +5795,10 @@ static void igc_watchdog_task(struct work_struct *wo= rk) */ igc_tsn_adjust_txtime_offset(adapter); =20 + if (adapter->fpe.mmsv.pmac_enabled) + ethtool_mmsv_link_state_handle(&adapter->fpe.mmsv, + true); + if (adapter->link_speed !=3D SPEED_1000) goto no_wait; =20 @@ -5789,6 +5834,10 @@ static void igc_watchdog_task(struct work_struct *wo= rk) netdev_info(netdev, "NIC Link is Down\n"); netif_carrier_off(netdev); =20 + if (adapter->fpe.mmsv.pmac_enabled) + ethtool_mmsv_link_state_handle(&adapter->fpe.mmsv, + false); + /* link state has changed, schedule phy info update */ if (!test_bit(__IGC_DOWN, &adapter->state)) mod_timer(&adapter->phy_info_timer, @@ -7109,6 +7158,8 @@ static int igc_probe(struct pci_dev *pdev, =20 igc_tsn_clear_schedule(adapter); =20 + igc_fpe_init(adapter); + /* reset the hardware with the new settings */ igc_reset(adapter); =20 diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/etherne= t/intel/igc/igc_tsn.c index f0213cfce07d..0a2c747fde2d 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -2,9 +2,135 @@ /* Copyright (c) 2019 Intel Corporation */ =20 #include "igc.h" +#include "igc_base.h" #include "igc_hw.h" #include "igc_tsn.h" =20 +DEFINE_STATIC_KEY_FALSE(igc_fpe_enabled); + +static int igc_fpe_init_smd_frame(struct igc_ring *ring, + struct igc_tx_buffer *buffer, + struct sk_buff *skb) +{ + dma_addr_t dma =3D dma_map_single(ring->dev, skb->data, skb->len, + DMA_TO_DEVICE); + + if (dma_mapping_error(ring->dev, dma)) { + netdev_err_once(ring->netdev, "Failed to map DMA for TX\n"); + return -ENOMEM; + } + + buffer->skb =3D skb; + buffer->protocol =3D 0; + buffer->bytecount =3D skb->len; + buffer->gso_segs =3D 1; + buffer->time_stamp =3D jiffies; + dma_unmap_len_set(buffer, len, skb->len); + dma_unmap_addr_set(buffer, dma, dma); + + return 0; +} + +static int igc_fpe_init_tx_descriptor(struct igc_ring *ring, + struct sk_buff *skb, + enum igc_txd_popts_type type) +{ + u32 cmd_type, olinfo_status =3D 0; + struct igc_tx_buffer *buffer; + union igc_adv_tx_desc *desc; + int err; + + if (!igc_desc_unused(ring)) + return -EBUSY; + + buffer =3D &ring->tx_buffer_info[ring->next_to_use]; + err =3D igc_fpe_init_smd_frame(ring, buffer, skb); + if (err) + return err; + + cmd_type =3D IGC_ADVTXD_DTYP_DATA | IGC_ADVTXD_DCMD_DEXT | + IGC_ADVTXD_DCMD_IFCS | IGC_TXD_DCMD | + buffer->bytecount; + + olinfo_status |=3D FIELD_PREP(IGC_ADVTXD_PAYLEN_MASK, buffer->bytecount); + + switch (type) { + case SMD_V: + case SMD_R: + olinfo_status |=3D FIELD_PREP(IGC_TXD_POPTS_SMD_MASK, type); + break; + } + + desc =3D IGC_TX_DESC(ring, ring->next_to_use); + desc->read.cmd_type_len =3D cpu_to_le32(cmd_type); + desc->read.olinfo_status =3D cpu_to_le32(olinfo_status); + desc->read.buffer_addr =3D cpu_to_le64(dma_unmap_addr(buffer, dma)); + + netdev_tx_sent_queue(txring_txq(ring), skb->len); + + buffer->next_to_watch =3D desc; + ring->next_to_use =3D (ring->next_to_use + 1) % ring->count; + + return 0; +} + +static int igc_fpe_xmit_smd_frame(struct igc_adapter *adapter, + enum igc_txd_popts_type type) +{ + int cpu =3D smp_processor_id(); + struct netdev_queue *nq; + struct igc_ring *ring; + struct sk_buff *skb; + int err; + + ring =3D igc_get_tx_ring(adapter, cpu); + nq =3D txring_txq(ring); + + skb =3D alloc_skb(SMD_FRAME_SIZE, GFP_ATOMIC); + if (!skb) + return -ENOMEM; + + skb_put_zero(skb, SMD_FRAME_SIZE); + + __netif_tx_lock(nq, cpu); + + err =3D igc_fpe_init_tx_descriptor(ring, skb, type); + igc_flush_tx_descriptors(ring); + + __netif_tx_unlock(nq); + + return err; +} + +static void igc_fpe_send_mpacket(struct ethtool_mmsv *mmsv, + enum ethtool_mpacket type) +{ + struct igc_fpe_t *fpe =3D container_of(mmsv, struct igc_fpe_t, mmsv); + struct igc_adapter *adapter; + int err; + + adapter =3D container_of(fpe, struct igc_adapter, fpe); + + if (type =3D=3D ETHTOOL_MPACKET_VERIFY) { + err =3D igc_fpe_xmit_smd_frame(adapter, SMD_V); + if (err && net_ratelimit()) + netdev_err(adapter->netdev, "Error sending SMD-V\n"); + } else if (type =3D=3D ETHTOOL_MPACKET_RESPONSE) { + err =3D igc_fpe_xmit_smd_frame(adapter, SMD_R); + if (err && net_ratelimit()) + netdev_err(adapter->netdev, "Error sending SMD-R frame\n"); + } +} + +static const struct ethtool_mmsv_ops igc_mmsv_ops =3D { + .send_mpacket =3D igc_fpe_send_mpacket, +}; + +void igc_fpe_init(struct igc_adapter *adapter) +{ + ethtool_mmsv_init(&adapter->fpe.mmsv, adapter->netdev, &igc_mmsv_ops); +} + static bool is_any_launchtime(struct igc_adapter *adapter) { int i; @@ -49,6 +175,9 @@ static unsigned int igc_tsn_new_flags(struct igc_adapter= *adapter) if (adapter->strict_priority_enable) new_flags |=3D IGC_FLAG_TSN_LEGACY_ENABLED; =20 + if (adapter->fpe.mmsv.pmac_enabled) + new_flags |=3D IGC_FLAG_TSN_PREEMPT_ENABLED; + return new_flags; } =20 @@ -148,7 +277,8 @@ static int igc_tsn_disable_offload(struct igc_adapter *= adapter) =20 tqavctrl =3D rd32(IGC_TQAVCTRL); tqavctrl &=3D ~(IGC_TQAVCTRL_TRANSMIT_MODE_TSN | - IGC_TQAVCTRL_ENHANCED_QAV | IGC_TQAVCTRL_FUTSCDDIS); + IGC_TQAVCTRL_ENHANCED_QAV | IGC_TQAVCTRL_FUTSCDDIS | + IGC_TQAVCTRL_PREEMPT_ENA); =20 wr32(IGC_TQAVCTRL, tqavctrl); =20 @@ -370,10 +500,14 @@ static int igc_tsn_enable_offload(struct igc_adapter = *adapter) wr32(IGC_TXQCTL(i), txqctl); } =20 - tqavctrl =3D rd32(IGC_TQAVCTRL) & ~IGC_TQAVCTRL_FUTSCDDIS; + tqavctrl =3D rd32(IGC_TQAVCTRL) & ~(IGC_TQAVCTRL_FUTSCDDIS | + IGC_TQAVCTRL_PREEMPT_ENA); =20 tqavctrl |=3D IGC_TQAVCTRL_TRANSMIT_MODE_TSN | IGC_TQAVCTRL_ENHANCED_QAV; =20 + if (adapter->fpe.mmsv.pmac_enabled) + tqavctrl |=3D IGC_TQAVCTRL_PREEMPT_ENA; + adapter->qbv_count++; =20 cycle =3D adapter->cycle_time; @@ -434,6 +568,14 @@ int igc_tsn_reset(struct igc_adapter *adapter) unsigned int new_flags; int err =3D 0; =20 + if (adapter->fpe.mmsv.pmac_enabled) { + err =3D igc_enable_empty_addr_recv(adapter); + if (err && net_ratelimit()) + netdev_err(adapter->netdev, "Error adding empty address to MAC filter\n= "); + } else { + igc_disable_empty_addr_recv(adapter); + } + new_flags =3D igc_tsn_new_flags(adapter); =20 if (!(new_flags & IGC_FLAG_TSN_ANY_ENABLED)) diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.h b/drivers/net/etherne= t/intel/igc/igc_tsn.h index 98ec845a86bf..a2534228cc0e 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.h +++ b/drivers/net/ethernet/intel/igc/igc_tsn.h @@ -4,9 +4,62 @@ #ifndef _IGC_TSN_H_ #define _IGC_TSN_H_ =20 +#define SMD_FRAME_SIZE 60 + +enum igc_txd_popts_type { + SMD_V =3D 0x01, + SMD_R =3D 0x02, +}; + +DECLARE_STATIC_KEY_FALSE(igc_fpe_enabled); + +void igc_fpe_init(struct igc_adapter *adapter); +u32 igc_fpe_get_supported_frag_size(u32 user_frag_size); int igc_tsn_offload_apply(struct igc_adapter *adapter); int igc_tsn_reset(struct igc_adapter *adapter); void igc_tsn_adjust_txtime_offset(struct igc_adapter *adapter); bool igc_tsn_is_taprio_activated_by_user(struct igc_adapter *adapter); =20 +static inline bool igc_fpe_is_pmac_enabled(struct igc_adapter *adapter) +{ + return static_branch_unlikely(&igc_fpe_enabled) && + adapter->fpe.mmsv.pmac_enabled; +} + +static inline bool igc_fpe_is_verify_or_response(union igc_adv_rx_desc *rx= _desc, + unsigned int size, void *pktbuf) +{ + u32 status_error =3D le32_to_cpu(rx_desc->wb.upper.status_error); + static const u8 zero_payload[SMD_FRAME_SIZE] =3D {0}; + int smd; + + smd =3D FIELD_GET(IGC_RXDADV_STAT_SMD_TYPE_MASK, status_error); + + return (smd =3D=3D IGC_RXD_STAT_SMD_TYPE_V || smd =3D=3D IGC_RXD_STAT_SMD= _TYPE_R) && + size =3D=3D SMD_FRAME_SIZE && + !memcmp(pktbuf, zero_payload, SMD_FRAME_SIZE); /* Buffer is all zeros */ +} + +static inline void igc_fpe_lp_event_status(union igc_adv_rx_desc *rx_desc, + struct ethtool_mmsv *mmsv) +{ + u32 status_error =3D le32_to_cpu(rx_desc->wb.upper.status_error); + int smd; + + smd =3D FIELD_GET(IGC_RXDADV_STAT_SMD_TYPE_MASK, status_error); + + if (smd =3D=3D IGC_RXD_STAT_SMD_TYPE_V) + ethtool_mmsv_event_handle(mmsv, ETHTOOL_MMSV_LP_SENT_VERIFY_MPACKET); + else if (smd =3D=3D IGC_RXD_STAT_SMD_TYPE_R) + ethtool_mmsv_event_handle(mmsv, ETHTOOL_MMSV_LP_SENT_RESPONSE_MPACKET); +} + +static inline bool igc_fpe_transmitted_smd_v(union igc_adv_tx_desc *tx_des= c) +{ + u32 olinfo_status =3D le32_to_cpu(tx_desc->read.olinfo_status); + u8 smd =3D FIELD_GET(IGC_TXD_POPTS_SMD_MASK, olinfo_status); + + return smd =3D=3D SMD_V; +} + #endif /* _IGC_BASE_H */ --=20 2.34.1 From nobody Sun Feb 8 01:31:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5636F24BBFD; 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a="45795113" X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="45795113" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2025 05:02:01 -0800 X-CSE-ConnectionGUID: gsGF0Ys0QYy8/BfBgQNbIg== X-CSE-MsgGUID: GDYzCSjXQsWja89CicvqQA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="123277137" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa005.fm.intel.com with ESMTP; 05 Mar 2025 05:01:53 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Simon Horman , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Furong Xu <0x1207@gmail.com>, Russell King , Vladimir Oltean , Serge Semin , Xiaolei Wang , Suraj Jaiswal , Kory Maincent , Gal Pressman , Jesper Nilsson , Choong Yong Liang , Chwee-Lin Choong , Faizal Rahim , Kunihiko Hayashi , Vinicius Costa Gomes , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, bpf@vger.kernel.org Subject: [PATCH iwl-next v8 08/11] igc: add support to set tx-min-frag-size Date: Wed, 5 Mar 2025 08:00:23 -0500 Message-Id: <20250305130026.642219-9-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> References: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support to set tx-min-frag-size via set_mm callback in igc. Increase the max limit of tx-ming-frag-size in ethtool from 252 to 256 since i225/6 value range is 64, 128, 192 and 256. Co-developed-by: Vinicius Costa Gomes Signed-off-by: Vinicius Costa Gomes Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc.h | 1 + drivers/net/ethernet/intel/igc/igc_defines.h | 1 + drivers/net/ethernet/intel/igc/igc_ethtool.c | 5 +++ drivers/net/ethernet/intel/igc/igc_tsn.c | 37 ++++++++++++++++++-- drivers/net/ethernet/intel/igc/igc_tsn.h | 2 +- net/ethtool/mm.c | 2 +- 6 files changed, 43 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/in= tel/igc/igc.h index d9ecb7cf80c9..4dfd133b4d6f 100644 --- a/drivers/net/ethernet/intel/igc/igc.h +++ b/drivers/net/ethernet/intel/igc/igc.h @@ -42,6 +42,7 @@ void igc_ethtool_set_ops(struct net_device *); =20 struct igc_fpe_t { struct ethtool_mmsv mmsv; + u32 tx_min_frag_size; }; =20 enum igc_mac_filter_type { diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/eth= ernet/intel/igc/igc_defines.h index 22db1de02964..038ee89f1e08 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -551,6 +551,7 @@ #define IGC_TQAVCTRL_PREEMPT_ENA 0x00000002 #define IGC_TQAVCTRL_ENHANCED_QAV 0x00000008 #define IGC_TQAVCTRL_FUTSCDDIS 0x00000080 +#define IGC_TQAVCTRL_MIN_FRAG_MASK 0x0000C000 =20 #define IGC_TXQCTL_QUEUE_MODE_LAUNCHT 0x00000001 #define IGC_TXQCTL_STRICT_CYCLE 0x00000002 diff --git a/drivers/net/ethernet/intel/igc/igc_ethtool.c b/drivers/net/eth= ernet/intel/igc/igc_ethtool.c index b64d5c6c1d20..529654ccd83f 100644 --- a/drivers/net/ethernet/intel/igc/igc_ethtool.c +++ b/drivers/net/ethernet/intel/igc/igc_ethtool.c @@ -1789,6 +1789,11 @@ static int igc_ethtool_set_mm(struct net_device *net= dev, struct igc_adapter *adapter =3D netdev_priv(netdev); struct igc_fpe_t *fpe =3D &adapter->fpe; =20 + fpe->tx_min_frag_size =3D igc_fpe_get_supported_frag_size(cmd->tx_min_fra= g_size); + if (fpe->tx_min_frag_size !=3D cmd->tx_min_frag_size) + NL_SET_ERR_MSG_MOD(extack, + "tx-min-frag-size value set is unsupported. Rounded up to supported= value (64, 128, 192, 256)"); + if (fpe->mmsv.pmac_enabled !=3D cmd->pmac_enabled) { if (cmd->pmac_enabled) static_branch_inc(&igc_fpe_enabled); diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/etherne= t/intel/igc/igc_tsn.c index 0a2c747fde2d..2ec5909bf8b0 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -6,6 +6,12 @@ #include "igc_hw.h" #include "igc_tsn.h" =20 +#define MIN_MULTPLIER_TX_MIN_FRAG 0 +#define MAX_MULTPLIER_TX_MIN_FRAG 3 +/* Frag size is based on the Section 8.12.2 of the SW User Manual */ +#define TX_MIN_FRAG_SIZE 64 +#define TX_MAX_FRAG_SIZE (TX_MIN_FRAG_SIZE * (MAX_MULTPLIER_TX_MIN_FRAG + = 1)) + DEFINE_STATIC_KEY_FALSE(igc_fpe_enabled); =20 static int igc_fpe_init_smd_frame(struct igc_ring *ring, @@ -128,6 +134,7 @@ static const struct ethtool_mmsv_ops igc_mmsv_ops =3D { =20 void igc_fpe_init(struct igc_adapter *adapter) { + adapter->fpe.tx_min_frag_size =3D TX_MIN_FRAG_SIZE; ethtool_mmsv_init(&adapter->fpe.mmsv, adapter->netdev, &igc_mmsv_ops); } =20 @@ -278,7 +285,7 @@ static int igc_tsn_disable_offload(struct igc_adapter *= adapter) tqavctrl =3D rd32(IGC_TQAVCTRL); tqavctrl &=3D ~(IGC_TQAVCTRL_TRANSMIT_MODE_TSN | IGC_TQAVCTRL_ENHANCED_QAV | IGC_TQAVCTRL_FUTSCDDIS | - IGC_TQAVCTRL_PREEMPT_ENA); + IGC_TQAVCTRL_PREEMPT_ENA | IGC_TQAVCTRL_MIN_FRAG_MASK); =20 wr32(IGC_TQAVCTRL, tqavctrl); =20 @@ -324,12 +331,34 @@ static void igc_tsn_set_retx_qbvfullthreshold(struct = igc_adapter *adapter) wr32(IGC_RETX_CTL, retxctl); } =20 +static u8 igc_fpe_get_frag_size_mult(const struct igc_fpe_t *fpe) +{ + u8 mult =3D (fpe->tx_min_frag_size / TX_MIN_FRAG_SIZE) - 1; + + return clamp_t(u8, mult, MIN_MULTPLIER_TX_MIN_FRAG, + MAX_MULTPLIER_TX_MIN_FRAG); +} + +u32 igc_fpe_get_supported_frag_size(u32 frag_size) +{ + const u32 supported_sizes[] =3D {64, 128, 192, 256}; + + /* Find the smallest supported size that is >=3D frag_size */ + for (int i =3D 0; i < ARRAY_SIZE(supported_sizes); i++) { + if (frag_size <=3D supported_sizes[i]) + return supported_sizes[i]; + } + + return TX_MAX_FRAG_SIZE; /* Should not happen, value > 256 is blocked by = ethtool */ +} + static int igc_tsn_enable_offload(struct igc_adapter *adapter) { struct igc_hw *hw =3D &adapter->hw; u32 tqavctrl, baset_l, baset_h; u32 sec, nsec, cycle, rxpbs; ktime_t base_time, systim; + u32 frag_size_mult; int i; =20 wr32(IGC_TSAUXC, 0); @@ -501,13 +530,15 @@ static int igc_tsn_enable_offload(struct igc_adapter = *adapter) } =20 tqavctrl =3D rd32(IGC_TQAVCTRL) & ~(IGC_TQAVCTRL_FUTSCDDIS | - IGC_TQAVCTRL_PREEMPT_ENA); - + IGC_TQAVCTRL_PREEMPT_ENA | IGC_TQAVCTRL_MIN_FRAG_MASK); tqavctrl |=3D IGC_TQAVCTRL_TRANSMIT_MODE_TSN | IGC_TQAVCTRL_ENHANCED_QAV; =20 if (adapter->fpe.mmsv.pmac_enabled) tqavctrl |=3D IGC_TQAVCTRL_PREEMPT_ENA; =20 + frag_size_mult =3D igc_fpe_get_frag_size_mult(&adapter->fpe); + tqavctrl |=3D FIELD_PREP(IGC_TQAVCTRL_MIN_FRAG_MASK, frag_size_mult); + adapter->qbv_count++; =20 cycle =3D adapter->cycle_time; diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.h b/drivers/net/etherne= t/intel/igc/igc_tsn.h index a2534228cc0e..975f4e38836e 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.h +++ b/drivers/net/ethernet/intel/igc/igc_tsn.h @@ -14,7 +14,7 @@ enum igc_txd_popts_type { DECLARE_STATIC_KEY_FALSE(igc_fpe_enabled); =20 void igc_fpe_init(struct igc_adapter *adapter); -u32 igc_fpe_get_supported_frag_size(u32 user_frag_size); +u32 igc_fpe_get_supported_frag_size(u32 frag_size); int igc_tsn_offload_apply(struct igc_adapter *adapter); int igc_tsn_reset(struct igc_adapter *adapter); void igc_tsn_adjust_txtime_offset(struct igc_adapter *adapter); diff --git a/net/ethtool/mm.c b/net/ethtool/mm.c index ad9b40034003..4c395cd949ab 100644 --- a/net/ethtool/mm.c +++ b/net/ethtool/mm.c @@ -153,7 +153,7 @@ const struct nla_policy ethnl_mm_set_policy[ETHTOOL_A_M= M_MAX + 1] =3D { [ETHTOOL_A_MM_VERIFY_TIME] =3D NLA_POLICY_RANGE(NLA_U32, 1, 128), [ETHTOOL_A_MM_TX_ENABLED] =3D NLA_POLICY_MAX(NLA_U8, 1), [ETHTOOL_A_MM_PMAC_ENABLED] =3D NLA_POLICY_MAX(NLA_U8, 1), - [ETHTOOL_A_MM_TX_MIN_FRAG_SIZE] =3D NLA_POLICY_RANGE(NLA_U32, 60, 252), + [ETHTOOL_A_MM_TX_MIN_FRAG_SIZE] =3D NLA_POLICY_RANGE(NLA_U32, 60, 256), }; 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X-CSE-ConnectionGUID: fj+AD7xjQ2aKiVI29fglAw== X-CSE-MsgGUID: VhxNG5OjQOCzhQdUmeCXSQ== X-IronPort-AV: E=McAfee;i="6700,10204,11363"; a="45795154" X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="45795154" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2025 05:02:08 -0800 X-CSE-ConnectionGUID: 3nGwylJDTZm5Lp7qLCxNig== X-CSE-MsgGUID: 6iBPBwpqR8iwZKDA+S9D8Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="123277170" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa005.fm.intel.com with ESMTP; 05 Mar 2025 05:02:00 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Simon Horman , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Furong Xu <0x1207@gmail.com>, Russell King , Vladimir Oltean , Serge Semin , Xiaolei Wang , Suraj Jaiswal , Kory Maincent , Gal Pressman , Jesper Nilsson , Choong Yong Liang , Chwee-Lin Choong , Faizal Rahim , Kunihiko Hayashi , Vinicius Costa Gomes , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, bpf@vger.kernel.org Subject: [PATCH iwl-next v8 09/11] igc: block setting preemptible traffic class in taprio Date: Wed, 5 Mar 2025 08:00:24 -0500 Message-Id: <20250305130026.642219-10-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> References: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Since preemptible tc implementation is not ready yet, block it from being set in taprio. The existing code already blocks it in mqprio. Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc_main.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethern= et/intel/igc/igc_main.c index a9f40fffc4fd..6db926bc9d11 100644 --- a/drivers/net/ethernet/intel/igc/igc_main.c +++ b/drivers/net/ethernet/intel/igc/igc_main.c @@ -6407,6 +6407,10 @@ static int igc_save_qbv_schedule(struct igc_adapter = *adapter, if (!validate_schedule(adapter, qopt)) return -EINVAL; =20 + /* preemptible isn't supported yet */ + if (qopt->mqprio.preemptible_tcs) + return -EOPNOTSUPP; + igc_ptp_read(adapter, &now); =20 if (igc_tsn_is_taprio_activated_by_user(adapter) && --=20 2.34.1 From nobody Sun Feb 8 01:31:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6FCC0248872; Wed, 5 Mar 2025 13:02:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741179736; cv=none; b=kzSF0z3fG/Kj5LmsUZaFmwGr47kwXwv+6TP9c/ueA+BboaspUE7SYJfabxKHENRyFrXkl7PrL2akfdbm408MHjjdkgJ2VxWe9OqxTunfmZ6hnMZiBWdUZvd8j0BtAHAYi4SQJ7bstCpil2UpHuNMfE8JaJ+HkD0xQRvU5w6J2n4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741179736; c=relaxed/simple; bh=53bjcwBoOZAPsqRNQ3fKEphCjwEGIYzxF8r+fwuUfvM=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=D3Zq2TFYDZpcZ5P+Oop5lBfoh2OuOWVItdoaBm+sk6uRb6gj1eEerGt8YDPAN3E7CM8pGYQHQ6kpFfYX0tUzIqsjjonYcyQnWMRynwv3g8FL5c1ITxvGPZmbDLhqgQCNhf4q9/GDs/rCNdUvsUiQopd5phIwpAEg0CPrcyuj9lw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=cs/lZpMY; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="cs/lZpMY" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741179736; x=1772715736; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=53bjcwBoOZAPsqRNQ3fKEphCjwEGIYzxF8r+fwuUfvM=; b=cs/lZpMY9RikMPugTd5f8nJjpvJqjAwQ4P2g2zID53UbdFkLF6Lt+6lJ XtDVBsl/ut+ag/U0qGoqqDga61anoVQA1E1FQNRxkN73vEX2s0SpqVBBU UU2iWV+eJeXPlO9KxOuSi1zUEW/aO2wDWDXl/TDx7FqmjRaO1x3FaPO51 W2fYQW3JVyGNjMuqnSDdXKmWS+E9gj2s2uRiXEaWJMVwgiZT544CkPgH4 yi7PHTEkpVVbbXOxM7Y62AO3YZ8HIyZl3HNTnvLBzdXs34dFy0vNUDYPx rUObhdjgNOqjxKogPVKYNlzijeDxzlleihjMpC9A82eUVknMOYAAA+HHp Q==; X-CSE-ConnectionGUID: dyE8ZVUZQHmlWbzdbfPdGQ== X-CSE-MsgGUID: EIp7AsKeQA+IlFlwAcpDiA== X-IronPort-AV: E=McAfee;i="6700,10204,11363"; a="45795192" X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="45795192" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2025 05:02:15 -0800 X-CSE-ConnectionGUID: PyTt62bcRWu9OQ7sMqOaNw== X-CSE-MsgGUID: ibYl+DxXRgC42qezk0BUYg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="123277205" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa005.fm.intel.com with ESMTP; 05 Mar 2025 05:02:07 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Simon Horman , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Furong Xu <0x1207@gmail.com>, Russell King , Vladimir Oltean , Serge Semin , Xiaolei Wang , Suraj Jaiswal , Kory Maincent , Gal Pressman , Jesper Nilsson , Choong Yong Liang , Chwee-Lin Choong , Faizal Rahim , Kunihiko Hayashi , Vinicius Costa Gomes , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, bpf@vger.kernel.org Subject: [PATCH iwl-next v8 10/11] igc: add support to get MAC Merge data via ethtool Date: Wed, 5 Mar 2025 08:00:25 -0500 Message-Id: <20250305130026.642219-11-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> References: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Implement "ethtool --show-mm" callback for IGC. Tested with command: $ ethtool --show-mm enp1s0. MAC Merge layer state for enp1s0: pMAC enabled: on TX enabled: on TX active: on TX minimum fragment size: 64 RX minimum fragment size: 60 Verify enabled: on Verify time: 128 Max verify time: 128 Verification status: SUCCEEDED Verified that the fields value are retrieved correctly. Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc_ethtool.c | 14 ++++++++++++++ drivers/net/ethernet/intel/igc/igc_tsn.h | 1 + 2 files changed, 15 insertions(+) diff --git a/drivers/net/ethernet/intel/igc/igc_ethtool.c b/drivers/net/eth= ernet/intel/igc/igc_ethtool.c index 529654ccd83f..fd4b4b332309 100644 --- a/drivers/net/ethernet/intel/igc/igc_ethtool.c +++ b/drivers/net/ethernet/intel/igc/igc_ethtool.c @@ -1782,6 +1782,19 @@ static int igc_ethtool_set_eee(struct net_device *ne= tdev, return 0; } =20 +static int igc_ethtool_get_mm(struct net_device *netdev, + struct ethtool_mm_state *cmd) +{ + struct igc_adapter *adapter =3D netdev_priv(netdev); + struct igc_fpe_t *fpe =3D &adapter->fpe; + + ethtool_mmsv_get_mm(&fpe->mmsv, cmd); + cmd->tx_min_frag_size =3D fpe->tx_min_frag_size; + cmd->rx_min_frag_size =3D IGC_RX_MIN_FRAG_SIZE; + + return 0; +} + static int igc_ethtool_set_mm(struct net_device *netdev, struct ethtool_mm_cfg *cmd, struct netlink_ext_ack *extack) @@ -2101,6 +2114,7 @@ static const struct ethtool_ops igc_ethtool_ops =3D { .get_link_ksettings =3D igc_ethtool_get_link_ksettings, .set_link_ksettings =3D igc_ethtool_set_link_ksettings, .self_test =3D igc_ethtool_diag_test, + .get_mm =3D igc_ethtool_get_mm, .set_mm =3D igc_ethtool_set_mm, }; =20 diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.h b/drivers/net/etherne= t/intel/igc/igc_tsn.h index 975f4e38836e..2b885f98e720 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.h +++ b/drivers/net/ethernet/intel/igc/igc_tsn.h @@ -4,6 +4,7 @@ #ifndef _IGC_TSN_H_ #define _IGC_TSN_H_ =20 +#define IGC_RX_MIN_FRAG_SIZE 60 #define SMD_FRAME_SIZE 60 =20 enum igc_txd_popts_type { --=20 2.34.1 From nobody Sun Feb 8 01:31:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C128248873; Wed, 5 Mar 2025 13:02:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741179744; cv=none; b=NKz1zUV/ESlG6N0a3fCLHNs1tGCwGlFNyyXlhVbTNRfGmjDU8rG9iECQCBYFvuKjroxpWbuTMyn9WKI3Fs9c8dSFwpL/BvCs/fLGsnEtxtEkzcgr+X3ke8wOAl4hJORSEFKuHAO3IreuE/zaY5dcThU42/DSU2zuvNFRUFbqms8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741179744; c=relaxed/simple; bh=BrHOVPMRx5IUbt2TfaXsmHGE8YIjSq6KxkHt4pHZzf0=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=aXneI+cJ+3JIgCs8AIp7HKyIRBIHgRO5Q4snS056LCD8AOmbS1PJkh+aAYwDThH/Z0qLwCXPUTyNUcbUh1ECQGO7TYCbvshE0fXW3mX9xWoR4a84UarqoNBcqE/FpskQZ+aWJA5fcwQcS9luS3XhcOVWOW8jS6fcZJcR2O+kwR0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=fNvOgfiF; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="fNvOgfiF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741179744; x=1772715744; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=BrHOVPMRx5IUbt2TfaXsmHGE8YIjSq6KxkHt4pHZzf0=; b=fNvOgfiFPQgZaruMNOEcoBew5bZhoKZhWnV3+dYjGuw891PMH/mnSapQ Ix0HKwkCCPupAZldLVWv3B4GaBGsLKPvejTvCNHM2T5rx3MTUon4bbfP+ WCDOILiRdEOZBnQFBcNg6MUILsajqgTpXREbhV6OjwUGG2YZiTF/0AX3E I7/XChl48aXofQm+eGKJ7oVKVAebuT82SHz/W5OQhTVF29tz9qbtJAGaN 1gn88hFMLF9Rf4CkyBtqet2ijQEouBo9iamt3KkhZGsIoR7MXykIaN3Wa 6izDhnB21gqYCH/LfqrtMsTflLWlg+xQoHWm/7iJ0BHqiIVLsGfi+8ZkJ Q==; X-CSE-ConnectionGUID: ZdKbe75+RASfQXqxtKrqtA== X-CSE-MsgGUID: MzjNP+ZwS1awLDM0G6a58g== X-IronPort-AV: E=McAfee;i="6700,10204,11363"; a="45795236" X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="45795236" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2025 05:02:23 -0800 X-CSE-ConnectionGUID: i6Ozl++kSluBMOfRFUTQ5g== X-CSE-MsgGUID: arsaetUXQceVXXNA1GH2IA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,223,1736841600"; d="scan'208";a="123277236" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa005.fm.intel.com with ESMTP; 05 Mar 2025 05:02:15 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Simon Horman , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Furong Xu <0x1207@gmail.com>, Russell King , Vladimir Oltean , Serge Semin , Xiaolei Wang , Suraj Jaiswal , Kory Maincent , Gal Pressman , Jesper Nilsson , Choong Yong Liang , Chwee-Lin Choong , Faizal Rahim , Kunihiko Hayashi , Vinicius Costa Gomes , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, bpf@vger.kernel.org Subject: [PATCH iwl-next v8 11/11] igc: add support to get frame preemption statistics via ethtool Date: Wed, 5 Mar 2025 08:00:26 -0500 Message-Id: <20250305130026.642219-12-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> References: <20250305130026.642219-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Implemented "ethtool --include-statistics --show-mm" callback for IGC. Tested preemption scenario to check preemption statistics: 1) Trigger verification handshake on both boards: $ sudo ethtool --set-mm enp1s0 pmac-enabled on $ sudo ethtool --set-mm enp1s0 tx-enabled on $ sudo ethtool --set-mm enp1s0 verify-enabled on 2) Set preemptible or express queue in taprio for tx board: $ sudo tc qdisc replace dev enp1s0 parent root handle 100 taprio \ num_tc 4 map 3 2 1 0 3 3 3 3 3 3 3 3 3 3 3 3 \ queues 1@0 1@1 1@2 1@3 base-time 0 sched-entry S F 100000 \ fp E E P P 3) Send large size packets on preemptible queue 4) Send small size packets on express queue to preempt packets in preemptible queue 5) Show preemption statistics on the receiving board: $ ethtool --include-statistics --show-mm enp1s0 MAC Merge layer state for enp1s0: pMAC enabled: on TX enabled: on TX active: on TX minimum fragment size: 64 RX minimum fragment size: 60 Verify enabled: on Verify time: 128 Max verify time: 128 Verification status: SUCCEEDED Statistics: MACMergeFrameAssErrorCount: 0 MACMergeFrameSmdErrorCount: 0 MACMergeFrameAssOkCount: 511 MACMergeFragCountRx: 764 MACMergeFragCountTx: 0 MACMergeHoldCount: 0 Co-developed-by: Vinicius Costa Gomes Signed-off-by: Vinicius Costa Gomes Co-developed-by: Chwee-Lin Choong Signed-off-by: Chwee-Lin Choong Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc_ethtool.c | 39 ++++++++++++++++++++ drivers/net/ethernet/intel/igc/igc_regs.h | 16 ++++++++ 2 files changed, 55 insertions(+) diff --git a/drivers/net/ethernet/intel/igc/igc_ethtool.c b/drivers/net/eth= ernet/intel/igc/igc_ethtool.c index fd4b4b332309..1ed08a3fa78b 100644 --- a/drivers/net/ethernet/intel/igc/igc_ethtool.c +++ b/drivers/net/ethernet/intel/igc/igc_ethtool.c @@ -1819,6 +1819,44 @@ static int igc_ethtool_set_mm(struct net_device *net= dev, return igc_tsn_offload_apply(adapter); } =20 +/** + * igc_ethtool_get_frame_ass_error - Get the frame assembly error count. + * @reg_value: Register value for IGC_PRMEXCPRCNT + * Return: The count of frame assembly errors. + */ +static u64 igc_ethtool_get_frame_ass_error(u32 reg_value) +{ + u32 ooo_frame_cnt, ooo_frag_cnt; /* Out of order statistics */ + u32 miss_frame_frag_cnt; + + ooo_frame_cnt =3D FIELD_GET(IGC_PRMEXCPRCNT_OOO_FRAME_CNT, reg_value); + ooo_frag_cnt =3D FIELD_GET(IGC_PRMEXCPRCNT_OOO_FRAG_CNT, reg_value); + miss_frame_frag_cnt =3D FIELD_GET(IGC_PRMEXCPRCNT_MISS_FRAME_FRAG_CNT, re= g_value); + + return ooo_frame_cnt + ooo_frag_cnt + miss_frame_frag_cnt; +} + +static u64 igc_ethtool_get_frame_smd_error(u32 reg_value) +{ + return FIELD_GET(IGC_PRMEXCPRCNT_OOO_SMDC, reg_value); +} + +static void igc_ethtool_get_mm_stats(struct net_device *dev, + struct ethtool_mm_stats *stats) +{ + struct igc_adapter *adapter =3D netdev_priv(dev); + struct igc_hw *hw =3D &adapter->hw; + u32 reg_value; + + reg_value =3D rd32(IGC_PRMEXCPRCNT); + + stats->MACMergeFrameAssErrorCount =3D igc_ethtool_get_frame_ass_error(reg= _value); + stats->MACMergeFrameSmdErrorCount =3D igc_ethtool_get_frame_smd_error(reg= _value); + stats->MACMergeFrameAssOkCount =3D rd32(IGC_PRMPTDRCNT); + stats->MACMergeFragCountRx =3D rd32(IGC_PRMEVNTRCNT); + stats->MACMergeFragCountTx =3D rd32(IGC_PRMEVNTTCNT); +} + static int igc_ethtool_get_link_ksettings(struct net_device *netdev, struct ethtool_link_ksettings *cmd) { @@ -2116,6 +2154,7 @@ static const struct ethtool_ops igc_ethtool_ops =3D { .self_test =3D igc_ethtool_diag_test, .get_mm =3D igc_ethtool_get_mm, .set_mm =3D igc_ethtool_set_mm, + .get_mm_stats =3D igc_ethtool_get_mm_stats, }; =20 void igc_ethtool_set_ops(struct net_device *netdev) diff --git a/drivers/net/ethernet/intel/igc/igc_regs.h b/drivers/net/ethern= et/intel/igc/igc_regs.h index 12ddc5793651..f343c6bfc6be 100644 --- a/drivers/net/ethernet/intel/igc/igc_regs.h +++ b/drivers/net/ethernet/intel/igc/igc_regs.h @@ -222,6 +222,22 @@ =20 #define IGC_FTQF(_n) (0x059E0 + (4 * (_n))) /* 5-tuple Queue Fltr */ =20 +/* Time sync registers - preemption statistics */ +#define IGC_PRMPTDRCNT 0x04284 /* Good RX Preempted Packets */ +#define IGC_PRMEVNTTCNT 0x04298 /* TX Preemption event counter */ +#define IGC_PRMEVNTRCNT 0x0429C /* RX Preemption event counter */ + + /* Preemption Exception Counter */ + #define IGC_PRMEXCPRCNT 0x42A0 +/* Received out of order packets with SMD-C */ +#define IGC_PRMEXCPRCNT_OOO_SMDC 0x000000FF +/* Received out of order packets with SMD-C and wrong Frame CNT */ +#define IGC_PRMEXCPRCNT_OOO_FRAME_CNT 0x0000FF00 +/* Received out of order packets with SMD-C and wrong Frag CNT */ +#define IGC_PRMEXCPRCNT_OOO_FRAG_CNT 0x00FF0000 +/* Received packets with SMD-S and wrong Frag CNT and Frame CNT */ +#define IGC_PRMEXCPRCNT_MISS_FRAME_FRAG_CNT 0xFF000000 + /* Transmit Scheduling Registers */ #define IGC_TQAVCTRL 0x3570 #define IGC_TXQCTL(_n) (0x3344 + 0x4 * (_n)) --=20 2.34.1