From nobody Tue Feb 10 04:17:18 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A7A111EB5B; Wed, 5 Mar 2025 00:21:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741134118; cv=none; b=LcEFmMcdZfqK0HAr6gECKPD8N4D5SGkrCCAuLposg0DjM66vgy1lD17fyhdfjPUA2YU9RO1ceHZIpyXf2s5vpLym84u1MSasicKrEAj2TaM7xHKaqun8CQm10Qdvt8rRW7iKOefFIRr7Ds0HoG5MEiz7PYvaONFlPs70lYuAcvk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741134118; c=relaxed/simple; bh=Qo1BcW56hrEtONgesS/g7YidmDyE/zHFCRpnu8DSm+4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=grX/W15XBT0+in7AoTW9RympGHLNCk5abp+01jMhqT6ls9wDYTLYzIMF5Ssm9n9aX4pJ87By2d7fiIOHdkmkjrUqN9FQ0JFkYgSG93MRlmYNJCvZd/p0wY6sN08uLOw6qa/5tQm4fTvCLYTJO4rUcmRWqwv0ulqWbVWRBUhKUIA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: 5gTCNhyQSweG1IiERbtLeQ== X-CSE-MsgGUID: iKhDGxMUTxK3MkZFSZvQPQ== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 05 Mar 2025 09:21:49 +0900 Received: from mulinux.home (unknown [10.226.92.17]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 706FF404D874; Wed, 5 Mar 2025 09:21:46 +0900 (JST) From: Fabrizio Castro To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven Cc: Fabrizio Castro , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Biju Das , Lad Prabhakar Subject: [PATCH v5 6/6] arm64: dts: renesas: r9a09g057: Add DMAC nodes Date: Wed, 5 Mar 2025 00:21:12 +0000 Message-Id: <20250305002112.5289-7-fabrizio.castro.jz@renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250305002112.5289-1-fabrizio.castro.jz@renesas.com> References: <20250305002112.5289-1-fabrizio.castro.jz@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add nodes for the DMAC IPs found on the Renesas RZ/V2H(P) SoC. Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven --- v4->v5: * Collected tags. v3->v4: * No change. v2->v3: * No change. v1->v2: * No change. --- arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 165 +++++++++++++++++++++ 1 file changed, 165 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g057.dtsi index 1c550b22b164..0a7d0c801e32 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi @@ -252,6 +252,171 @@ sys: system-controller@10430000 { status =3D "disabled"; }; =20 + dmac0: dma-controller@11400000 { + compatible =3D "renesas,r9a09g057-dmac"; + reg =3D <0 0x11400000 0 0x10000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks =3D <&cpg CPG_MOD 0x0>; + power-domains =3D <&cpg>; + resets =3D <&cpg 0x31>; + #dma-cells =3D <1>; + dma-channels =3D <16>; + renesas,icu =3D <&icu 4>; + }; + + dmac1: dma-controller@14830000 { + compatible =3D "renesas,r9a09g057-dmac"; + reg =3D <0 0x14830000 0 0x10000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks =3D <&cpg CPG_MOD 0x1>; + power-domains =3D <&cpg>; + resets =3D <&cpg 0x32>; + #dma-cells =3D <1>; + dma-channels =3D <16>; + renesas,icu =3D <&icu 0>; + }; + + dmac2: dma-controller@14840000 { + compatible =3D "renesas,r9a09g057-dmac"; + reg =3D <0 0x14840000 0 0x10000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks =3D <&cpg CPG_MOD 0x2>; + power-domains =3D <&cpg>; + resets =3D <&cpg 0x33>; + #dma-cells =3D <1>; + dma-channels =3D <16>; + renesas,icu =3D <&icu 1>; + }; + + dmac3: dma-controller@12000000 { + compatible =3D "renesas,r9a09g057-dmac"; + reg =3D <0 0x12000000 0 0x10000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks =3D <&cpg CPG_MOD 0x3>; + power-domains =3D <&cpg>; + resets =3D <&cpg 0x34>; + #dma-cells =3D <1>; + dma-channels =3D <16>; + renesas,icu =3D <&icu 2>; + }; + + dmac4: dma-controller@12010000 { + compatible =3D "renesas,r9a09g057-dmac"; + reg =3D <0 0x12010000 0 0x10000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks =3D <&cpg CPG_MOD 0x4>; + power-domains =3D <&cpg>; + resets =3D <&cpg 0x35>; + #dma-cells =3D <1>; + dma-channels =3D <16>; + renesas,icu =3D <&icu 3>; + }; + ostm0: timer@11800000 { compatible =3D "renesas,r9a09g057-ostm", "renesas,ostm"; reg =3D <0x0 0x11800000 0x0 0x1000>; --=20 2.34.1