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Wed, 05 Mar 2025 05:09:21 -0800 (PST) From: Abel Vesa Date: Wed, 05 Mar 2025 15:09:04 +0200 Subject: [PATCH v4 1/3] leds: rgb: leds-qcom-lpg: Fix pwm resolution max for normal PWMs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250305-leds-qcom-lpg-fix-max-pwm-on-hi-res-v4-1-bfe124a53a9f@linaro.org> References: <20250305-leds-qcom-lpg-fix-max-pwm-on-hi-res-v4-0-bfe124a53a9f@linaro.org> In-Reply-To: <20250305-leds-qcom-lpg-fix-max-pwm-on-hi-res-v4-0-bfe124a53a9f@linaro.org> To: Lee Jones , Pavel Machek , Anjelique Melendez Cc: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Kamal Wadhwa , Jishnu Prakash , Bjorn Andersson , Konrad Dybcio , Johan Hovold , Sebastian Reichel , Pavel Machek , linux-leds@vger.kernel.org, linux-pwm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa X-Mailer: b4 0.15-dev-dedf8 X-Developer-Signature: v=1; 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a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE Ideally, the requested duty cycle should never translate to a PWM value higher than the selected resolution (PWM size), but currently the best matched period is never reported back to the PWM consumer, so the consumer will still be using the requested period which is higher than the best matched one. This will result in PWM consumer requesting duty cycle values higher than the allowed PWM value. For example, a consumer might request a period of 5ms while the best (closest) period the PWM hardware will do is 4.26ms. For this best matched resolution, if the selected resolution is 9-bit wide, when the consumer asks for a duty cycle of 5ms, the PWM value will be 600, which is outside of what the resolution allows. Similar will happen if the 6-bit resolution is selected. Since for these normal PWMs (non Hi-Res), the current implementation is capping the PWM value at a 9-bit resolution, even when the 6-bit resolution is selected, the value will be wrapped around to 6-bit value by the HW internal logic. Fix the issue by capping the PWM value to the maximum value allowed by the selected resolution. Fixes: 7a3350495d9a ("leds: rgb: leds-qcom-lpg: Add support for 6-bit PWM r= esolution") Suggested-by: Anjelique Melendez Reviewed-by: Sebastian Reichel Signed-off-by: Abel Vesa --- drivers/leds/rgb/leds-qcom-lpg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/leds/rgb/leds-qcom-lpg.c b/drivers/leds/rgb/leds-qcom-= lpg.c index 4e5c56ded1f0412c9913670699e912b24f3408bd..4454fc6a38480b61916318dd170= f3eddc32976d6 100644 --- a/drivers/leds/rgb/leds-qcom-lpg.c +++ b/drivers/leds/rgb/leds-qcom-lpg.c @@ -533,7 +533,7 @@ static void lpg_calc_duty(struct lpg_channel *chan, uin= t64_t duty) max =3D LPG_RESOLUTION_15BIT - 1; clk_rate =3D lpg_clk_rates_hi_res[chan->clk_sel]; } else { - max =3D LPG_RESOLUTION_9BIT - 1; + max =3D BIT(lpg_pwm_resolution[chan->pwm_resolution_sel]) - 1; clk_rate =3D lpg_clk_rates[chan->clk_sel]; } =20 --=20 2.34.1 From nobody Tue Feb 10 00:42:09 2026 Received: from mail-ed1-f44.google.com (mail-ed1-f44.google.com [209.85.208.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 63CB524EAB6 for ; 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Wed, 05 Mar 2025 05:09:25 -0800 (PST) Received: from [127.0.1.1] ([62.231.96.41]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5e4c3b4aa5dsm9627341a12.14.2025.03.05.05.09.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Mar 2025 05:09:24 -0800 (PST) From: Abel Vesa Date: Wed, 05 Mar 2025 15:09:05 +0200 Subject: [PATCH v4 2/3] leds: rgb: leds-qcom-lpg: Fix pwm resolution max for Hi-Res PWMs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250305-leds-qcom-lpg-fix-max-pwm-on-hi-res-v4-2-bfe124a53a9f@linaro.org> References: <20250305-leds-qcom-lpg-fix-max-pwm-on-hi-res-v4-0-bfe124a53a9f@linaro.org> In-Reply-To: <20250305-leds-qcom-lpg-fix-max-pwm-on-hi-res-v4-0-bfe124a53a9f@linaro.org> To: Lee Jones , Pavel Machek , Anjelique Melendez Cc: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Kamal Wadhwa , Jishnu Prakash , Bjorn Andersson , Konrad Dybcio , Johan Hovold , Sebastian Reichel , Pavel Machek , linux-leds@vger.kernel.org, linux-pwm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa , stable@vger.kernel.org X-Mailer: b4 0.15-dev-dedf8 X-Developer-Signature: v=1; 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a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE Ideally, the requested duty cycle should never translate to a PWM value higher than the selected resolution (PWM size), but currently the best matched period is never reported back to the PWM consumer, so the consumer will still be using the requested period which is higher than the best matched one. This will result in PWM consumer requesting duty cycle values higher than the allowed PWM value. For example, a consumer might request a period of 5ms while the best (closest) period the PWM hardware will do is 4.26ms. For this best matched resolution, if the selected resolution is 8-bit wide, when the consumer asks for a duty cycle of 5ms, the PWM value will be 300, which is outside of what the resolution allows. This will happen with all possible resolutions when selected. Since for these Hi-Res PWMs, the current implementation is capping the PWM value at a 15-bit resolution, even when lower resolutions are selected, the value will be wrapped around by the HW internal logic to the selected resolution. Fix the issue by capping the PWM value to the maximum value allowed by the selected resolution. Cc: stable@vger.kernel.org # 6.4 Fixes: b00d2ed37617 ("leds: rgb: leds-qcom-lpg: Add support for high resolu= tion PWM") Reviewed-by: Bjorn Andersson Reviewed-by: Sebastian Reichel Signed-off-by: Abel Vesa --- drivers/leds/rgb/leds-qcom-lpg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/leds/rgb/leds-qcom-lpg.c b/drivers/leds/rgb/leds-qcom-= lpg.c index 4454fc6a38480b61916318dd170f3eddc32976d6..0b6310184988c299d82ee718198= 2c03d306407a4 100644 --- a/drivers/leds/rgb/leds-qcom-lpg.c +++ b/drivers/leds/rgb/leds-qcom-lpg.c @@ -530,7 +530,7 @@ static void lpg_calc_duty(struct lpg_channel *chan, uin= t64_t duty) unsigned int clk_rate; =20 if (chan->subtype =3D=3D LPG_SUBTYPE_HI_RES_PWM) { - max =3D LPG_RESOLUTION_15BIT - 1; + max =3D BIT(lpg_pwm_resolution_hi_res[chan->pwm_resolution_sel]) - 1; clk_rate =3D lpg_clk_rates_hi_res[chan->clk_sel]; } else { max =3D BIT(lpg_pwm_resolution[chan->pwm_resolution_sel]) - 1; --=20 2.34.1 From nobody Tue Feb 10 00:42:09 2026 Received: from mail-ed1-f43.google.com (mail-ed1-f43.google.com [209.85.208.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C300C24EF67 for ; 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Wed, 05 Mar 2025 05:09:26 -0800 (PST) Received: from [127.0.1.1] ([62.231.96.41]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5e4c3b4aa5dsm9627341a12.14.2025.03.05.05.09.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Mar 2025 05:09:26 -0800 (PST) From: Abel Vesa Date: Wed, 05 Mar 2025 15:09:06 +0200 Subject: [PATCH v4 3/3] leds: rgb: leds-qcom-lpg: Fix calculation of best period Hi-Res PWMs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250305-leds-qcom-lpg-fix-max-pwm-on-hi-res-v4-3-bfe124a53a9f@linaro.org> References: <20250305-leds-qcom-lpg-fix-max-pwm-on-hi-res-v4-0-bfe124a53a9f@linaro.org> In-Reply-To: <20250305-leds-qcom-lpg-fix-max-pwm-on-hi-res-v4-0-bfe124a53a9f@linaro.org> To: Lee Jones , Pavel Machek , Anjelique Melendez Cc: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Kamal Wadhwa , Jishnu Prakash , Bjorn Andersson , Konrad Dybcio , Johan Hovold , Sebastian Reichel , Pavel Machek , linux-leds@vger.kernel.org, linux-pwm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa , stable@vger.kernel.org X-Mailer: b4 0.15-dev-dedf8 X-Developer-Signature: v=1; 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a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE When determining the actual best period by looping through all possible PWM configs, the resolution currently used is based on bit shift value which is off-by-one above the possible maximum PWM value allowed. So subtract one from the resolution before determining the best period so that the maximum duty cycle requested by the PWM user won't result in a value above the maximum allowed by the selected resolution. Cc: stable@vger.kernel.org # 6.4 Fixes: b00d2ed37617 ("leds: rgb: leds-qcom-lpg: Add support for high resolu= tion PWM") Reviewed-by: Sebastian Reichel Signed-off-by: Abel Vesa --- drivers/leds/rgb/leds-qcom-lpg.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/leds/rgb/leds-qcom-lpg.c b/drivers/leds/rgb/leds-qcom-= lpg.c index 0b6310184988c299d82ee7181982c03d306407a4..4f2a178e3d265a2cc88e651d3e2= ca6ae3dfac2e2 100644 --- a/drivers/leds/rgb/leds-qcom-lpg.c +++ b/drivers/leds/rgb/leds-qcom-lpg.c @@ -462,7 +462,7 @@ static int lpg_calc_freq(struct lpg_channel *chan, uint= 64_t period) max_res =3D LPG_RESOLUTION_9BIT; } =20 - min_period =3D div64_u64((u64)NSEC_PER_SEC * (1 << pwm_resolution_arr[0]), + min_period =3D div64_u64((u64)NSEC_PER_SEC * ((1 << pwm_resolution_arr[0]= ) - 1), clk_rate_arr[clk_len - 1]); if (period <=3D min_period) return -EINVAL; @@ -483,7 +483,7 @@ static int lpg_calc_freq(struct lpg_channel *chan, uint= 64_t period) */ =20 for (i =3D 0; i < pwm_resolution_count; i++) { - resolution =3D 1 << pwm_resolution_arr[i]; + resolution =3D (1 << pwm_resolution_arr[i]) - 1; for (clk_sel =3D 1; clk_sel < clk_len; clk_sel++) { u64 numerator =3D period * clk_rate_arr[clk_sel]; =20 @@ -1292,7 +1292,7 @@ static int lpg_pwm_get_state(struct pwm_chip *chip, s= truct pwm_device *pwm, if (ret) return ret; =20 - state->period =3D DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * (1 << resolution)= * + state->period =3D DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * ((1 << resolution= ) - 1) * pre_div * (1 << m), refclk); state->duty_cycle =3D DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pwm_value * p= re_div * (1 << m), refclk); } else { --=20 2.34.1