From nobody Mon Feb 9 15:09:25 2026 Received: from smtp.forwardemail.net (smtp.forwardemail.net [121.127.44.59]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB0C424EAAA for ; Tue, 4 Mar 2025 20:16:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=121.127.44.59 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741119421; cv=none; b=MUTRXH+lRyK2aQp3+QQeLlnzTmBSAT3TSWZc4MleXLDpw9H1biPoTVuU8EkT2I8gTMCsdQxF4oGEEgdXype9SJ8xjocKdIlHVkYHvrGQ0fyyrZFVH8hvzCmmkqkUI9ZY8E0FBp3YQAhRhOxdtMemY+QVRtxhYulN3rHkrbWVfI4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741119421; c=relaxed/simple; bh=YO1b6DRDw3sqiLvBBev5BcrXQn5n7gJ1IzNT3mkeCgk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Deqv9ysYqs2VNxyaOua38SAFbW+JgRXHk1Iu9uz5LilqRPGWcH5DotbT+p8Se4W+VkB6RMJ1Qil3iurWT/af7cPfLGiUYMybDLOxMAJIlO5L1SaPNjF6GGbPJOSwl192fnS134CLLXK0NTiNLihawTcHZIdgCyApmROPimPEx/I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b=YyuhrrZU; arc=none smtp.client-ip=121.127.44.59 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b="YyuhrrZU" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1741119419; bh=Pb/14G8hWF+Bg+hQs4Omwq4AhAkSVh6sga6MjuQPdDo=; b=YyuhrrZUn4SC19312HBSwpc5OuSO7R7mRZ7KWDDXVTwRvU/heKqyxmdIfG0G0BTId1lIiurX4 OGbTpNZgwnecxshCF4NSW5NYDZQZb/RbXAblsVrLOGw9+wml/lUo/IMocskj9hiaGZKXOhO5Rq3 dXyjMlKNc721AUjHsAk+AxmunToQt9o/oJzi7oBygGMg5ItXqfmBb343YXWIrCe5bJnirDcPoTs eytHT3dFfO/REvtq8G+cvUTVpyA7KRWoiUoKu5Oj1Ed84A1UfcujAo2GSqGS3U+WVwiDSdWym3d NBCtFP6QFVd95iw7dy9wRSzJfx4D5kmL/2gse8Xx8Vzw== X-Forward-Email-ID: 67c75fba66a4509299dbdf95 X-Forward-Email-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 121.127.44.59 X-Forward-Email-Version: 0.4.40 X-Forward-Email-Website: https://forwardemail.net X-Complaints-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Report-Abuse-To: abuse@forwardemail.net From: Jonas Karlman To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Yao Zi , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman Subject: [PATCH v2 3/4] arm64: dts: rockchip: Add SARADC node for RK3528 Date: Tue, 4 Mar 2025 20:16:36 +0000 Message-ID: <20250304201642.831218-4-jonas@kwiboo.se> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250304201642.831218-1-jonas@kwiboo.se> References: <20250304201642.831218-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a device tree node for the SARADC controller used by RK3528. Signed-off-by: Jonas Karlman --- v2: No change --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts= /rockchip/rk3528.dtsi index b1713ed4d7e2..d3e2a64ff2d5 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include =20 / { compatible =3D "rockchip,rk3528"; @@ -264,6 +265,18 @@ uart7: serial@ffa28000 { status =3D "disabled"; }; =20 + saradc: adc@ffae0000 { + compatible =3D "rockchip,rk3528-saradc"; + reg =3D <0x0 0xffae0000 0x0 0x10000>; + clocks =3D <&cru CLK_SARADC>, <&cru PCLK_SARADC>; + clock-names =3D "saradc", "apb_pclk"; + interrupts =3D ; + resets =3D <&cru SRST_P_SARADC>; + reset-names =3D "saradc-apb"; + #io-channel-cells =3D <1>; + status =3D "disabled"; + }; + pinctrl: pinctrl { compatible =3D "rockchip,rk3528-pinctrl"; rockchip,grf =3D <&ioc_grf>; --=20 2.48.1