From nobody Wed Apr 1 21:26:00 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EABC81FCFF3 for ; Tue, 4 Mar 2025 08:52:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741078351; cv=none; b=uOsT7zfgUYLVkuo9DucNwpxIUTPp8MUGhZCkEf9srXwrcubgwsGV6KZ587kYqCLvSMtP/vnR0rkx2LIMlgjKssGTvPCHf0VW8ovJWJeSyYp+tQz8W878XhXU4b8igK4LA2nc+GT25P76iPeIrIYyQJg2FnU1TI8UtkHMzvJv1CY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741078351; c=relaxed/simple; bh=TtkjCaEfovdST0vQ/3l+CT6q0XDurgzYkizr7i+OBGU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=K5+tMkL6Q/pa62ujLwdC55krmI/iqpo/740XL7PXStJc8i+fckHfLxr4SROZD26nT4qLAk3nHPnRo3PALTbeA9IHXl55g6dacQTn4KbAzxmN8pf72spyy1NHMxVwcdKz4veJKwPGVYJsatKvBQcr6mYkskt7W3WAk+J1/8dsA54= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=wYm5Ig67; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=vc/f4lqp; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="wYm5Ig67"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="vc/f4lqp" From: "Ahmed S. Darwish" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1741078348; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yF4ckw4bp1d8zZFTp92YozOjejKXwsco3zqZ2FJcqLM=; b=wYm5Ig67OoGCCtfh53NPxUaGJ9jM8G0PVyiAoAvFMJKIT1vN0BI2Gu4HBWHHF/2GmR6ZQE XK7hqoQ5h6wjPUaNstrKRcXoUrkaaO2QeFQ4Wy+fGqbD3HaSk2VKvv7Ae3BqHksDbFHDWv Uvr/bX5OU0U4C2oLxPD/ozNaMqE5KDOS+aLAw7EbLwq8hoYGR2YqatUwfzzvQmwdgo7L/U wJG91jiiMXaGB+4O3D/5hJJf/gRlRVg8aCCv9I/1EkjHA2iFw5DdDqyhJTI1uPHZGV2PhZ XfuQ7mTpCel4a/CvdDjhsWpJoCALZRgSq28urRdDrgual5fk8hq7vSFVuV4yEw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1741078348; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yF4ckw4bp1d8zZFTp92YozOjejKXwsco3zqZ2FJcqLM=; b=vc/f4lqpJTv7MldpX5Pc3umWonX2Wi0uMAlw+NuMKhUtfhFxdJ/NqNcppMipMGobjz9Wd7 JUCqkyThVmbPzQBA== To: Borislav Petkov , Ingo Molnar , Dave Hansen Cc: Thomas Gleixner , John Ogness , "H. Peter Anvin" , Andrew Cooper , x86@kernel.org, x86-cpuid@lists.linux.dev, LKML , "Ahmed S. Darwish" Subject: [PATCH v1 05/40] x86/cpu: Remove unnecessary headers and reorder the rest Date: Tue, 4 Mar 2025 09:51:16 +0100 Message-ID: <20250304085152.51092-6-darwi@linutronix.de> In-Reply-To: <20250304085152.51092-1-darwi@linutronix.de> References: <20250304085152.51092-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Remove the headers at intel.c that are no longer required. Alphabetically reorder what remains since more headers will be included in further commits. Suggested-by: Thomas Gleixner Signed-off-by: Ahmed S. Darwish --- arch/x86/kernel/cpu/intel.c | 35 ++++++++++++----------------------- 1 file changed, 12 insertions(+), 23 deletions(-) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 134368a3f4b1..72f519534e2b 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -1,40 +1,29 @@ // SPDX-License-Identifier: GPL-2.0 -#include -#include =20 -#include #include -#include -#include -#include -#include #include -#include +#include +#include +#include + +#ifdef CONFIG_X86_64 +#include +#endif =20 -#include -#include #include +#include +#include #include +#include #include #include -#include -#include -#include -#include +#include #include +#include #include =20 -#ifdef CONFIG_X86_64 -#include -#endif - #include "cpu.h" =20 -#ifdef CONFIG_X86_LOCAL_APIC -#include -#include -#endif - /* * Processors which have self-snooping capability can handle conflicting * memory type across CPUs by snooping its own cache. However, there exists --=20 2.48.1