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Peter Anvin" , Andrew Cooper , x86@kernel.org, x86-cpuid@lists.linux.dev, LKML , "Ahmed S. Darwish" Subject: [PATCH v1 21/40] x86/cacheinfo: Consolidate AMD/Hygon leaf 0x8000001d calls Date: Tue, 4 Mar 2025 09:51:32 +0100 Message-ID: <20250304085152.51092-22-darwi@linutronix.de> In-Reply-To: <20250304085152.51092-1-darwi@linutronix.de> References: <20250304085152.51092-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" While gathering CPU cache info, cpuid leaf 0x8000001d is invoked in two separate if blocks: one for Hygon CPUs and one for AMDs with topology extensions. After each invocation, amd_init_l3_cache() is called. Merge the two if blocks into a single condition, thus removing the duplicated code. Future commits will expand these if blocks, so combining them now is both cleaner and more maintainable. Note, while at it, remove a useless "better error?" comment that was within the same function since the 2005 commit e2cac78935ff ("[PATCH] x86_64: When running cpuid4 need to run on the correct CPU"). Signed-off-by: Ahmed S. Darwish --- arch/x86/kernel/cpu/cacheinfo.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinf= o.c index 0024d126c385..6aeabbd94997 100644 --- a/arch/x86/kernel/cpu/cacheinfo.c +++ b/arch/x86/kernel/cpu/cacheinfo.c @@ -598,23 +598,24 @@ cpuid4_cache_lookup_regs(int index, struct _cpuid4_in= fo_regs *id4) union _cpuid4_leaf_ecx ecx; unsigned edx; =20 - if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_AMD) { - if (boot_cpu_has(X86_FEATURE_TOPOEXT)) + if (x86_vendor_amd_or_hygon(boot_cpu_data.x86_vendor)) { + if (boot_cpu_has(X86_FEATURE_TOPOEXT) || + boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_HYGON) { + /* AMD with TOPOEXT, or HYGON */ cpuid_count(0x8000001d, index, &eax.full, &ebx.full, &ecx.full, &edx); - else + } else { + /* Legacy AMD fallback */ amd_cpuid4(index, &eax, &ebx, &ecx); - amd_init_l3_cache(id4, index); - } else if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_HYGON) { - cpuid_count(0x8000001d, index, &eax.full, - &ebx.full, &ecx.full, &edx); + } amd_init_l3_cache(id4, index); } else { + /* Intel */ cpuid_count(4, index, &eax.full, &ebx.full, &ecx.full, &edx); } =20 if (eax.split.type =3D=3D CTYPE_NULL) - return -EIO; /* better error ? */ + return -EIO; =20 id4->eax =3D eax; id4->ebx =3D ebx; --=20 2.48.1