From nobody Fri Dec 19 03:46:18 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C3B37202F90; Tue, 4 Mar 2025 14:02:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741096922; cv=none; b=sAbfcq2s5uoXHlhFkBvpP+xqDkeO6BGAUh/TxIgS9MxlBV0LG7e2ly4ryMPdIE9nuEzsvwkt+Jx669iq9QCu5hxbH8MGJ3iw1pcB9Et6IsKEhwj4M5UGEdqO88Xh2Rzaa4h77qEqf9CYQiexjPJ1r5APp9f/szeyQq9NhD3n1wE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741096922; c=relaxed/simple; bh=pq3KZLjVtYgG3QJjA0gfc0ATstLTL4U024ZZLEq+S30=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HsyRCJAFcSY+5xc5MXgZ7XYf3iUCsu/jXWPjmlYEhkduZUAIy3WnSl7e0+ajEkq1/WlEr8Eqh4gaXmU/Oi3z7q+kLS9Z3x9qFV/dhNfz46M0rs5HUZZbF2hvFYJ/vfvwglLMjpBu8R81ukZZeJVjUiyE6gy9ni3FQEJx4opt2m0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=jOOUnhh7; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="jOOUnhh7" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1741096918; bh=pq3KZLjVtYgG3QJjA0gfc0ATstLTL4U024ZZLEq+S30=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=jOOUnhh7ghUI7j0/Rzy79CJhgMGKYVh8gNeUQyN3tI+o1DY+O4FTOn2G8cbBVD3fN 16B2GZdaUK9f53fxgfmB7n+bq+AWzsF74bV7UCayIDzYLfvWKZYxsv5lesh0NtjQJg eGGcPU+2mEf3C60V8JeKC0YHHxtEPt7Ovccp8hj8hkGN0priJUtbel9GJ/xkUHvFfX byrmL+bIbkRyJXjMGoYgQzCbB3GVnbO1DNSOI55K8YpIYmXnCnCH6Fn73eCYNTUm3w JYmmRFDOEXApUgTSYjx5P2Od7fRzx/h4GSXAH/aMos2nzz3EgnE7LPkXWhVTHeA9ZX gHxZUc4IfUSDw== Received: from apertis-1.home (2a01cb0892F2D600C8F85cf092d4Af51.ipv6.abo.wanadoo.fr [IPv6:2a01:cb08:92f2:d600:c8f8:5cf0:92d4:af51]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: jmassot) by bali.collaboradmins.com (Postfix) with ESMTPSA id CF2EE17E0B56; Tue, 4 Mar 2025 15:01:57 +0100 (CET) From: Julien Massot Date: Tue, 04 Mar 2025 15:01:55 +0100 Subject: [PATCH v2 1/2] arm64: dts: mediatek: mt8395-nio-12l: Prepare MIPI DSI port Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250304-radxa-panel-overlay-v2-1-3ee6797d3f86@collabora.com> References: <20250304-radxa-panel-overlay-v2-0-3ee6797d3f86@collabora.com> In-Reply-To: <20250304-radxa-panel-overlay-v2-0-3ee6797d3f86@collabora.com> To: kernel@collabora.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, Julien Massot X-Mailer: b4 0.14.2 This board can use a MIPI-DSI panel on the DSI0 connector: in preparation for adding an overlay for the Radxa Display 8HD, add the backlight, and some definitions for pins available through the DSI0 port. Signed-off-by: Julien Massot Reviewed-by: AngeloGioacchino Del Regno --- .../boot/dts/mediatek/mt8395-radxa-nio-12l.dts | 45 ++++++++++++++++++= ++++ 1 file changed, 45 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts b/arch/a= rm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts index 7184dc99296c7f5d749c7e6d378722677970b3b7..1c922e98441a1aadf0aa3cdd765= 83a70401a1fa3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts +++ b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts @@ -48,6 +48,18 @@ memory@40000000 { reg =3D <0 0x40000000 0x1 0x0>; }; =20 + backlight: backlight { + compatible =3D "pwm-backlight"; + brightness-levels =3D <0 1023>; + default-brightness-level =3D <576>; + enable-gpios =3D <&pio 107 GPIO_ACTIVE_HIGH>; + num-interpolated-steps =3D <1023>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&dsi0_backlight_pins>; + pwms =3D <&disp_pwm0 0 500000>; + status =3D "disabled"; + }; + wifi_vreg: regulator-wifi-3v3-en { compatible =3D "regulator-fixed"; regulator-name =3D "wifi_3v3_en"; @@ -502,6 +514,13 @@ &mt6359_vsram_others_ldo_reg { &pio { mediatek,rsel-resistance-in-si-unit; =20 + dsi0_backlight_pins: dsi0-backlight-pins { + pins-backlight-en { + pinmux =3D ; + output-high; + }; + }; + eth_default_pins: eth-default-pins { pins-cc { pinmux =3D , @@ -699,6 +718,13 @@ pins-irq { }; }; =20 + panel_default_pins: panel-pins { + pins-rst { + pinmux =3D ; + bias-pull-up; + }; + }; + pcie0_default_pins: pcie0-default-pins { pins-bus { pinmux =3D , @@ -717,6 +743,12 @@ pins-bus { }; }; =20 + pwm0_default_pins: pwm0-pins { + pins-disp-pwm { + pinmux =3D ; + }; + }; + spi1_pins: spi1-default-pins { pins-bus { pinmux =3D , @@ -737,6 +769,19 @@ pins-bus { }; }; =20 + touch_pins: touch-pins { + pins-touch-int { + pinmux =3D ; + input-enable; + bias-disable; + }; + + pins-touch-rst { + pinmux =3D ; + output-high; + }; + }; + uart0_pins: uart0-pins { pins-bus { pinmux =3D , --=20 2.48.1 From nobody Fri Dec 19 03:46:18 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 518F5204594; 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Tue, 4 Mar 2025 15:01:58 +0100 (CET) From: Julien Massot Date: Tue, 04 Mar 2025 15:01:56 +0100 Subject: [PATCH v2 2/2] arm64: dts: mediatek: mt8395-radxa-nio-12l: Add Radxa 8 HD panel Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250304-radxa-panel-overlay-v2-2-3ee6797d3f86@collabora.com> References: <20250304-radxa-panel-overlay-v2-0-3ee6797d3f86@collabora.com> In-Reply-To: <20250304-radxa-panel-overlay-v2-0-3ee6797d3f86@collabora.com> To: kernel@collabora.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, Julien Massot X-Mailer: b4 0.14.2 The Radxa 8 HD touchscreen can be used with various Radxa board and is sold appart from the Radxa NIO 12L development kit. Add a DTS overlay for this panel. Signed-off-by: Julien Massot Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/Makefile | 2 + .../mediatek/mt8395-radxa-nio-12l-8-hd-panel.dtso | 84 ++++++++++++++++++= ++++ 2 files changed, 86 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/me= diatek/Makefile index ae1147eca9a915f117487101e2ad4acead97adfe..58484e8300632edbdef24bbda33= ccf00db9df937 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -100,9 +100,11 @@ dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8395-genio-1200-evk= .dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8390-genio-700-evk.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8395-kontron-3-5-sbc-i1200.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8395-radxa-nio-12l.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8395-radxa-nio-12l-8-hd-panel.dtbo dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8516-pumpkin.dtb =20 # Device tree overlays support DTC_FLAGS_mt7986a-bananapi-bpi-r3 :=3D -@ DTC_FLAGS_mt7986a-bananapi-bpi-r3-mini :=3D -@ DTC_FLAGS_mt7988a-bananapi-bpi-r4 :=3D -@ +DTC_FLAGS_mt8395-radxa-nio-12l :=3D -@ diff --git a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l-8-hd-panel.d= tso b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l-8-hd-panel.dtso new file mode 100644 index 0000000000000000000000000000000000000000..0389c9cb8581c0bb50bb38fd35d= 1190de13feb6e --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l-8-hd-panel.dtso @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Radxa Display 8 HD touchscreen module + * Copyright (C) 2025 Collabora Ltd. + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&backlight { + status =3D "okay"; +}; + +&disp_pwm0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm0_default_pins>; + status =3D "okay"; +}; + +&dsi0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + panel@0 { + compatible =3D "radxa,display-8hd-ad002", "jadard,jd9365da-h3"; + reg =3D <0>; + backlight =3D <&backlight>; + vdd-supply =3D <&mt6359_vcn33_2_bt_ldo_reg>; + vccio-supply =3D <&mt6360_ldo2>; + reset-gpios =3D <&pio 108 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&panel_default_pins>; + + port { + dsi_panel_in: endpoint { + remote-endpoint =3D <&dsi0_out>; + }; + }; + }; +}; + +&dsi0_out { + remote-endpoint =3D <&dsi_panel_in>; +}; + +&i2c4 { + #address-cells =3D <1>; + #size-cells =3D <0>; + + touchscreen@14 { + compatible =3D "goodix,gt911"; + reg =3D <0x14>; + interrupts-extended =3D <&pio 132 IRQ_TYPE_EDGE_RISING>; + irq-gpios =3D <&pio 132 GPIO_ACTIVE_HIGH>; + reset-gpios =3D <&pio 133 GPIO_ACTIVE_HIGH>; + VDDIO-supply =3D <&mt6359_vcn33_2_bt_ldo_reg>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&touch_pins>; + }; +}; + +&mipi_tx0 { + status =3D "okay"; +}; + +&ovl0_in { + remote-endpoint =3D <&vdosys0_ep_main>; +}; + +&vdosys0 { + port { + #address-cells =3D <1>; + #size-cells =3D <0>; + + vdosys0_ep_main: endpoint@0 { + reg =3D <0>; + remote-endpoint =3D <&ovl0_in>; + }; + }; +}; --=20 2.48.1