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[109.210.4.206]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e47b6ceesm14101702f8f.45.2025.03.03.03.47.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Mar 2025 03:47:40 -0800 (PST) From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Andy Shevchenko , Cosmin Tanislav , Dumitru Ceclan , Guillaume Ranquet , Lars-Peter Clausen , Michael Hennerich , Michael Walle , Nuno Sa , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 1/8] iio: adc: ad_sigma_delta: Disable channel after calibration Date: Mon, 3 Mar 2025 12:46:59 +0100 Message-ID: <20250303114659.1672695-11-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250303114659.1672695-10-u.kleine-koenig@baylibre.com> References: <20250303114659.1672695-10-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Developer-Signature: v=1; a=openpgp-sha256; l=1372; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=aFcJsLIM3cdSSP2ZKtYFolUMMu1Z1B26+vDxNxrArwM=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnxZa1Fla+gzXLCTT/KwY3Cm6Y677bJqeMMk3Jr pPPpuRIgiaJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ8WWtQAKCRCPgPtYfRL+ TuwvB/oDIs1C/+avbqlmD/ajiAhUAHnJVsoJGiLUjXEcP6OGyC8yiuj5gKTQK7rO3WhoSMr90Kv 0NjN6uyKG4p5cR/qAg+DxdArV2cGa0yThd+juLb+5+NLkYCuC47Jtsi+1BfnMEgwZ+WZt2l+lPW zNViNP+m7lR+UoOtcsllw5EJ5/0rspBxOVtXPCswhNUcQFj9IdT+O+3FMwMvhQKty2n5hyuFOI8 8x6nHDSIl/XUZIzycmnNVt2aK2CsFjeg0FQIWh7OfnwyvDn72yyzCumw9VDjiYoBgo/Mhzk9IMk cPuJejXqM1SpvQ+boXQBD1mtyT/L4nnJ2z0zGOgRA3Q/wcpm X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 Content-Transfer-Encoding: quoted-printable The function ad_sd_calibrate() enables the channel to calibrate at function entry but doesn't disable it on exit. This is problematic because if two (or more) channels are calibrated in a row, the second calibration isn't executed as intended as the first (still enabled) channel is recalibrated and after the first irq (i.e. when the calibration of the first channel completed) the calibration is aborted. This currently affects ad7173 only, as the other drivers using ad_sd_calibrate() never have more than one channel enabled at a time. To fix this, disable the calibrated channel after calibration. Fixes: 031bdc8aee01 ("iio: adc: ad7173: add calibration support") Signed-off-by: Uwe Kleine-K=C3=B6nig --- drivers/iio/adc/ad_sigma_delta.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_de= lta.c index 5907c35b98e5..d91a3ba127e3 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -339,6 +339,7 @@ int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, out: sigma_delta->keep_cs_asserted =3D false; ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_IDLE); + ad_sigma_delta_disable_one(sigma_delta, channel); sigma_delta->bus_locked =3D false; spi_bus_unlock(sigma_delta->spi->controller); =20 --=20 2.47.1 From nobody Sun Sep 7 12:25:10 2025 Received: from mail-wm1-f54.google.com (mail-wm1-f54.google.com [209.85.128.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1424C20C003 for ; Mon, 3 Mar 2025 11:47:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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[109.210.4.206]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e47a7a2asm14385125f8f.37.2025.03.03.03.47.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Mar 2025 03:47:43 -0800 (PST) From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Andy Shevchenko , Cosmin Tanislav , Dumitru Ceclan , Guillaume Ranquet , Lars-Peter Clausen , Michael Hennerich , Michael Walle , Nuno Sa , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 2/8] iio: adc: ad4130: Fix comparison of channel setups Date: Mon, 3 Mar 2025 12:47:00 +0100 Message-ID: <20250303114659.1672695-12-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250303114659.1672695-10-u.kleine-koenig@baylibre.com> References: <20250303114659.1672695-10-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Developer-Signature: v=1; a=openpgp-sha256; l=3350; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=ec14xnJrpwkJrC/ethpz0fLxzagiTiLZ9fwLcAvPKo8=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnxZa43uPHm+mFcYsPYI+AEgpGn7hKsucQzPMCC CLTMo9E9RKJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ8WWuAAKCRCPgPtYfRL+ TkWZB/4xBWucmDiiknccyOSXYattbMonYzRbz4bd9Umov8diX8N4xq0TJN7QrqvTlOp6CaSSPYk t+gXSgqH4jTIbnIb/x6kAWm981EhINKtu2hxbuPEkfoEEk4mNikABZBMZG7xc6U+M8BNAO8+GTd uzbv9mWwEV6LvzPmziBAXEcQlm7C6RsuUV9yBsXS93SB6vn0rce1aZucMHyR1JiuF5vx2mx+xRr 9T3neSNT8JiOldSEIAmLeOxg6zRL0ccwEGOfD95KVdD4XHjd5T1IfxPc0T15yf6Jc1XcPNXKxcZ EbqyAKdMYk2rHWzC22jfSbOVyx8ZeEkT9N3eWBvwLc32UUff X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 Content-Transfer-Encoding: quoted-printable Checking the binary representation of two structs (of the same type) for equality doesn't have the same semantic as comparing all members for equality. The former might find a difference where the latter doesn't in the presence of padding or when ambiguous types like float or bool are involved. (Floats typically have different representations for single values, like -0.0 vs +0.0, or 0.5 * 2=C2=B2 vs 0.25 * 2=C2=B3. The type boo= l has at least 8 bits and the raw values 1 and 2 (probably) both evaluate to true, but memcmp finds a difference.) When searching for a channel that already has the configuration we need, the comparison by member is the one that is needed. Convert the comparison accordingly to compare the members one after another. Also add a static_assert guard to (somewhat) ensure that when struct ad4130_setup_info is expanded, the comparison is adapted, too. This issue is somewhat theoretic, but using memcmp() on a struct is a bad pattern that is worth fixing. Fixes: 62094060cf3a ("iio: adc: ad4130: add AD4130 driver") Signed-off-by: Uwe Kleine-K=C3=B6nig --- drivers/iio/adc/ad4130.c | 41 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 39 insertions(+), 2 deletions(-) diff --git a/drivers/iio/adc/ad4130.c b/drivers/iio/adc/ad4130.c index 061eeb9b1f8d..4ab1943c4697 100644 --- a/drivers/iio/adc/ad4130.c +++ b/drivers/iio/adc/ad4130.c @@ -223,6 +223,10 @@ enum ad4130_pin_function { AD4130_PIN_FN_VBIAS =3D BIT(3), }; =20 +/* + * If you make adaptations in this struct, you most likely also have to ad= apt + * ad4130_setup_info_eq(), too. + */ struct ad4130_setup_info { unsigned int iout0_val; unsigned int iout1_val; @@ -591,6 +595,40 @@ static irqreturn_t ad4130_irq_handler(int irq, void *p= rivate) return IRQ_HANDLED; } =20 +static bool ad4130_setup_info_eq(struct ad4130_setup_info *a, + struct ad4130_setup_info *b) +{ + /* + * This is just to make sure that the comparison is adapted after + * struct ad4130_setup_info was changed. + */ + static_assert(sizeof(*a) =3D=3D + sizeof(struct { + unsigned int iout0_val; + unsigned int iout1_val; + unsigned int burnout; + unsigned int pga; + unsigned int fs; + u32 ref_sel; + enum ad4130_filter_mode filter_mode; + bool ref_bufp; + bool ref_bufm; + })); + + if (a->iout0_val !=3D b->iout0_val || + a->iout1_val !=3D b->iout1_val || + a->burnout !=3D b->burnout || + a->pga !=3D b->pga || + a->fs !=3D b->fs || + a->ref_sel !=3D b->ref_sel || + a->filter_mode !=3D b->filter_mode || + a->ref_bufp !=3D b->ref_bufp || + a->ref_bufm !=3D b->ref_bufm) + return false; + + return true; +} + static int ad4130_find_slot(struct ad4130_state *st, struct ad4130_setup_info *target_setup_info, unsigned int *slot, bool *overwrite) @@ -604,8 +642,7 @@ static int ad4130_find_slot(struct ad4130_state *st, struct ad4130_slot_info *slot_info =3D &st->slots_info[i]; =20 /* Immediately accept a matching setup info. */ - if (!memcmp(target_setup_info, &slot_info->setup, - sizeof(*target_setup_info))) { + if (ad4130_setup_info_eq(target_setup_info, &slot_info->setup)) { *slot =3D i; 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[109.210.4.206]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e485df22sm14465256f8f.97.2025.03.03.03.47.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Mar 2025 03:47:44 -0800 (PST) From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Andy Shevchenko , Cosmin Tanislav , Dumitru Ceclan , Guillaume Ranquet , Lars-Peter Clausen , Michael Hennerich , Michael Walle , Nuno Sa , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 3/8] iio: adc: ad7124: Fix comparison of channel configs Date: Mon, 3 Mar 2025 12:47:01 +0100 Message-ID: <20250303114659.1672695-13-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250303114659.1672695-10-u.kleine-koenig@baylibre.com> References: <20250303114659.1672695-10-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Developer-Signature: v=1; a=openpgp-sha256; l=3388; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=np/7+Gia9o5hRCqEtnJukHY+JqLP+X1gw41ncD9ejcs=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnxZbAJOt5fORmw5hG2SGvZ4uf/Inm2XPAMzWvj nzD3Jjk6W2JATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ8WWwAAKCRCPgPtYfRL+ TtAuB/9O9MJyCKychQJPr1/HtaYd7pkBazF4KnKZYm6z81dPMHWwxpxURZkhm960VrHf97ZygAb DP7NBlMXeylVlbicg4wuGR1lktiu0ftQULqr/4qVsIDveEDAZl3o8vtl+8jdv3xUa6vuQzyivUZ FtPWVFOzUePAD1XX66kiFd0qdwWSuiRLyQyTwyGtKneQG5AvykSpuF7RZkT2qk9+ykmSFTAu4SP B1Bw2+ME4rGSNMDmqgs41fUuIUncDvnHSlhWM2yiz4ZeJGSkQmI77+z2EWnWfGvsEE2pujOBrbg YS82JlzmwWJyrFLyLn/MNNM/t6zk/qxPaB/H/pxNZfXuS95M X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 Content-Transfer-Encoding: quoted-printable Checking the binary representation of two structs (of the same type) for equality doesn't have the same semantic as comparing all members for equality. The former might find a difference where the latter doesn't in the presence of padding or when ambiguous types like float or bool are involved. (Floats typically have different representations for single values, like -0.0 vs +0.0, or 0.5 * 2=C2=B2 vs 0.25 * 2=C2=B3. The type boo= l has at least 8 bits and the raw values 1 and 2 (probably) both evaluate to true, but memcmp finds a difference.) When searching for a channel that already has the configuration we need, the comparison by member is the one that is needed. Convert the comparison accordingly to compare the members one after another. Also add a static_assert guard to (somewhat) ensure that when struct ad7124_channel_config::config_props is expanded, the comparison is adapted, too. This issue is somewhat theoretic, but using memcmp() on a struct is a bad pattern that is worth fixing. Fixes: 7b8d045e497a ("iio: adc: ad7124: allow more than 8 channels") Signed-off-by: Uwe Kleine-K=C3=B6nig --- drivers/iio/adc/ad7124.c | 35 +++++++++++++++++++++++++++++++---- 1 file changed, 31 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 6bc418d38820..de90ecb5f630 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -151,7 +151,11 @@ struct ad7124_chip_info { struct ad7124_channel_config { bool live; unsigned int cfg_slot; - /* Following fields are used to compare equality. */ + /* + * Following fields are used to compare for equality. If you + * make adaptations in it, you most likely also have to adapt + * ad7124_find_similar_live_cfg(), too. + */ struct_group(config_props, enum ad7124_ref_sel refsel; bool bipolar; @@ -338,15 +342,38 @@ static struct ad7124_channel_config *ad7124_find_simi= lar_live_cfg(struct ad7124_ struct ad7124_channel_config *cfg) { struct ad7124_channel_config *cfg_aux; - ptrdiff_t cmp_size; int i; =20 - cmp_size =3D sizeof_field(struct ad7124_channel_config, config_props); + /* + * This is just to make sure that the comparison is adapted after + * struct ad7124_channel_config was changed. + */ + static_assert(sizeof_field(struct ad7124_channel_config, config_props) = =3D=3D + sizeof(struct { + enum ad7124_ref_sel refsel; + bool bipolar; + bool buf_positive; + bool buf_negative; + unsigned int vref_mv; + unsigned int pga_bits; + unsigned int odr; + unsigned int odr_sel_bits; + unsigned int filter_type; + })); + for (i =3D 0; i < st->num_channels; i++) { cfg_aux =3D &st->channels[i].cfg; =20 if (cfg_aux->live && - !memcmp(&cfg->config_props, &cfg_aux->config_props, cmp_size)) + cfg->refsel =3D=3D cfg_aux->refsel && + cfg->bipolar =3D=3D cfg_aux->bipolar && + cfg->buf_positive =3D=3D cfg_aux->buf_positive && + cfg->buf_negative =3D=3D cfg_aux->buf_negative && + cfg->vref_mv =3D=3D cfg_aux->vref_mv && + cfg->pga_bits =3D=3D cfg_aux->pga_bits && + cfg->odr =3D=3D cfg_aux->odr && + cfg->odr_sel_bits =3D=3D cfg_aux->odr_sel_bits && + cfg->filter_type =3D=3D cfg_aux->filter_type) return cfg_aux; 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[109.210.4.206]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43aba5870e7sm191186775e9.35.2025.03.03.03.47.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Mar 2025 03:47:46 -0800 (PST) From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Andy Shevchenko , Cosmin Tanislav , Dumitru Ceclan , Guillaume Ranquet , Lars-Peter Clausen , Michael Hennerich , Michael Walle , Nuno Sa , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 4/8] iio: adc: ad7173: Fix comparison of channel configs Date: Mon, 3 Mar 2025 12:47:02 +0100 Message-ID: <20250303114659.1672695-14-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250303114659.1672695-10-u.kleine-koenig@baylibre.com> References: <20250303114659.1672695-10-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Developer-Signature: v=1; a=openpgp-sha256; l=2867; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=y10CLHrz5q1cvvW/6hCv3R5E5E/v+RGlhugIUuM3XuU=; b=kA0DAAoBj4D7WH0S/k4ByyZiAGfFlsKjoB/9Enx0XBp7O5uj/4SpG8Eo5mO3qMUnhEvhZcpxs IkBMwQAAQoAHRYhBD+BrGk6eh5Zia3+04+A+1h9Ev5OBQJnxZbCAAoJEI+A+1h9Ev5OeFoIAKNt I0HVB0FGhl6WXRj+K+a+jWQubV3oqNtlhol6jL3swaA1Yb+W8f1OsxHLqw3xmL3qnu3F7Zmnuvu 9cWdxMCHqU4cqoUdfzPw2Jg0MvJBSZ4QDLhWtkvrt0KGO2t4TcxrSmZ7XngGVFoh33KNhHo2alF gfRSoPv9iC/zgLS+JPalhzfB0VODl9U2UvcOqwUtRLW4eVeBynbngZXUAsQi87AO7qxJMOpVf77 U5fArLQ0XafUWhNs4Y3EugyOOrNqUrGHABVm0jvyPqvc0+CvQOjpP6HYL+3rLnmOvCXDE5EXxSK r5vjeptYied6fbL17oTgb2Hrx+F+f7tAcyGxGs8= X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 Content-Transfer-Encoding: quoted-printable Checking the binary representation of two structs (of the same type) for equality doesn't have the same semantic as comparing all members for equality. The former might find a difference where the latter doesn't in the presence of padding or when ambiguous types like float or bool are involved. (Floats typically have different representations for single values, like -0.0 vs +0.0, or 0.5 * 2=C2=B2 vs 0.25 * 2=C2=B3. The type boo= l has at least 8 bits and the raw values 1 and 2 (probably) both evaluate to true, but memcmp finds a difference.) When searching for a channel that already has the configuration we need, the comparison by member is the one that is needed. Convert the comparison accordingly to compare the members one after another. Also add a static_assert guard to (somewhat) ensure that when struct ad7173_channel_config::config_props is expanded, the comparison is adapted, too. This issue is somewhat theoretic, but using memcmp() on a struct is a bad pattern that is worth fixing. Fixes: 76a1e6a42802 ("iio: adc: ad7173: add AD7173 driver") Signed-off-by: Uwe Kleine-K=C3=B6nig --- drivers/iio/adc/ad7173.c | 25 +++++++++++++++++++++---- 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index ca2b41b16cc9..2d90487c7f31 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -197,7 +197,11 @@ struct ad7173_channel_config { u8 cfg_slot; bool live; =20 - /* Following fields are used to compare equality. */ + /* + * Following fields are used to compare equality. If you + * make adaptations in it, you most likely also have to adapt + * ad7173_find_live_config(), too. + */ struct_group(config_props, bool bipolar; bool input_buf; @@ -568,15 +572,28 @@ static struct ad7173_channel_config * ad7173_find_live_config(struct ad7173_state *st, struct ad7173_channel_con= fig *cfg) { struct ad7173_channel_config *cfg_aux; - ptrdiff_t cmp_size; int i; =20 - cmp_size =3D sizeof_field(struct ad7173_channel_config, config_props); + /* + * This is just to make sure that the comparison is adapted after + * struct ad7173_channel_config was changed. + */ + static_assert(sizeof_field(struct ad7173_channel_config, config_props) = =3D=3D + sizeof(struct { + bool bipolar; + bool input_buf; + u8 odr; + u8 ref_sel; + })); + for (i =3D 0; i < st->num_channels; i++) { cfg_aux =3D &st->channels[i].cfg; =20 if (cfg_aux->live && - !memcmp(&cfg->config_props, &cfg_aux->config_props, cmp_size)) + cfg->bipolar =3D=3D cfg_aux->bipolar && + cfg->input_buf =3D=3D cfg_aux->input_buf && + cfg->odr =3D=3D cfg_aux->odr && + cfg->ref_sel =3D=3D cfg_aux->ref_sel) return cfg_aux; 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[109.210.4.206]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43b73702bd0sm158648515e9.10.2025.03.03.03.47.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Mar 2025 03:47:48 -0800 (PST) From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Andy Shevchenko , Cosmin Tanislav , Dumitru Ceclan , Guillaume Ranquet , Lars-Peter Clausen , Michael Hennerich , Michael Walle , Nuno Sa , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 5/8] iio: adc: ad4130: Adapt internal names to match official filter_type ABI Date: Mon, 3 Mar 2025 12:47:03 +0100 Message-ID: <20250303114659.1672695-15-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250303114659.1672695-10-u.kleine-koenig@baylibre.com> References: <20250303114659.1672695-10-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Developer-Signature: v=1; a=openpgp-sha256; l=10026; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=f5oXDYngVLmmeCgw3m2NxlkPSjJDX6EDhYcIJAY4bHI=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnxZbJmgat15ejTK0QQKh7YezB6CM5zXG9qgXEo EJXgAtDlCmJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ8WWyQAKCRCPgPtYfRL+ TmOEB/40PrifRoyMnbRW15f0Kc5i2Lyj3lHgreXcSplrKQrQ2yQT8ugWqShJzKm3GrX8Ivmxuay /ROUnJccQp+uZrdP6UXQS4IttUfsMk/wET65liNBPSoQr//Mw0l5Do5jUJ2js0C+MssELsulZMO GmX7KoRlwPum8U2U232iA4nUBn7Ed5XHe140HYOsR2+xvZjC80dc+JGdceUW64U0MgXV34DLLWC K3fjzvFG+dyIBLiLUJOnJ2v5B9lchBTUyoZIER10Eufnf9Z7De+rIT0h+kzY2Z1gry51NVnsr+r 4q/SeYDF5v4+nubYhxlYB8zc3sjL5Gd4Wk4G/iDhUh0jOTDx X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 Content-Transfer-Encoding: quoted-printable Recently the interface to to select a filter was officially blessed to use "filter_type". Adapt the naming of several functions accordingly to make the new standard more present and so make the driver a better template for other drivers. Apart from the comment update this is just s/filter_mode/filter_type/. Signed-off-by: Uwe Kleine-K=C3=B6nig --- drivers/iio/adc/ad4130.c | 84 ++++++++++++++++++++-------------------- 1 file changed, 42 insertions(+), 42 deletions(-) diff --git a/drivers/iio/adc/ad4130.c b/drivers/iio/adc/ad4130.c index 4ab1943c4697..3dbf1d89b671 100644 --- a/drivers/iio/adc/ad4130.c +++ b/drivers/iio/adc/ad4130.c @@ -203,7 +203,7 @@ enum ad4130_mode { AD4130_MODE_IDLE =3D 0b0100, }; =20 -enum ad4130_filter_mode { +enum ad4130_filter_type { AD4130_FILTER_SINC4, AD4130_FILTER_SINC4_SINC1, AD4130_FILTER_SINC3, @@ -234,7 +234,7 @@ struct ad4130_setup_info { unsigned int pga; unsigned int fs; u32 ref_sel; - enum ad4130_filter_mode filter_mode; + enum ad4130_filter_type filter_type; bool ref_bufp; bool ref_bufm; }; @@ -255,7 +255,7 @@ struct ad4130_chan_info { }; =20 struct ad4130_filter_config { - enum ad4130_filter_mode filter_mode; + enum ad4130_filter_type filter_type; unsigned int odr_div; unsigned int fs_max; enum iio_available_type samp_freq_avail_type; @@ -341,9 +341,9 @@ static const unsigned int ad4130_burnout_current_na_tbl= [AD4130_BURNOUT_MAX] =3D { [AD4130_BURNOUT_4000NA] =3D 4000, }; =20 -#define AD4130_VARIABLE_ODR_CONFIG(_filter_mode, _odr_div, _fs_max) \ +#define AD4130_VARIABLE_ODR_CONFIG(_filter_type, _odr_div, _fs_max) \ { \ - .filter_mode =3D (_filter_mode), \ + .filter_type =3D (_filter_type), \ .odr_div =3D (_odr_div), \ .fs_max =3D (_fs_max), \ .samp_freq_avail_type =3D IIO_AVAIL_RANGE, \ @@ -354,9 +354,9 @@ static const unsigned int ad4130_burnout_current_na_tbl= [AD4130_BURNOUT_MAX] =3D { }, \ } =20 -#define AD4130_FIXED_ODR_CONFIG(_filter_mode, _odr_div) \ +#define AD4130_FIXED_ODR_CONFIG(_filter_type, _odr_div) \ { \ - .filter_mode =3D (_filter_mode), \ + .filter_type =3D (_filter_type), \ .odr_div =3D (_odr_div), \ .fs_max =3D AD4130_FILTER_SELECT_MIN, \ .samp_freq_avail_type =3D IIO_AVAIL_LIST, \ @@ -378,7 +378,7 @@ static const struct ad4130_filter_config ad4130_filter_= configs[] =3D { AD4130_FIXED_ODR_CONFIG(AD4130_FILTER_SINC3_PF4, 148), }; =20 -static const char * const ad4130_filter_modes_str[] =3D { +static const char * const ad4130_filter_types_str[] =3D { [AD4130_FILTER_SINC4] =3D "sinc4", [AD4130_FILTER_SINC4_SINC1] =3D "sinc4+sinc1", [AD4130_FILTER_SINC3] =3D "sinc3", @@ -610,7 +610,7 @@ static bool ad4130_setup_info_eq(struct ad4130_setup_in= fo *a, unsigned int pga; unsigned int fs; u32 ref_sel; - enum ad4130_filter_mode filter_mode; + enum ad4130_filter_type filter_type; bool ref_bufp; bool ref_bufm; })); @@ -621,7 +621,7 @@ static bool ad4130_setup_info_eq(struct ad4130_setup_in= fo *a, a->pga !=3D b->pga || a->fs !=3D b->fs || a->ref_sel !=3D b->ref_sel || - a->filter_mode !=3D b->filter_mode || + a->filter_type !=3D b->filter_type || a->ref_bufp !=3D b->ref_bufp || a->ref_bufm !=3D b->ref_bufm) return false; @@ -728,7 +728,7 @@ static int ad4130_write_slot_setup(struct ad4130_state = *st, if (ret) return ret; =20 - val =3D FIELD_PREP(AD4130_FILTER_MODE_MASK, setup_info->filter_mode) | + val =3D FIELD_PREP(AD4130_FILTER_MODE_MASK, setup_info->filter_type) | FIELD_PREP(AD4130_FILTER_SELECT_MASK, setup_info->fs); =20 ret =3D regmap_write(st->regmap, AD4130_FILTER_X_REG(slot), val); @@ -872,11 +872,11 @@ static int ad4130_set_channel_enable(struct ad4130_st= ate *st, * (used in ad4130_fs_to_freq) */ =20 -static void ad4130_freq_to_fs(enum ad4130_filter_mode filter_mode, +static void ad4130_freq_to_fs(enum ad4130_filter_type filter_type, int val, int val2, unsigned int *fs) { const struct ad4130_filter_config *filter_config =3D - &ad4130_filter_configs[filter_mode]; + &ad4130_filter_configs[filter_type]; u64 dividend, divisor; int temp; =20 @@ -895,11 +895,11 @@ static void ad4130_freq_to_fs(enum ad4130_filter_mode= filter_mode, *fs =3D temp; } =20 -static void ad4130_fs_to_freq(enum ad4130_filter_mode filter_mode, +static void ad4130_fs_to_freq(enum ad4130_filter_type filter_type, unsigned int fs, int *val, int *val2) { const struct ad4130_filter_config *filter_config =3D - &ad4130_filter_configs[filter_mode]; + &ad4130_filter_configs[filter_type]; unsigned int dividend, divisor; u64 temp; =20 @@ -911,7 +911,7 @@ static void ad4130_fs_to_freq(enum ad4130_filter_mode f= ilter_mode, *val =3D div_u64_rem(temp, NANO, val2); } =20 -static int ad4130_set_filter_mode(struct iio_dev *indio_dev, +static int ad4130_set_filter_type(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, unsigned int val) { @@ -919,17 +919,17 @@ static int ad4130_set_filter_mode(struct iio_dev *ind= io_dev, unsigned int channel =3D chan->scan_index; struct ad4130_chan_info *chan_info =3D &st->chans_info[channel]; struct ad4130_setup_info *setup_info =3D &chan_info->setup; - enum ad4130_filter_mode old_filter_mode; + enum ad4130_filter_type old_filter_type; int freq_val, freq_val2; unsigned int old_fs; int ret =3D 0; =20 guard(mutex)(&st->lock); - if (setup_info->filter_mode =3D=3D val) + if (setup_info->filter_type =3D=3D val) return 0; =20 old_fs =3D setup_info->fs; - old_filter_mode =3D setup_info->filter_mode; + old_filter_type =3D setup_info->filter_type; =20 /* * When switching between filter modes, try to match the ODR as @@ -937,55 +937,55 @@ static int ad4130_set_filter_mode(struct iio_dev *ind= io_dev, * using the old filter mode, then convert it back into FS using * the new filter mode. */ - ad4130_fs_to_freq(setup_info->filter_mode, setup_info->fs, + ad4130_fs_to_freq(setup_info->filter_type, setup_info->fs, &freq_val, &freq_val2); =20 ad4130_freq_to_fs(val, freq_val, freq_val2, &setup_info->fs); =20 - setup_info->filter_mode =3D val; + setup_info->filter_type =3D val; =20 ret =3D ad4130_write_channel_setup(st, channel, false); if (ret) { setup_info->fs =3D old_fs; - setup_info->filter_mode =3D old_filter_mode; + setup_info->filter_type =3D old_filter_type; return ret; } =20 return 0; } =20 -static int ad4130_get_filter_mode(struct iio_dev *indio_dev, +static int ad4130_get_filter_type(struct iio_dev *indio_dev, const struct iio_chan_spec *chan) { struct ad4130_state *st =3D iio_priv(indio_dev); unsigned int channel =3D chan->scan_index; struct ad4130_setup_info *setup_info =3D &st->chans_info[channel].setup; - enum ad4130_filter_mode filter_mode; + enum ad4130_filter_type filter_type; =20 guard(mutex)(&st->lock); - filter_mode =3D setup_info->filter_mode; + filter_type =3D setup_info->filter_type; =20 - return filter_mode; + return filter_type; } =20 -static const struct iio_enum ad4130_filter_mode_enum =3D { - .items =3D ad4130_filter_modes_str, - .num_items =3D ARRAY_SIZE(ad4130_filter_modes_str), - .set =3D ad4130_set_filter_mode, - .get =3D ad4130_get_filter_mode, +static const struct iio_enum ad4130_filter_type_enum =3D { + .items =3D ad4130_filter_types_str, + .num_items =3D ARRAY_SIZE(ad4130_filter_types_str), + .set =3D ad4130_set_filter_type, + .get =3D ad4130_get_filter_type, }; =20 -static const struct iio_chan_spec_ext_info ad4130_filter_mode_ext_info[] = =3D { +static const struct iio_chan_spec_ext_info ad4130_ext_info[] =3D { /* - * Intentional duplication of attributes to keep backwards compatibility - * while standardizing over the main IIO ABI for digital filtering. + * `filter_type` is the standardized IIO ABI for digital filtering. + * `filter_mode` is just kept for backwards compatibility. */ - IIO_ENUM("filter_mode", IIO_SEPARATE, &ad4130_filter_mode_enum), + IIO_ENUM("filter_mode", IIO_SEPARATE, &ad4130_filter_type_enum), IIO_ENUM_AVAILABLE("filter_mode", IIO_SHARED_BY_TYPE, - &ad4130_filter_mode_enum), - IIO_ENUM("filter_type", IIO_SEPARATE, &ad4130_filter_mode_enum), + &ad4130_filter_type_enum), + IIO_ENUM("filter_type", IIO_SEPARATE, &ad4130_filter_type_enum), IIO_ENUM_AVAILABLE("filter_type", IIO_SHARED_BY_TYPE, - &ad4130_filter_mode_enum), + &ad4130_filter_type_enum), { } }; =20 @@ -999,7 +999,7 @@ static const struct iio_chan_spec ad4130_channel_templa= te =3D { BIT(IIO_CHAN_INFO_SAMP_FREQ), .info_mask_separate_available =3D BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ), - .ext_info =3D ad4130_filter_mode_ext_info, + .ext_info =3D ad4130_ext_info, .scan_type =3D { .sign =3D 'u', .endianness =3D IIO_BE, @@ -1049,7 +1049,7 @@ static int ad4130_set_channel_freq(struct ad4130_stat= e *st, guard(mutex)(&st->lock); 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[109.210.4.206]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e47a66adsm14110736f8f.25.2025.03.03.03.47.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Mar 2025 03:47:50 -0800 (PST) From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Andy Shevchenko , Cosmin Tanislav , Dumitru Ceclan , Guillaume Ranquet , Lars-Peter Clausen , Michael Hennerich , Michael Walle , Nuno Sa , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 6/8] iio: adc: ad_sigma_delta: Add error checking for ad_sigma_delta_set_channel() Date: Mon, 3 Mar 2025 12:47:04 +0100 Message-ID: <20250303114659.1672695-16-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250303114659.1672695-10-u.kleine-koenig@baylibre.com> References: <20250303114659.1672695-10-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Developer-Signature: v=1; a=openpgp-sha256; l=1187; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=+v+ir1+IglYL05L7kQ/+NcMJ+uc5Mh8VNYIDLO2zj4c=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnxZbLpSyJJZQrMNOYSBT3O10ZES5srubfMKd/z Hdc8npRu1aJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ8WWywAKCRCPgPtYfRL+ TlsjB/wOYCnOMHsdZ0Q3jdrrQBdxHsZXk7f919eqxPaLXjMVofd/123J4vpuLOwaXwaC9W2fjs/ qEW9uVGxoJPU2pXSI/NOnW/tSiqvlVvvF0nKn8Vs8PGs4fACQy+R5WifPK8o/JDCKXnVex6BTOQ NOLo01eR/oiOROTYDKSkx1PKWUW1/efx/ARiHTLKT8bXBKRp0AGXj4nrn1ia98dXJj28h3t7D00 hkX1dnHsPcX5OjWBizSl7SxPa5dXzMQAe11k+Hsa8iu2l58v0J2FCYjmCuCXnxL75xv57fvrK1b 3mRa4JdY9akWMDP7YnNdyNbQyCL286ODl8Ga9ub/dpnFZRT8 X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 Content-Transfer-Encoding: quoted-printable All other calls to ad_sigma_delta_set_channel() in ad_sigma_delta.c check the return value afterwards. Do it for all calls. Signed-off-by: Uwe Kleine-K=C3=B6nig --- drivers/iio/adc/ad_sigma_delta.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_de= lta.c index d91a3ba127e3..6c37f8e21120 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -390,7 +390,9 @@ int ad_sigma_delta_single_conversion(struct iio_dev *in= dio_dev, if (!iio_device_claim_direct(indio_dev)) return -EBUSY; =20 - ad_sigma_delta_set_channel(sigma_delta, chan->address); + ret =3D ad_sigma_delta_set_channel(sigma_delta, chan->address); + if (ret) + goto out_release; =20 spi_bus_lock(sigma_delta->spi->controller); sigma_delta->bus_locked =3D true; @@ -431,6 +433,7 @@ int ad_sigma_delta_single_conversion(struct iio_dev *in= dio_dev, sigma_delta->keep_cs_asserted =3D false; sigma_delta->bus_locked =3D false; spi_bus_unlock(sigma_delta->spi->controller); +out_release: iio_device_release_direct(indio_dev); =20 if (ret) --=20 2.47.1 From nobody Sun Sep 7 12:25:10 2025 Received: from mail-wm1-f44.google.com (mail-wm1-f44.google.com [209.85.128.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CE39520E022 for ; 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[109.210.4.206]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43bc222362dsm23270805e9.0.2025.03.03.03.47.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Mar 2025 03:47:52 -0800 (PST) From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Andy Shevchenko , Cosmin Tanislav , Dumitru Ceclan , Guillaume Ranquet , Lars-Peter Clausen , Michael Hennerich , Michael Walle , Nuno Sa , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 7/8] iio: adc: ad7124: Implement internal calibration at probe time Date: Mon, 3 Mar 2025 12:47:05 +0100 Message-ID: <20250303114659.1672695-17-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250303114659.1672695-10-u.kleine-koenig@baylibre.com> References: <20250303114659.1672695-10-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Developer-Signature: v=1; a=openpgp-sha256; l=7681; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=jqr9EwXfZY3b+14dJHqEdl3sytYGW0GVhd2OmY7oUBw=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnxZbOJ2NHnT28BuDYn5pn9Cy6XUnoy62wNXfb8 1o1Xgxn7j+JATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ8WWzgAKCRCPgPtYfRL+ TlPWB/9kBA/YalUMm9uRc0QIp6zcwfZVklEnf5cUkfHuLQSemru4lDAKLWuZ+lL+vT0jAF4jV8n 7xZcSv8VR3a2ya5bAuJyImvR6GBMkWGZWlm2oU4J/6/6LKZcuumNLwZW6Ugvm5BmbZjxhkOsPH9 yXwP/ruUPptaJgvRK8Y4JYdMfsSulBDX+ht13pS9YSiNnCotRkmwIrQ3HG7RfqOAq4an1Q0+hSf ZCQHouM5Vd4vmdXvLmrLTJcs8OtNUYwf1/1UTrb3nYROcmrcT5Fwk6DF8Q0/zh4iPFtOM2xUJgv nTWQ6ebaS9bWCUd+OB8Hh9+tmmPqI571CRcOq9pi13xZldqj X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 Content-Transfer-Encoding: quoted-printable Use the calibration function provided by the ad_sigma_delta shim to calibrate all channels at probe time. For measurements with gain 1 (i.e. if CONFIG_x.PGA =3D 0) full-scale calibrations are not supported and the reset default value of the GAIN register is supposed to be used then. Signed-off-by: Uwe Kleine-K=C3=B6nig --- drivers/iio/adc/ad7124.c | 129 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 126 insertions(+), 3 deletions(-) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index de90ecb5f630..382f46ff2b51 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -53,6 +53,11 @@ #define AD7124_ADC_CTRL_MODE_MSK GENMASK(5, 2) #define AD7124_ADC_CTRL_MODE(x) FIELD_PREP(AD7124_ADC_CTRL_MODE_MSK, x) =20 +#define AD7124_MODE_CAL_INT_ZERO 0x5 /* Internal Zero-Scale Calibration */ +#define AD7124_MODE_CAL_INT_FULL 0x6 /* Internal Full-Scale Calibration */ +#define AD7124_MODE_CAL_SYS_ZERO 0x7 /* System Zero-Scale Calibration */ +#define AD7124_MODE_CAL_SYS_FULL 0x8 /* System Full-Scale Calibration */ + /* AD7124 ID */ #define AD7124_DEVICE_ID_MSK GENMASK(7, 4) #define AD7124_DEVICE_ID_GET(x) FIELD_GET(AD7124_DEVICE_ID_MSK, x) @@ -166,6 +171,8 @@ struct ad7124_channel_config { unsigned int odr; unsigned int odr_sel_bits; unsigned int filter_type; + unsigned int calibration_offset; + unsigned int calibration_gain; ); }; =20 @@ -186,6 +193,12 @@ struct ad7124_state { unsigned int num_channels; struct mutex cfgs_lock; /* lock for configs access */ unsigned long cfg_slots_status; /* bitmap with slot status (1 means it is= used) */ + + /* + * Stores the power-on reset value for the GAIN(x) registers which are + * needed for measurements at gain 1 (i.e. CONFIG(x).PGA =3D=3D 0) + */ + unsigned int gain_default; DECLARE_KFIFO(live_cfgs_fifo, struct ad7124_channel_config *, AD7124_MAX_= CONFIGS); }; =20 @@ -359,6 +372,8 @@ static struct ad7124_channel_config *ad7124_find_simila= r_live_cfg(struct ad7124_ unsigned int odr; unsigned int odr_sel_bits; unsigned int filter_type; + unsigned int calibration_offset; + unsigned int calibration_gain; })); =20 for (i =3D 0; i < st->num_channels; i++) { @@ -373,7 +388,9 @@ static struct ad7124_channel_config *ad7124_find_simila= r_live_cfg(struct ad7124_ cfg->pga_bits =3D=3D cfg_aux->pga_bits && cfg->odr =3D=3D cfg_aux->odr && cfg->odr_sel_bits =3D=3D cfg_aux->odr_sel_bits && - cfg->filter_type =3D=3D cfg_aux->filter_type) + cfg->filter_type =3D=3D cfg_aux->filter_type && + cfg->calibration_offset =3D=3D cfg_aux->calibration_offset && + cfg->calibration_gain =3D=3D cfg_aux->calibration_gain) return cfg_aux; } =20 @@ -429,6 +446,14 @@ static int ad7124_write_config(struct ad7124_state *st= , struct ad7124_channel_co =20 cfg->cfg_slot =3D cfg_slot; =20 + ret =3D ad_sd_write_reg(&st->sd, AD7124_OFFSET(cfg->cfg_slot), 3, cfg->ca= libration_offset); + if (ret) + return ret; + + ret =3D ad_sd_write_reg(&st->sd, AD7124_GAIN(cfg->cfg_slot), 3, cfg->cali= bration_gain); + if (ret) + return ret; + tmp =3D (cfg->buf_positive << 1) + cfg->buf_negative; val =3D AD7124_CONFIG_BIPOLAR(cfg->bipolar) | AD7124_CONFIG_REF_SEL(cfg->= refsel) | AD7124_CONFIG_IN_BUFF(tmp) | AD7124_CONFIG_PGA(cfg->pga_bits); @@ -835,13 +860,22 @@ static int ad7124_soft_reset(struct ad7124_state *st) return dev_err_probe(dev, ret, "Error reading status register\n"); =20 if (!(readval & AD7124_STATUS_POR_FLAG_MSK)) - return 0; + break; =20 /* The AD7124 requires typically 2ms to power up and settle */ usleep_range(100, 2000); } while (--timeout); =20 - return dev_err_probe(dev, -EIO, "Soft reset failed\n"); + if (readval & AD7124_STATUS_POR_FLAG_MSK) + return dev_err_probe(dev, -EIO, "Soft reset failed\n"); + + ret =3D ad_sd_read_reg(&st->sd, AD7124_GAIN(0), 3, &st->gain_default); + if (ret < 0) + return dev_err_probe(dev, ret, "Error reading gain register\n"); + + dev_dbg(dev, "Reset value of GAIN register is 0x%x\n", st->gain_default); + + return 0; } =20 static int ad7124_check_chip_id(struct ad7124_state *st) @@ -1054,6 +1088,91 @@ static int ad7124_setup(struct ad7124_state *st) return ret; } =20 +static int __ad7124_calibrate_all(struct ad7124_state *st, struct iio_dev = *indio_dev) +{ + struct device *dev =3D &st->sd.spi->dev; + int ret, i; + + for (i =3D 0; i < st->num_channels; i++) { + + if (indio_dev->channels[i].type !=3D IIO_VOLTAGE) + continue; + + /* + * For calibration the OFFSET register should hold its reset default + * value. For the GAIN register there is no such requirement but + * for gain 1 it should hold the reset default value, too. So to + * simplify matters use the reset default value for both. + */ + st->channels[i].cfg.calibration_offset =3D 0x800000; + st->channels[i].cfg.calibration_gain =3D st->gain_default; + + /* + * Full-scale calibration isn't supported at gain 1, so skip in + * that case. Note that untypically full-scale calibration has + * to happen before zero-scale calibration. This only applies to + * the internal calibration. For system calibration it's as + * usual: first zero-scale then full-scale calibration. + */ + if (st->channels[i].cfg.pga_bits > 0) { + ret =3D ad_sd_calibrate(&st->sd, AD7124_MODE_CAL_INT_FULL, i); + if (ret < 0) + return ret; + + /* + * read out the resulting value of GAIN + * after full-scale calibration because the next + * ad_sd_calibrate() call overwrites this via + * ad_sigma_delta_set_channel() -> ad7124_set_channel() + * ... -> ad7124_enable_channel(). + */ + ret =3D ad_sd_read_reg(&st->sd, AD7124_GAIN(st->channels[i].cfg.cfg_slo= t), 3, + &st->channels[i].cfg.calibration_gain); + if (ret < 0) + return ret; + } + + ret =3D ad_sd_calibrate(&st->sd, AD7124_MODE_CAL_INT_ZERO, i); + if (ret < 0) + return ret; + + ret =3D ad_sd_read_reg(&st->sd, AD7124_OFFSET(st->channels[i].cfg.cfg_sl= ot), 3, + &st->channels[i].cfg.calibration_offset); + if (ret < 0) + return ret; + + dev_dbg(dev, "offset and gain for channel %d =3D 0x%x + 0x%x\n", i, + st->channels[i].cfg.calibration_offset, + st->channels[i].cfg.calibration_gain); + } + + return 0; +} + +static int ad7124_calibrate_all(struct ad7124_state *st, struct iio_dev *i= ndio_dev) +{ + int ret; + unsigned int adc_control =3D st->adc_control; + + /* + * Calibration isn't supported at full power, so speed down a bit. + * Setting .adc_control is enough here because the control register is + * written as part of ad_sd_calibrate() -> ad_sigma_delta_set_mode(). + * The resulting calibration is then also valid for high-speed, so just + * restore adc_control afterwards. + */ + if (FIELD_GET(AD7124_ADC_CTRL_PWR_MSK, adc_control) >=3D AD7124_FULL_POWE= R) { + st->adc_control &=3D ~AD7124_ADC_CTRL_PWR_MSK; + st->adc_control |=3D AD7124_ADC_CTRL_PWR(AD7124_MID_POWER); + } + + ret =3D __ad7124_calibrate_all(st, indio_dev); + + st->adc_control =3D adc_control; + + return ret; +} + static void ad7124_reg_disable(void *r) { regulator_disable(r); @@ -1132,6 +1251,10 @@ static int ad7124_probe(struct spi_device *spi) if (ret < 0) return dev_err_probe(dev, ret, "Failed to setup triggers\n"); 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[109.210.4.206]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e47a6d17sm14048575f8f.28.2025.03.03.03.47.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Mar 2025 03:47:54 -0800 (PST) From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Andy Shevchenko , Cosmin Tanislav , Dumitru Ceclan , Guillaume Ranquet , Lars-Peter Clausen , Michael Hennerich , Michael Walle , Nuno Sa , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 8/8] iio: adc: ad7124: Implement system calibration Date: Mon, 3 Mar 2025 12:47:06 +0100 Message-ID: <20250303114659.1672695-18-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250303114659.1672695-10-u.kleine-koenig@baylibre.com> References: <20250303114659.1672695-10-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Developer-Signature: v=1; a=openpgp-sha256; l=5359; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=cGqPD8/SZrkOEEoS5r71WCJ1/AsMqIH3QA/fWi2qpiM=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnxZbQQj85GuyCEcT/+/txKbDasve9RcMnzqqly Hw1ZzYSxYWJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ8WW0AAKCRCPgPtYfRL+ Tu9CCACvrDJKvuayNJIw8lOaq4cQjCSsgpuDp3xSqYdQ2o0NL/lOdxFoQ4DOFsOhe5DawJVGVaw DBFDkuLlNr/FSXmbtWmojqmMpdi50c0jrtDWW4rSB0N3PBSHol+PQgWEbpx+3WmlNuOf0a4ozOS 4IiTn8pdcBWdPOGENAzLT2G7xVtVuO93XpPDpxQpyba7DNud6doMPUPYC5TUIm2OYQS8FQ+c8Ss fKPaoM03QcH/s5ObNYfDYsm8WVRZbI3a4nvt1SIgYFK7FIZg2OZMGHWly/xl5vKD3COFkNodkZM YoZRbA2e+yL9SuvgxnprI6blsEpMFRVIExfDONzOlcuZgnWr X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 Content-Transfer-Encoding: quoted-printable Allow triggering both zero-scale and full-scale calibration via sysfs in the same way as it's done for ad7173. Signed-off-by: Uwe Kleine-K=C3=B6nig --- drivers/iio/adc/ad7124.c | 153 ++++++++++++++++++++++++++++++++++----- 1 file changed, 136 insertions(+), 17 deletions(-) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 382f46ff2b51..5ab0d3e48c43 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -4,6 +4,7 @@ * * Copyright 2018 Analog Devices Inc. */ + #include #include #include @@ -181,6 +182,7 @@ struct ad7124_channel { struct ad7124_channel_config cfg; unsigned int ain; unsigned int slot; + u8 syscalib_mode; }; =20 struct ad7124_state { @@ -202,23 +204,6 @@ struct ad7124_state { DECLARE_KFIFO(live_cfgs_fifo, struct ad7124_channel_config *, AD7124_MAX_= CONFIGS); }; =20 -static const struct iio_chan_spec ad7124_channel_template =3D { - .type =3D IIO_VOLTAGE, - .indexed =3D 1, - .differential =3D 1, - .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | - BIT(IIO_CHAN_INFO_SCALE) | - BIT(IIO_CHAN_INFO_OFFSET) | - BIT(IIO_CHAN_INFO_SAMP_FREQ) | - BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), - .scan_type =3D { - .sign =3D 'u', - .realbits =3D 24, - .storagebits =3D 32, - .endianness =3D IIO_BE, - }, -}; - static struct ad7124_chip_info ad7124_chip_info_tbl[] =3D { [ID_AD7124_4] =3D { .name =3D "ad7124-4", @@ -903,6 +888,140 @@ static int ad7124_check_chip_id(struct ad7124_state *= st) return 0; } =20 +enum { + AD7124_SYSCALIB_ZERO_SCALE, + AD7124_SYSCALIB_FULL_SCALE, +}; + +static int ad7124_syscalib_locked(struct ad7124_state *st, const struct ii= o_chan_spec *chan) +{ + struct device *dev =3D &st->sd.spi->dev; + struct ad7124_channel *ch =3D &st->channels[chan->channel]; + int ret; + + if (ch->syscalib_mode =3D=3D AD7124_SYSCALIB_ZERO_SCALE) { + ch->cfg.calibration_offset =3D 0x800000; + + ret =3D ad_sd_calibrate(&st->sd, AD7124_MODE_CAL_SYS_ZERO, + chan->address); + if (ret < 0) + return ret; + + ret =3D ad_sd_read_reg(&st->sd, AD7124_OFFSET(ch->cfg.cfg_slot), 3, + &ch->cfg.calibration_offset); + if (ret < 0) + return ret; + + dev_dbg(dev, "offset for channel %d after zero-scale calibration: 0x%x\n= ", + chan->channel, ch->cfg.calibration_offset); + } else { + ch->cfg.calibration_gain =3D st->gain_default; + + ret =3D ad_sd_calibrate(&st->sd, AD7124_MODE_CAL_SYS_FULL, + chan->address); + if (ret < 0) + return ret; + + ret =3D ad_sd_read_reg(&st->sd, AD7124_GAIN(ch->cfg.cfg_slot), 3, + &ch->cfg.calibration_gain); + if (ret < 0) + return ret; + + dev_dbg(dev, "gain for channel %d after full-scale calibration: 0x%x\n", + chan->channel, ch->cfg.calibration_gain); + } + + return 0; +} + +static ssize_t ad7124_write_syscalib(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + const char *buf, size_t len) +{ + struct ad7124_state *st =3D iio_priv(indio_dev); + bool sys_calib; + int ret; + + ret =3D kstrtobool(buf, &sys_calib); + if (ret) + return ret; + + if (!sys_calib) + return len; + + if (!iio_device_claim_direct(indio_dev)) + return -EBUSY; + + ret =3D ad7124_syscalib_locked(st, chan); + + iio_device_release_direct(indio_dev); + + return ret ?: len; +} + +static const char * const ad7124_syscalib_modes[] =3D { + [AD7124_SYSCALIB_ZERO_SCALE] =3D "zero_scale", + [AD7124_SYSCALIB_FULL_SCALE] =3D "full_scale", +}; + +static int ad7124_set_syscalib_mode(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + unsigned int mode) +{ + struct ad7124_state *st =3D iio_priv(indio_dev); + + st->channels[chan->channel].syscalib_mode =3D mode; + + return 0; +} + +static int ad7124_get_syscalib_mode(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan) +{ + struct ad7124_state *st =3D iio_priv(indio_dev); + + return st->channels[chan->channel].syscalib_mode; +} + +static const struct iio_enum ad7124_syscalib_mode_enum =3D { + .items =3D ad7124_syscalib_modes, + .num_items =3D ARRAY_SIZE(ad7124_syscalib_modes), + .set =3D ad7124_set_syscalib_mode, + .get =3D ad7124_get_syscalib_mode +}; + +static const struct iio_chan_spec_ext_info ad7124_calibsys_ext_info[] =3D { + { + .name =3D "sys_calibration", + .write =3D ad7124_write_syscalib, + .shared =3D IIO_SEPARATE, + }, + IIO_ENUM("sys_calibration_mode", IIO_SEPARATE, + &ad7124_syscalib_mode_enum), + IIO_ENUM_AVAILABLE("sys_calibration_mode", IIO_SHARED_BY_TYPE, + &ad7124_syscalib_mode_enum), + { } +}; + +static const struct iio_chan_spec ad7124_channel_template =3D { + .type =3D IIO_VOLTAGE, + .indexed =3D 1, + .differential =3D 1, + .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE) | + BIT(IIO_CHAN_INFO_OFFSET) | + BIT(IIO_CHAN_INFO_SAMP_FREQ) | + BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), + .scan_type =3D { + .sign =3D 'u', + .realbits =3D 24, + .storagebits =3D 32, + .endianness =3D IIO_BE, + }, + .ext_info =3D ad7124_calibsys_ext_info, +}; + /* * Input specifiers 8 - 15 are explicitly reserved for ad7124-4 * while they are fine for ad7124-8. Values above 31 don't fit --=20 2.47.1