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Sat, 01 Mar 2025 01:25:00 -0800 (PST) From: Dmitry Baryshkov Date: Sat, 01 Mar 2025 11:24:54 +0200 Subject: [PATCH v2 1/5] drm/msm/dpu: remove DSC feature bit for PINGPONG on MSM8937 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250301-dpu-fix-catalog-v2-1-498271be8b50@linaro.org> References: <20250301-dpu-fix-catalog-v2-0-498271be8b50@linaro.org> In-Reply-To: <20250301-dpu-fix-catalog-v2-0-498271be8b50@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , =?utf-8?q?Barnab=C3=A1s_Cz=C3=A9m=C3=A1n?= , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1574; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=6iPuaAjsYMeQVkUS24obUEbYrmaOHTnqfR5LGKvkJrI=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnwtJn4QALW4Yp9jHaAiSTff5oWqqXJrWsumAXS yBUql9GT86JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ8LSZwAKCRCLPIo+Aiko 1bKaB/0TSkQtXBypTrGIYYMHCArbLA2WM5wcSRk1VeH/6Oy/jD6i8npth08Pb7n3qqv42TSGdFP 9Ah5kV7z1VZiMxs16n5Zqq/sUNCXg4gVnuuNUTp/Q0RQGDZdwMyhANgV7PFR//V6/UVDw0BKhub t8ehERkXMhY00pPHTnpuTRlqvUkbpsWNx8xy801MR0qAm4NSJ9PFmWbiaa7+zbDlpSxoU3g6kog AlLCfhbQ1mQpBiCGvxrFEvOayxMX+Qra03tg/D9jtulkr8Qyn52sfGmKsoMENLpc7PBh5isfGBE w1iRAIAElUBfHMniHEFWvPnwro0GxfbQZM5s+GTcwVjZCYk6 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The MSM8937 platform doesn't have DSC blocks nor does have it DSC registers in the PINGPONG block. Drop the DPU_PINGPONG_DSC feature bit from the PINGPONG's feature mask and, as it is the only remaining bit, drop the .features assignment completely. Fixes: c079680bb0fa ("drm/msm/dpu: Add support for MSM8937") Reported-by: Abhinav Kumar Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h b/dri= vers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h index ab3dfb0b374ead36c7f07b0a77c703fb2c09ff8a..a848f825c5948c5819758e131af= 60b83b543b15a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h @@ -100,14 +100,12 @@ static const struct dpu_pingpong_cfg msm8937_pp[] =3D= { { .name =3D "pingpong_0", .id =3D PINGPONG_0, .base =3D 0x70000, .len =3D 0xd4, - .features =3D PINGPONG_MSM8996_MASK, .sblk =3D &msm8996_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12), }, { .name =3D "pingpong_1", .id =3D PINGPONG_1, .base =3D 0x70800, .len =3D 0xd4, - .features =3D PINGPONG_MSM8996_MASK, .sblk =3D &msm8996_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13), --=20 2.39.5 From nobody Sun Feb 8 18:10:42 2026 Received: from mail-lj1-f181.google.com (mail-lj1-f181.google.com [209.85.208.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 692D91D5CF8 for ; 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Sat, 01 Mar 2025 01:25:04 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5494417432csm738406e87.52.2025.03.01.01.25.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Mar 2025 01:25:03 -0800 (PST) From: Dmitry Baryshkov Date: Sat, 01 Mar 2025 11:24:55 +0200 Subject: [PATCH v2 2/5] drm/msm/dpu: remove DSC feature bit for PINGPONG on MSM8917 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250301-dpu-fix-catalog-v2-2-498271be8b50@linaro.org> References: <20250301-dpu-fix-catalog-v2-0-498271be8b50@linaro.org> In-Reply-To: <20250301-dpu-fix-catalog-v2-0-498271be8b50@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , =?utf-8?q?Barnab=C3=A1s_Cz=C3=A9m=C3=A1n?= , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1305; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=MfIfb1GLue9MerIIR2rhWjY6rmZBoFPVe5vbiAysvVc=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnwtJobSugy0kB0JIsHODpjBT4yZPMEcMtlazNt TTJpig19bCJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ8LSaAAKCRCLPIo+Aiko 1VQ0B/9QjGsUEpb+DwWLNz/fIYKFPwXC7E2uGmZ4Yredir90cNDR1OI3lNMPAxYFaM6qoQOcRjk WHdMYESn1aXu0fSNpX0hxt3d7J29pPQL7AsmolGiYRLsx7b4ioytiHfzQPqpveYeIp3UHcjrfSo fghL+fxJZ755HA3xa/g4tia4Djz6aKIp5opjOkNZXxi9oy3y6DUDoimd4GFk071lq3uxox9vmqI XDqnMFtuQ0Igx3CHoEOCW5cJLpu+sDu+Xa0gy+pMis6++f/Vz+F5GFANsvu7KxEDzTe0A8pLOm9 AkvmZBtxY/piGB36iX2mR/pJTxjinj661+YqhnTvu+St/Kv1 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The MSM8917 platform doesn't have DSC blocks nor does have it DSC registers in the PINGPONG block. Drop the DPU_PINGPONG_DSC feature bit from the PINGPONG's feature mask and, as it is the only remaining bit, drop the .features assignment completely. Fixes: 62af6e1cb596 ("drm/msm/dpu: Add support for MSM8917") Reported-by: Abhinav Kumar Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_15_msm8917.h | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_15_msm8917.h b/dri= vers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_15_msm8917.h index 6bdaecca676144f9162ab1839d99f3e2e3386dc7..6f2c40b303e2b017fc3f913563a= 1a251779a9124 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_15_msm8917.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_15_msm8917.h @@ -93,7 +93,6 @@ static const struct dpu_pingpong_cfg msm8917_pp[] =3D { { .name =3D "pingpong_0", .id =3D PINGPONG_0, .base =3D 0x70000, .len =3D 0xd4, - .features =3D PINGPONG_MSM8996_MASK, .sblk =3D &msm8996_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12), --=20 2.39.5 From nobody Sun Feb 8 18:10:42 2026 Received: from mail-lf1-f41.google.com (mail-lf1-f41.google.com [209.85.167.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB0F01D63F9 for ; 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Sat, 01 Mar 2025 01:25:06 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5494417432csm738406e87.52.2025.03.01.01.25.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Mar 2025 01:25:05 -0800 (PST) From: Dmitry Baryshkov Date: Sat, 01 Mar 2025 11:24:56 +0200 Subject: [PATCH v2 3/5] drm/msm/dpu: remove DSC feature bit for PINGPONG on MSM8953 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250301-dpu-fix-catalog-v2-3-498271be8b50@linaro.org> References: <20250301-dpu-fix-catalog-v2-0-498271be8b50@linaro.org> In-Reply-To: <20250301-dpu-fix-catalog-v2-0-498271be8b50@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , =?utf-8?q?Barnab=C3=A1s_Cz=C3=A9m=C3=A1n?= , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1574; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=3KiS1JFwz6siEC5WVugc4OTInSpbOeJ8pCpFDBbI8EA=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQ/qhSxlfJgT2tZu2nzENWHi/au3+z5m5nxaGzpnq4P/Ne +WEhAKhTkZjFgZGLgZZMUUWn4KWqTGbksM+7JhaDzOIlQlkCgMXpwBMZK0cB8Pkny1u1dbz98w3 jqnft7fvUZfdeRapjeq/K1zXCGwv+vQ5OyG287DkzhQThQ+v/q+/8fnkqYtWp3fMv2IRVqj3pWO /bnH/D3bTz8fuaeSapm81eBdUtT9AxPpnfFa/cuua0A7VyutlBVqXq+IP852//86N5bzHhf1X4z RbfgpM4Wn95bpEbabUKh3JPgURhfqQhtOhrh3yi9M3bF+4adsKE18Zl4QVlTpeD0O/qyrHyhz2F YhYXZh4e9/OzvjS1FldamaTroWLb89O8zlS9qU+eG0Xt49wLwePs27vhckxhZYPLU44bo7XTPHb NuthlVZG7Jz0I36mhz4Ksjea75xTLDPNZoWSVtGxWQavAA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The MSM8953 platform doesn't have DSC blocks nor does have it DSC registers in the PINGPONG block. Drop the DPU_PINGPONG_DSC feature bit from the PINGPONG's feature mask and, as it is the only remaining bit, drop the .features assignment completely. Fixes: 7a6109ce1c2c ("drm/msm/dpu: Add support for MSM8953") Reported-by: Abhinav Kumar Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_16_msm8953.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_16_msm8953.h b/dri= vers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_16_msm8953.h index 14f36ea6ad0eb61e87f043437a8cd78bb1bde49c..04f2021a7bef1bdefee77ab3407= 4c06713f80487 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_16_msm8953.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_16_msm8953.h @@ -100,14 +100,12 @@ static const struct dpu_pingpong_cfg msm8953_pp[] =3D= { { .name =3D "pingpong_0", .id =3D PINGPONG_0, .base =3D 0x70000, .len =3D 0xd4, - .features =3D PINGPONG_MSM8996_MASK, .sblk =3D &msm8996_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12), }, { .name =3D "pingpong_1", .id =3D PINGPONG_1, .base =3D 0x70800, .len =3D 0xd4, - .features =3D PINGPONG_MSM8996_MASK, .sblk =3D &msm8996_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13), --=20 2.39.5 From nobody Sun Feb 8 18:10:42 2026 Received: from mail-lf1-f47.google.com (mail-lf1-f47.google.com [209.85.167.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A2291D88C3 for ; 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Sat, 01 Mar 2025 01:25:09 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5494417432csm738406e87.52.2025.03.01.01.25.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Mar 2025 01:25:08 -0800 (PST) From: Dmitry Baryshkov Date: Sat, 01 Mar 2025 11:24:57 +0200 Subject: [PATCH v2 4/5] drm/msm/dpu: drop TE2 definitions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250301-dpu-fix-catalog-v2-4-498271be8b50@linaro.org> References: <20250301-dpu-fix-catalog-v2-0-498271be8b50@linaro.org> In-Reply-To: <20250301-dpu-fix-catalog-v2-0-498271be8b50@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , =?utf-8?q?Barnab=C3=A1s_Cz=C3=A9m=C3=A1n?= , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=8773; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=FGk4O1VHJ/AALXi9JU8E7/AS9MUo+YPgs+S6pZa0Mrg=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnwtJoUqN4knEcdJD0ev8uxf4olTQ0qPmspUIZZ dF+m4E+3HuJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ8LSaAAKCRCLPIo+Aiko 1WZJB/0QBY82ZFrTQlyyCk4Fj81ctmok/eKg87Go3jbdS/MB3AXf0GlaRXlRL1cfEtEPsCDnV6R j5aRI23DxgzeZf6iBBgrUfsDWiWenGEC1O/MxgcR7uphZmn14/D/1D3MOZeZ+NnQtuk1W0/N0EX EkWd7X5Jc2Qimj9WSGRIeoPt8EZEDZy4V/ojdhJAJxytHbR5Sh4lYUhAjYnVxuReDT6l6nCySDr quWpPjOOb5raORp7puz5D3o2OdE+ChOhgFPv95xNijDrI7IfDsM109K5HNOhP107Sv7qH2LD1lI 8rEhgiM3Xc6DzRL16MB3GnydaXEu/7NGgvzvIOWTYW+aWvLY X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Neither DPU driver nor vendor SDE driver do not use TE2 definitions (and, in case of SDE driver, never did). Semantics of the TE2 feature bit and .te2 sblk are not completely clear. Drop these bits from the catalog with the possibility of reintroducing them later if we need to support ppsplit. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h | 8 ++++---- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 8 ++++---- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h | 8 ++++---- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h | 4 ++-- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h | 8 ++++---- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 17 -------------= ---- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 6 +----- 7 files changed, 19 insertions(+), 40 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h b/driv= ers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h index 491f6f5827d151011dd3f74bef2a4b8bf69591ab..400739295de5aa509ed3a7f6c82= ef45dda21c47f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h @@ -181,15 +181,15 @@ static const struct dpu_pingpong_cfg msm8996_pp[] =3D= { { .name =3D "pingpong_0", .id =3D PINGPONG_0, .base =3D 0x70000, .len =3D 0xd4, - .features =3D PINGPONG_MSM8996_TE2_MASK, - .sblk =3D &msm8996_pp_sblk_te, + .features =3D PINGPONG_MSM8996_MASK, + .sblk =3D &msm8996_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12), }, { .name =3D "pingpong_1", .id =3D PINGPONG_1, .base =3D 0x70800, .len =3D 0xd4, - .features =3D PINGPONG_MSM8996_TE2_MASK, - .sblk =3D &msm8996_pp_sblk_te, + .features =3D PINGPONG_MSM8996_MASK, + .sblk =3D &msm8996_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13), }, { diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h b/driv= ers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h index 64c94e919a69804599916404dff59fa4a6ac6cff..a253e0fdc556b57aa3752b81b80= 3e84550ba146e 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h @@ -170,15 +170,15 @@ static const struct dpu_pingpong_cfg msm8998_pp[] =3D= { { .name =3D "pingpong_0", .id =3D PINGPONG_0, .base =3D 0x70000, .len =3D 0xd4, - .features =3D PINGPONG_SDM845_TE2_MASK, - .sblk =3D &sdm845_pp_sblk_te, + .features =3D PINGPONG_SDM845_MASK, + .sblk =3D &sdm845_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12), }, { .name =3D "pingpong_1", .id =3D PINGPONG_1, .base =3D 0x70800, .len =3D 0xd4, - .features =3D PINGPONG_SDM845_TE2_MASK, - .sblk =3D &sdm845_pp_sblk_te, + .features =3D PINGPONG_SDM845_MASK, + .sblk =3D &sdm845_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13), }, { diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h b/drive= rs/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h index 424815e7fb7dd858448bd41b5368b729373035f8..4464d4568aba0577a6f957bbd5d= 8d1c73f68b403 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h @@ -141,15 +141,15 @@ static const struct dpu_pingpong_cfg sdm660_pp[] =3D { { .name =3D "pingpong_0", .id =3D PINGPONG_0, .base =3D 0x70000, .len =3D 0xd4, - .features =3D PINGPONG_SDM845_TE2_MASK, - .sblk =3D &sdm845_pp_sblk_te, + .features =3D PINGPONG_SDM845_MASK, + .sblk =3D &sdm845_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12), }, { .name =3D "pingpong_1", .id =3D PINGPONG_1, .base =3D 0x70800, .len =3D 0xd4, - .features =3D PINGPONG_SDM845_TE2_MASK, - .sblk =3D &sdm845_pp_sblk_te, + .features =3D PINGPONG_SDM845_MASK, + .sblk =3D &sdm845_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13), }, { diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h b/drive= rs/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h index df01227fc36468f4945c03e767e1409ea4fc0896..3aed9aa4c533f167ece7b4a5eb8= 4fe49c4929df5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h @@ -115,8 +115,8 @@ static const struct dpu_pingpong_cfg sdm630_pp[] =3D { { .name =3D "pingpong_0", .id =3D PINGPONG_0, .base =3D 0x70000, .len =3D 0xd4, - .features =3D PINGPONG_SDM845_TE2_MASK, - .sblk =3D &sdm845_pp_sblk_te, + .features =3D PINGPONG_SDM845_MASK, + .sblk =3D &sdm845_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12), }, { diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h b/drive= rs/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h index 72bd4f7e9e504c771d999dcf6277fceb169cffca..c122782ec8bd7e5ad68729c8c12= bc8ccd0cfe0c2 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h @@ -194,15 +194,15 @@ static const struct dpu_pingpong_cfg sdm845_pp[] =3D { { .name =3D "pingpong_0", .id =3D PINGPONG_0, .base =3D 0x70000, .len =3D 0xd4, - .features =3D PINGPONG_SDM845_TE2_MASK, - .sblk =3D &sdm845_pp_sblk_te, + .features =3D PINGPONG_SDM845_MASK, + .sblk =3D &sdm845_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12), }, { .name =3D "pingpong_1", .id =3D PINGPONG_1, .base =3D 0x70800, .len =3D 0xd4, - .features =3D PINGPONG_SDM845_TE2_MASK, - .sblk =3D &sdm845_pp_sblk_te, + .features =3D PINGPONG_SDM845_MASK, + .sblk =3D &sdm845_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13), }, { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/d= rm/msm/disp/dpu1/dpu_hw_catalog.c index 0b342c043875f3329a9f71c5e751b2244f9f5ef7..b67578738dffe1ac83530d93eb0= e631f21384efc 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -98,15 +98,9 @@ #define PINGPONG_MSM8996_MASK \ (BIT(DPU_PINGPONG_DSC)) =20 -#define PINGPONG_MSM8996_TE2_MASK \ - (PINGPONG_MSM8996_MASK | BIT(DPU_PINGPONG_TE2)) - #define PINGPONG_SDM845_MASK \ (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_DSC)) =20 -#define PINGPONG_SDM845_TE2_MASK \ - (PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2)) - #define PINGPONG_SM8150_MASK \ (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_DSC)) =20 @@ -465,22 +459,11 @@ static const struct dpu_dspp_sub_blks sdm845_dspp_sbl= k =3D { /************************************************************* * PINGPONG sub blocks config *************************************************************/ -static const struct dpu_pingpong_sub_blks msm8996_pp_sblk_te =3D { - .te2 =3D {.name =3D "te2", .base =3D 0x2000, .len =3D 0x0, - .version =3D 0x1}, -}; =20 static const struct dpu_pingpong_sub_blks msm8996_pp_sblk =3D { /* No dither block */ }; =20 -static const struct dpu_pingpong_sub_blks sdm845_pp_sblk_te =3D { - .te2 =3D {.name =3D "te2", .base =3D 0x2000, .len =3D 0x0, - .version =3D 0x1}, - .dither =3D {.name =3D "dither", .base =3D 0x30e0, - .len =3D 0x20, .version =3D 0x10000}, -}; - static const struct dpu_pingpong_sub_blks sdm845_pp_sblk =3D { .dither =3D {.name =3D "dither", .base =3D 0x30e0, .len =3D 0x20, .version =3D 0x10000}, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/d= rm/msm/disp/dpu1/dpu_hw_catalog.h index 4cea19e1a20380c56ae014f2d33a6884a72e0ca0..07b50e23ee954b96e7e6bd684dc= 12823f99d630b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h @@ -115,7 +115,6 @@ enum { =20 /** * PINGPONG sub-blocks - * @DPU_PINGPONG_TE2 Additional tear check block for split pipes * @DPU_PINGPONG_SPLIT PP block supports split fifo * @DPU_PINGPONG_SLAVE PP block is a suitable slave for split fifo * @DPU_PINGPONG_DITHER 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Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250301-dpu-fix-catalog-v2-5-498271be8b50@linaro.org> References: <20250301-dpu-fix-catalog-v2-0-498271be8b50@linaro.org> In-Reply-To: <20250301-dpu-fix-catalog-v2-0-498271be8b50@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , =?utf-8?q?Barnab=C3=A1s_Cz=C3=A9m=C3=A1n?= , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1811; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=xfJndy0LJ6tSYaPs6OPWvlHfde8Gt+RzIdnKqXQJW2A=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnwtJouDh1p63euLoMf/eO1Aa1kaVi4m9jHe64K bORUvpxw0GJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ8LSaAAKCRCLPIo+Aiko 1Q2wB/9+J8HcIzLcD4Z54mCSlyjwkQ3C2RZjJ0uAwHKstzXjx0uAq015I1fXZN787warvOm3j3L ig0302evj00WTzKaZrN10rzDnrgNK02AHwxv8GzoFst4YwaX6cEHT+KdUdURGSwS9ZTrJiTxTLw mxpz/opigMTdni3hSRSAGrPYop6rS3y8nVJ4FaFfXPptbG/RBr0iOlIfL8rgqK6DWb0bw7vYMJm xlMPF66WvRaTDGCudXLahAGjGqT4ggHR+p03OVjhQdOyCGRscvTvI7Q3JwqN09qFwJSKR/+y78n vU7sLNkNz1VHMK+BKtoWqHFza6tec6uBRWhHiKh9KtHSCX/W X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The SDM630 platform doesn't have DSC blocks nor does have it DSC registers in the PINGPONG block. Drop the DPU_PINGPONG_DSC feature bit from the PINGPONG's feature mask, replacing PINGPONG_SDM845_MASK with BIT(DPU_PINGPONG_DITHER). Fixes: 7204df5e7e68 ("drm/msm/dpu: add support for SDM660 and SDM630 platfo= rms") Reported-by: Abhinav Kumar Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- Note, Konrad pointed out that vendor DT doesn't define DIPTHER support for this platform, however I believe this is because support for this platform predates DITHER support in the vendor kernels. --- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h b/drive= rs/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h index 3aed9aa4c533f167ece7b4a5eb84fe49c4929df5..99c0f824d8f00474812bde12e7d= 83ba3de1834f1 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h @@ -115,14 +115,14 @@ static const struct dpu_pingpong_cfg sdm630_pp[] =3D { { .name =3D "pingpong_0", .id =3D PINGPONG_0, .base =3D 0x70000, .len =3D 0xd4, - .features =3D PINGPONG_SDM845_MASK, + .features =3D BIT(DPU_PINGPONG_DITHER), .sblk =3D &sdm845_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12), }, { .name =3D "pingpong_2", .id =3D PINGPONG_2, .base =3D 0x71000, .len =3D 0xd4, - .features =3D PINGPONG_SDM845_MASK, + .features =3D BIT(DPU_PINGPONG_DITHER), .sblk =3D &sdm845_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 14), --=20 2.39.5