From nobody Mon Feb 9 00:55:09 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF04D26E642; Fri, 28 Feb 2025 14:53:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740754401; cv=none; b=RVJxnYvmTaxPuniJow8HyYvUo4akbFdkVxWyj8UHnXtwW3nzX0QTB1a89TiN9ngQCgdRSIr1HmGvLOJ8mWr3gZEiAfK2W5VF4bApK5e3zOgvyBGgZUYIqKXgfY3c2sAnQJVeJGc41lroXhtDyBgeGdrBbj3g6G7A+kVTF8GC0w0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740754401; c=relaxed/simple; bh=A+OjilsXusgmzLCL9Wv/h1+R9nNWJKHUhBgcxvTFFXQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Vce2YAdKzfBUh1m01ljfmb98Q0Q5a4rqQ+zMhmy8GHbqS8T9Ky3WKUuMWiMN3FeqJtoVP6clDYu1WLV7MJ1ODu1HJbHh/ShzlaxyuT36nt8AznwIhZaGBTeoU99JXFKIchHfwQMTCMAC/XlyMs+0dozU+qDxXzXtx67nD6wOOEI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=C+oLPH4d; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="C+oLPH4d" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1740754397; bh=A+OjilsXusgmzLCL9Wv/h1+R9nNWJKHUhBgcxvTFFXQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=C+oLPH4dgjkKoYCRr3GNEYn5OL95zVUY1cCvrY68xREqyQVL7Hil7Vb+qR9HOQYvx WnnV4w89SmIY75Az/cAjt9m320+RcdbT9htkuOAxKzjWEFlPBo2BexErGv8y7p5nwX ekWv1RG5DsPPnAQequ8hqicUWUzzm+YJ7YxDb9ZK60EmSRkV0VEGiKj732D7llAwD5 wxDiT75NdpbQUxJmSsr3aSwOSJ3qM60hRiifLCXSkTluxG1/h9B4/Thk60ZpC3CAFN USJjQW8QU135NUTR6IXqrjGVEujK90Ra/pWySpzKyCGGDw6QDkDZ84P+IeOKkOFw1c /Ozm7bxahVp/w== Received: from trenzalore.hitronhub.home (unknown [23.233.251.139]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: detlev) by bali.collaboradmins.com (Postfix) with ESMTPSA id BBF3A17E0B13; Fri, 28 Feb 2025 15:53:15 +0100 (CET) From: Detlev Casanova To: linux-kernel@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Detlev Casanova , Alexey Charkov , Dragan Simic , Stephen Chen , Kever Yang , Liang Chen , Elaine Zhang , Frank Wang , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, kernel@collabora.com Subject: [PATCH 1/2] arm64: dts: rockchip: Add SFC nodes for rk3576 Date: Fri, 28 Feb 2025 09:50:47 -0500 Message-ID: <20250228145304.581349-2-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250228145304.581349-1-detlev.casanova@collabora.com> References: <20250228145304.581349-1-detlev.casanova@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The rk3576 SoC has 2 SFC cores that provide FSPI functions. Signed-off-by: Detlev Casanova --- arch/arm64/boot/dts/rockchip/rk3576.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts= /rockchip/rk3576.dtsi index 4dde954043ef6..a9849003c8dd6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -1221,6 +1221,17 @@ gmac1_mtl_tx_setup: tx-queues-config { }; }; =20 + sfc1: spi@2a300000 { + compatible =3D "rockchip,sfc"; + reg =3D <0x0 0x2a300000 0x0 0x4000>; + interrupts =3D ; + clocks =3D <&cru SCLK_FSPI1_X2>, <&cru HCLK_FSPI1>; + clock-names =3D "clk_sfc", "hclk_sfc"; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; + sdmmc: mmc@2a310000 { compatible =3D "rockchip,rk3576-dw-mshc"; reg =3D <0x0 0x2a310000 0x0 0x4000>; @@ -1260,6 +1271,17 @@ sdhci: mmc@2a330000 { status =3D "disabled"; }; =20 + sfc0: spi@2a340000 { + compatible =3D "rockchip,sfc"; + reg =3D <0x0 0x2a340000 0x0 0x4000>; + interrupts =3D ; + clocks =3D <&cru SCLK_FSPI_X2>, <&cru HCLK_FSPI>; + clock-names =3D "clk_sfc", "hclk_sfc"; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; + gic: interrupt-controller@2a701000 { compatible =3D "arm,gic-400"; reg =3D <0x0 0x2a701000 0 0x10000>, --=20 2.48.1