From nobody Thu Dec 18 16:14:28 2025 Received: from out-176.mta0.migadu.com (out-176.mta0.migadu.com [91.218.175.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 867DD17A5BD for ; Thu, 27 Feb 2025 01:27:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740619655; cv=none; b=PzJV+gDTTvSvmjyx/uPRoRJzLrRtVAFweWc/3napY+GkE2KtPkAMybBend21TDN9n6ww9InCekrIwcxzw7E/c8Kwc3TM/Yi1B9LjF62SlAvSqidr4FsarsYpX4RJwvAw5ksI9AX5igGssAXZFkiwgL1iCzB1Z566pkZnhndE4Js= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740619655; c=relaxed/simple; bh=H2bpdruzg/EBVjdVmIrlMUnaIbKXfOPnMB/1jyeS2fU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bAwyuYSbGCAyETxcFv/MLaGjVWb12lQ1UucSVx15uat1+vOd8EyG/I8MWsfannLEBbtNUe/+C5yPsdQqYQhcGTptEhJvRpyS6ZOW3iTLiaWuuOCSXVMbWKArM69JWJnMvgfAypZ312hoPg2ac4mFC3kLmMrIvCEiPosIf4FlIPE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=Su615WOE; arc=none smtp.client-ip=91.218.175.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="Su615WOE" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1740619650; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=2/rfCNSW+6bre2lfwWT68fKgkLnX8sDUsb4ruuQm2Wc=; b=Su615WOEArZE8X3+Uc3YRp+6CVuhiTh8ZFc9bisiURu1l0R/wkFy/0sXHXKGVuCBJrjNEy dHAJNVe/oJOQ1V4vb3Nl1jDT/asVU9nLG/NQryvWnB3zspfMBqWHJ93sETFl3SyTYAd4jO +ijf3RDMUvoCqe5S5vS6jXLCSPhnx5o= From: Yosry Ahmed To: x86@kernel.org, Sean Christopherson Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Pawan Gupta , Andy Lutomirski , Peter Zijlstra , Josh Poimboeuf , Paolo Bonzini , Jim Mattson , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Yosry Ahmed Subject: [PATCH v2 1/6] x86/bugs: Move the X86_FEATURE_USE_IBPB check into callers Date: Thu, 27 Feb 2025 01:27:07 +0000 Message-ID: <20250227012712.3193063-2-yosry.ahmed@linux.dev> In-Reply-To: <20250227012712.3193063-1-yosry.ahmed@linux.dev> References: <20250227012712.3193063-1-yosry.ahmed@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" indirect_branch_prediction_barrier() only performs the MSR write if X86_FEATURE_USE_IBPB is set, using alternative_msr_write(). In preparation for removing X86_FEATURE_USE_IBPB, move the feature check into the callers so that they can be addressed one-by-one, and use X86_FEATURE_IBPB instead to guard the MSR write. Signed-off-by: Yosry Ahmed Acked-by: Josh Poimboeuf Acked-by: Sean Christopherson --- arch/x86/include/asm/nospec-branch.h | 2 +- arch/x86/kernel/cpu/bugs.c | 2 +- arch/x86/kvm/svm/svm.c | 3 ++- arch/x86/kvm/vmx/nested.c | 3 ++- arch/x86/kvm/vmx/vmx.c | 3 ++- arch/x86/mm/tlb.c | 7 ++++--- 6 files changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/no= spec-branch.h index 7e8bf78c03d5d..7cbb76a2434b9 100644 --- a/arch/x86/include/asm/nospec-branch.h +++ b/arch/x86/include/asm/nospec-branch.h @@ -515,7 +515,7 @@ extern u64 x86_pred_cmd; =20 static inline void indirect_branch_prediction_barrier(void) { - alternative_msr_write(MSR_IA32_PRED_CMD, x86_pred_cmd, X86_FEATURE_USE_IB= PB); + alternative_msr_write(MSR_IA32_PRED_CMD, x86_pred_cmd, X86_FEATURE_IBPB); } =20 /* The Intel SPEC CTRL MSR base value cache */ diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index 1d7afc40f2272..754150fc05784 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c @@ -2272,7 +2272,7 @@ static int ib_prctl_set(struct task_struct *task, uns= igned long ctrl) if (ctrl =3D=3D PR_SPEC_FORCE_DISABLE) task_set_spec_ib_force_disable(task); task_update_spec_tif(task); - if (task =3D=3D current) + if (task =3D=3D current && cpu_feature_enabled(X86_FEATURE_USE_IBPB)) indirect_branch_prediction_barrier(); break; default: diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 77ab66c5bb962..57222c3b56592 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -1565,7 +1565,8 @@ static void svm_vcpu_load(struct kvm_vcpu *vcpu, int = cpu) if (sd->current_vmcb !=3D svm->vmcb) { sd->current_vmcb =3D svm->vmcb; =20 - if (!cpu_feature_enabled(X86_FEATURE_IBPB_ON_VMEXIT)) + if (!cpu_feature_enabled(X86_FEATURE_IBPB_ON_VMEXIT) && + cpu_feature_enabled(X86_FEATURE_USE_IBPB)) indirect_branch_prediction_barrier(); } if (kvm_vcpu_apicv_active(vcpu)) diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c index ca18c3eec76d8..504f328907ad4 100644 --- a/arch/x86/kvm/vmx/nested.c +++ b/arch/x86/kvm/vmx/nested.c @@ -5026,7 +5026,8 @@ void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 vm_= exit_reason, * doesn't isolate different VMCSs, i.e. in this case, doesn't provide * separate modes for L2 vs L1. */ - if (guest_cpu_cap_has(vcpu, X86_FEATURE_SPEC_CTRL)) + if (guest_cpu_cap_has(vcpu, X86_FEATURE_SPEC_CTRL) && + cpu_feature_enabled(X86_FEATURE_USE_IBPB)) indirect_branch_prediction_barrier(); =20 /* Update any VMCS fields that might have changed while L2 ran */ diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 6c56d5235f0f3..042b7a88157b0 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1477,7 +1477,8 @@ void vmx_vcpu_load_vmcs(struct kvm_vcpu *vcpu, int cp= u, * performs IBPB on nested VM-Exit (a single nested transition * may switch the active VMCS multiple times). */ - if (!buddy || WARN_ON_ONCE(buddy->vmcs !=3D prev)) + if (cpu_feature_enabled(X86_FEATURE_USE_IBPB) && + (!buddy || WARN_ON_ONCE(buddy->vmcs !=3D prev))) indirect_branch_prediction_barrier(); } =20 diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c index ffc25b3480415..be0c1a509869c 100644 --- a/arch/x86/mm/tlb.c +++ b/arch/x86/mm/tlb.c @@ -437,7 +437,8 @@ static void cond_mitigation(struct task_struct *next) * both have the IBPB bit set. */ if (next_mm !=3D prev_mm && - (next_mm | prev_mm) & LAST_USER_MM_IBPB) + (next_mm | prev_mm) & LAST_USER_MM_IBPB && + cpu_feature_enabled(X86_FEATURE_USE_IBPB)) indirect_branch_prediction_barrier(); } =20 @@ -447,8 +448,8 @@ static void cond_mitigation(struct task_struct *next) * different context than the user space task which ran * last on this CPU. */ - if ((prev_mm & ~LAST_USER_MM_SPEC_MASK) !=3D - (unsigned long)next->mm) + if ((prev_mm & ~LAST_USER_MM_SPEC_MASK) !=3D (unsigned long)next->mm && + cpu_feature_enabled(X86_FEATURE_USE_IBPB)) indirect_branch_prediction_barrier(); } =20 --=20 2.48.1.658.g4767266eb4-goog From nobody Thu Dec 18 16:14:28 2025 Received: from out-177.mta0.migadu.com (out-177.mta0.migadu.com [91.218.175.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE13C198823 for ; Thu, 27 Feb 2025 01:27:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740619657; cv=none; b=RDFJkbePo/b9sMY+9ScKoux9EnkhUg/WzYd0FngkoALbUXsopoe0UQwhCJGACSE2eYbSMnvpQ9LOFPIiSK+eWQtWZf+LexQPBK4AjP6mjfIcEw5zEjvhWNL3Wz6pgOxeSHe4Wx+QJy5rSyaMdyFgp44UNNpcGug3Ks2SFG2zhJI= ARC-Message-Signature: i=1; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1740619653; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=quLOmbx6xPKhUW5STb4KYNYxrnHTcaUOYh+FWYsnrjE=; b=bkqPAXfpaMrYDMS9JlsW5hexwxCPpXA86swIkN4cxvMKz8PJ+UsXYo8vepb2IsnLH1m6wY 1a39wC7lW+Q4KwCWvGYiweV+oBMOjHyPASe5o9CJIAnPMeDFML4MZiXvcMR/HnBUqkB2Ms XQJISAEAK+wSi6YVzE3QjoEdmbTVOlM= From: Yosry Ahmed To: x86@kernel.org, Sean Christopherson Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Pawan Gupta , Andy Lutomirski , Peter Zijlstra , Josh Poimboeuf , Paolo Bonzini , Jim Mattson , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Yosry Ahmed Subject: [PATCH v2 2/6] x86/mm: Remove X86_FEATURE_USE_IBPB checks in cond_mitigation() Date: Thu, 27 Feb 2025 01:27:08 +0000 Message-ID: <20250227012712.3193063-3-yosry.ahmed@linux.dev> In-Reply-To: <20250227012712.3193063-1-yosry.ahmed@linux.dev> References: <20250227012712.3193063-1-yosry.ahmed@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" The check is performed when either switch_mm_cond_ibpb or switch_mm_always_ibpb is set. In both cases, X86_FEATURE_USE_IBPB is always set. Remove the redundant check. Signed-off-by: Yosry Ahmed Acked-by: Josh Poimboeuf --- arch/x86/mm/tlb.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c index be0c1a509869c..e860fc8edfae4 100644 --- a/arch/x86/mm/tlb.c +++ b/arch/x86/mm/tlb.c @@ -437,8 +437,7 @@ static void cond_mitigation(struct task_struct *next) * both have the IBPB bit set. */ if (next_mm !=3D prev_mm && - (next_mm | prev_mm) & LAST_USER_MM_IBPB && - cpu_feature_enabled(X86_FEATURE_USE_IBPB)) + (next_mm | prev_mm) & LAST_USER_MM_IBPB) indirect_branch_prediction_barrier(); } =20 @@ -448,8 +447,7 @@ static void cond_mitigation(struct task_struct *next) * different context than the user space task which ran * last on this CPU. */ - if ((prev_mm & ~LAST_USER_MM_SPEC_MASK) !=3D (unsigned long)next->mm && - cpu_feature_enabled(X86_FEATURE_USE_IBPB)) + if ((prev_mm & ~LAST_USER_MM_SPEC_MASK) !=3D (unsigned long)next->mm) indirect_branch_prediction_barrier(); } =20 --=20 2.48.1.658.g4767266eb4-goog From nobody Thu Dec 18 16:14:28 2025 Received: from out-180.mta0.migadu.com (out-180.mta0.migadu.com [91.218.175.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 099F71A9B2A for ; Thu, 27 Feb 2025 01:27:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740619660; cv=none; b=hh/4gx6xs6YlfVptljyOsoplbjSwcR6OJhQ1nKfg1Nb44v783kyQvOHBkAQ4KBD/dorZ9aDKaYkftz05DDJDW5b8iJ1tGWcschUMO/M8eEbHo7sFFFzU37+o/OG+oH8HYPsXKHw1mLI9NTaaGleTI4bKoCitXzQAfOzQp3fRXe4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740619660; c=relaxed/simple; bh=J9sI+M12HfqQ9qPGHnst3V7H6uKSmS7Ytv59xyDnWfE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=M9xX5ePgIldeReZTnpeiRIPG/5bW1UE3HSMXEh9NVGbRUwdhnqXbtXUaSI/mLs7fhDe2gW36whnJKxDFcF4GoapdF03X9GsO6/AtCnpY6DPeARLJ+a/XxeobbszTisar7Axpe+442g/+vxhqa1Wy/ZZTPhWprfcAUONaqbwB7A4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=BGxLyfmc; arc=none smtp.client-ip=91.218.175.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="BGxLyfmc" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1740619657; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=dwg1Ay80T2e92R/BjPVjDqxXeHZ5ZCL2VFstPzXptZo=; b=BGxLyfmcXyFurUAjrcpo/Q4xR1Hg84FflGotgy0EOHvfbhXUNXk89ijYTxBm7O/cvhQDwd 1EqYhI1K64lVBeoV6MV43zC8GBzn26QrichlGYYGZf2RmxEqiUGA1oWntnT682+txKPxSL x9exdo3aW/5+dq9fl7lLIc7XjtkhiVA= From: Yosry Ahmed To: x86@kernel.org, Sean Christopherson Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Pawan Gupta , Andy Lutomirski , Peter Zijlstra , Josh Poimboeuf , Paolo Bonzini , Jim Mattson , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Yosry Ahmed Subject: [PATCH v2 3/6] x86/bugs: Remove the X86_FEATURE_USE_IBPB check in ib_prctl_set() Date: Thu, 27 Feb 2025 01:27:09 +0000 Message-ID: <20250227012712.3193063-4-yosry.ahmed@linux.dev> In-Reply-To: <20250227012712.3193063-1-yosry.ahmed@linux.dev> References: <20250227012712.3193063-1-yosry.ahmed@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" If X86_FEATURE_USE_IBPB is not set, then both spectre_v2_user_ibpb and spectre_v2_user_stibp are set to SPECTRE_V2_USER_NONE in spectre_v2_user_select_mitigation(). Since ib_prctl_set() already checks for this before performing the IBPB, the X86_FEATURE_USE_IBPB check is redundant. Remove it. Signed-off-by: Yosry Ahmed Acked-by: Josh Poimboeuf --- arch/x86/kernel/cpu/bugs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index 754150fc05784..1d7afc40f2272 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c @@ -2272,7 +2272,7 @@ static int ib_prctl_set(struct task_struct *task, uns= igned long ctrl) if (ctrl =3D=3D PR_SPEC_FORCE_DISABLE) task_set_spec_ib_force_disable(task); task_update_spec_tif(task); - if (task =3D=3D current && cpu_feature_enabled(X86_FEATURE_USE_IBPB)) + if (task =3D=3D current) indirect_branch_prediction_barrier(); break; default: --=20 2.48.1.658.g4767266eb4-goog From nobody Thu Dec 18 16:14:28 2025 Received: from out-181.mta0.migadu.com (out-181.mta0.migadu.com [91.218.175.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 529EE1AE01C for ; Thu, 27 Feb 2025 01:27:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740619664; cv=none; b=JLTOJIodU+TCX/6wR0Uv14i0bbZyLTnz7q9fBH/fID0id9bdic5cz8mIPBmIqDvjt+x/somaKQU1Ugi1+9NQwfVmueMj1SD182pQuaxtFe63WD9A2mdwi0TNRMLaqiCsp5fNDjDDr/S16OWRMZ0j+4PSoBxYPRJL1c2CGEdPhAI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740619664; c=relaxed/simple; bh=MJUfF7p26znqsRd71QkxiKuEqw5hwNIYx869VTuAzqo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=If/jJRDTWaK+Aigk23l1u+1tT+8zNNng4YGCylz1KCIFq/rIaPPxgaRpMVjG2yMS5NB9Agf6OUHiFHLNFUc237ZwVXI7FLlRXDlJi1sE9xQ14dDofafLH8bruNLyUirofVHbxZXaooCYmeIVWCjnICBLIOvOUtQvHfDvbbGItII= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=Ncq2TKQZ; arc=none smtp.client-ip=91.218.175.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="Ncq2TKQZ" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1740619660; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=inZTcE9vZsNLhguAg/kTgyLxoDkWmzTqzRa3pZ8DdDU=; b=Ncq2TKQZ/IJ4xbucbqtQ7Beux11X1pjvnfVY+U0kCSVGvTO2fh6RYFffg9vO0ewt4tRLi7 pgezoU0Ggb5KW42/8wnJJMfkfgXr2F/F0jVX46IoKddNU1yg6y2WTURBQSoS0u5UAfhJMh 2MmYTEqBrhiJOL3niq/CfB5xAx0L/es= From: Yosry Ahmed To: x86@kernel.org, Sean Christopherson Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Pawan Gupta , Andy Lutomirski , Peter Zijlstra , Josh Poimboeuf , Paolo Bonzini , Jim Mattson , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Yosry Ahmed Subject: [PATCH v2 4/6] x86/bugs: Use a static branch to guard IBPB on vCPU switch Date: Thu, 27 Feb 2025 01:27:10 +0000 Message-ID: <20250227012712.3193063-5-yosry.ahmed@linux.dev> In-Reply-To: <20250227012712.3193063-1-yosry.ahmed@linux.dev> References: <20250227012712.3193063-1-yosry.ahmed@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Instead of using X86_FEATURE_USE_IBPB to guard the IBPB execution in KVM when a new vCPU is loaded, introduce a static branch, similar to switch_mm_*_ibpb. This makes it obvious in spectre_v2_user_select_mitigation() what exactly is being toggled, instead of the unclear X86_FEATURE_USE_IBPB (which will be shortly removed). It also provides more fine-grained control, making it simpler to change/add paths that control the IBPB in the vCPU switch path without affecting other IBPBs. Signed-off-by: Yosry Ahmed Acked-by: Josh Poimboeuf --- arch/x86/include/asm/nospec-branch.h | 2 ++ arch/x86/kernel/cpu/bugs.c | 5 +++++ arch/x86/kvm/svm/svm.c | 2 +- arch/x86/kvm/vmx/vmx.c | 2 +- 4 files changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/no= spec-branch.h index 7cbb76a2434b9..36bc395bdef32 100644 --- a/arch/x86/include/asm/nospec-branch.h +++ b/arch/x86/include/asm/nospec-branch.h @@ -552,6 +552,8 @@ DECLARE_STATIC_KEY_FALSE(switch_to_cond_stibp); DECLARE_STATIC_KEY_FALSE(switch_mm_cond_ibpb); DECLARE_STATIC_KEY_FALSE(switch_mm_always_ibpb); =20 +DECLARE_STATIC_KEY_FALSE(switch_vcpu_ibpb); + DECLARE_STATIC_KEY_FALSE(mds_idle_clear); =20 DECLARE_STATIC_KEY_FALSE(switch_mm_cond_l1d_flush); diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index 1d7afc40f2272..7f904d0b0b04f 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c @@ -113,6 +113,10 @@ DEFINE_STATIC_KEY_FALSE(switch_mm_cond_ibpb); /* Control unconditional IBPB in switch_mm() */ DEFINE_STATIC_KEY_FALSE(switch_mm_always_ibpb); =20 +/* Control IBPB on vCPU load */ +DEFINE_STATIC_KEY_FALSE(switch_vcpu_ibpb); +EXPORT_SYMBOL_GPL(switch_vcpu_ibpb); + /* Control MDS CPU buffer clear before idling (halt, mwait) */ DEFINE_STATIC_KEY_FALSE(mds_idle_clear); EXPORT_SYMBOL_GPL(mds_idle_clear); @@ -1365,6 +1369,7 @@ spectre_v2_user_select_mitigation(void) /* Initialize Indirect Branch Prediction Barrier */ if (boot_cpu_has(X86_FEATURE_IBPB)) { setup_force_cpu_cap(X86_FEATURE_USE_IBPB); + static_branch_enable(&switch_vcpu_ibpb); =20 spectre_v2_user_ibpb =3D mode; switch (cmd) { diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 57222c3b56592..a73875ffbc3df 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -1566,7 +1566,7 @@ static void svm_vcpu_load(struct kvm_vcpu *vcpu, int = cpu) sd->current_vmcb =3D svm->vmcb; =20 if (!cpu_feature_enabled(X86_FEATURE_IBPB_ON_VMEXIT) && - cpu_feature_enabled(X86_FEATURE_USE_IBPB)) + static_branch_likely(&switch_vcpu_ibpb)) indirect_branch_prediction_barrier(); } if (kvm_vcpu_apicv_active(vcpu)) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 042b7a88157b0..956f9143a3c4c 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1477,7 +1477,7 @@ void vmx_vcpu_load_vmcs(struct kvm_vcpu *vcpu, int cp= u, * performs IBPB on nested VM-Exit (a single nested transition * may switch the active VMCS multiple times). */ - if (cpu_feature_enabled(X86_FEATURE_USE_IBPB) && + if (static_branch_likely(&switch_vcpu_ibpb) && (!buddy || WARN_ON_ONCE(buddy->vmcs !=3D prev))) indirect_branch_prediction_barrier(); } --=20 2.48.1.658.g4767266eb4-goog From nobody Thu Dec 18 16:14:28 2025 Received: from out-174.mta0.migadu.com (out-174.mta0.migadu.com [91.218.175.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8F671232384; Thu, 27 Feb 2025 01:27:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740619668; cv=none; b=mV3D70Ibu6FPB4gAVNaLFlVoejZLfIPwmvVTNdMUDlOtFqr0E/03kRPn0aCtoD2yH+u485cRzwbJjuFIoyhaK9giAw8C8TJVESbPaW/7BKCbPrh4neffsjzVJksyeaTJq/+tLxCH7xhCKgfshxDfUP6GNLjLWS/Uo2WuYPTzmmU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740619668; c=relaxed/simple; bh=mIdsMYHzPWGKfQ76gyR0od074LQLBhdNIqzTXep/9HM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=md0+EoaPqWW0nG4yrMOuWFuitQAXmc+K5NzQOKTspU2Wv1ZSlKjjEYfpsU0KGcq0lMfFEnSTka9sa9FGVxFkak8qY2hFpgrv3NGNntfA40HPgQmMe1DT54FWnyAN4zl2duTG5cvIesOoojebTOReIIknCSrUKJyhMxbr8Lp/lno= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=l+sTLXDX; arc=none smtp.client-ip=91.218.175.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="l+sTLXDX" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1740619663; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3dfUQyumxQMDUJXdJGU+sofO81aPkdWCO0PVYPcYWac=; b=l+sTLXDX0jv/vF96NEG6CtwsLDiN/112u7a0wPuQsum56JdJSXtEas3d0xJ3Akl/F5JhjP 5RvOtKJb5g9WVBYwI2Ixujbl2q6sx7dsOSX3DfQgzJA+lBVId0zCCJmy5fsS4WQEIubraF 6rPPWYyQp7SmFyT7WrIWLG8LG9JxiAM= From: Yosry Ahmed To: x86@kernel.org, Sean Christopherson Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Pawan Gupta , Andy Lutomirski , Peter Zijlstra , Josh Poimboeuf , Paolo Bonzini , Jim Mattson , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Yosry Ahmed Subject: [PATCH v2 5/6] KVM: nVMX: Always use IBPB to properly virtualize IBRS Date: Thu, 27 Feb 2025 01:27:11 +0000 Message-ID: <20250227012712.3193063-6-yosry.ahmed@linux.dev> In-Reply-To: <20250227012712.3193063-1-yosry.ahmed@linux.dev> References: <20250227012712.3193063-1-yosry.ahmed@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" On synthesized nested VM-exits in VMX, an IBPB is performed if IBRS is advertised to the guest to properly provide separate prediction domains for L1 and L2. However, this is currently conditional on X86_FEATURE_USE_IBPB, which depends on the host spectre_v2_user mitigation. In short, if spectre_v2_user=3Dno, IBRS is not virtualized correctly and L1 becomes susceptible to attacks from L2. Fix this by performing the IBPB regardless of X86_FEATURE_USE_IBPB. Fixes: 2e7eab81425a ("KVM: VMX: Execute IBPB on emulated VM-exit when guest= has IBRS") Signed-off-by: Yosry Ahmed Reviewed-by: Jim Mattson Acked-by: Josh Poimboeuf Acked-by: Sean Christopherson --- arch/x86/kvm/vmx/nested.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c index 504f328907ad4..ca18c3eec76d8 100644 --- a/arch/x86/kvm/vmx/nested.c +++ b/arch/x86/kvm/vmx/nested.c @@ -5026,8 +5026,7 @@ void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 vm_= exit_reason, * doesn't isolate different VMCSs, i.e. in this case, doesn't provide * separate modes for L2 vs L1. */ - if (guest_cpu_cap_has(vcpu, X86_FEATURE_SPEC_CTRL) && - cpu_feature_enabled(X86_FEATURE_USE_IBPB)) + if (guest_cpu_cap_has(vcpu, X86_FEATURE_SPEC_CTRL)) indirect_branch_prediction_barrier(); =20 /* Update any VMCS fields that might have changed while L2 ran */ --=20 2.48.1.658.g4767266eb4-goog From nobody Thu Dec 18 16:14:28 2025 Received: from out-185.mta0.migadu.com (out-185.mta0.migadu.com [91.218.175.185]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B34D23313E for ; Thu, 27 Feb 2025 01:27:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.185 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740619671; cv=none; b=sKUyW4NWnX9dUFqSNaauoKbAlI5YgkJZEZGDB70PuKJn+298e9M1oJQ3SXdoqRP6Qa24rpngr4iXV1JKu114zAUA40FjX4SafInfvDBmO8zUWrzL070G+NCrRRzsyMf8vOhoE7T1aL5Rvg7Bnc5LmA0K3oMaWQxdPb1HSWg3Nqs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740619671; c=relaxed/simple; bh=QUgGWqklPPosGsyZ3Z7EXMRiIvGCTPkrFA3wnDmEsLs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WkwHr8jYM6mpNNDwElVPRiqjd+uuT/hR/RPNdVHEIXia7nZFAaKKU/Pn/9/TJT47wPipalJdSNU7xQloZo5E2f3krlmG3txMi8txrt6Oeos2zQMCBYIZUM/+qxnbtzDxrRLaG6IaYJ+ccY43xSqQpFrd6p/iopNmpx8+Gx6tx4Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=dleod8m2; arc=none smtp.client-ip=91.218.175.185 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="dleod8m2" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1740619667; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ty8akjPjzreCygqHdAJtAp6Bdr+8wKY9U5PWbWuBGmQ=; b=dleod8m2cczArYaABu+5pJLQHAUA7zeXWbXUbqEKn21Gpi7il9G8M3i/H8pv/+AuKRz1WU 4myNSwPgg9QdKVkHpZ475BnX+7fmNAHslL/j2untrpYpNPJeqnpfPXlKndh2k8QM68Ya0P t6JFiFUAlTTgyPueDjIfd/HClVK5DjY= From: Yosry Ahmed To: x86@kernel.org, Sean Christopherson Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Pawan Gupta , Andy Lutomirski , Peter Zijlstra , Josh Poimboeuf , Paolo Bonzini , Jim Mattson , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Yosry Ahmed Subject: [PATCH v2 6/6] x86/bugs: Remove X86_FEATURE_USE_IBPB Date: Thu, 27 Feb 2025 01:27:12 +0000 Message-ID: <20250227012712.3193063-7-yosry.ahmed@linux.dev> In-Reply-To: <20250227012712.3193063-1-yosry.ahmed@linux.dev> References: <20250227012712.3193063-1-yosry.ahmed@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" X86_FEATURE_USE_IBPB was introduced in commit 2961298efe1e ("x86/cpufeatures: Clean up Spectre v2 related CPUID flags") to have separate flags for when the CPU supports IBPB (i.e. X86_FEATURE_IBPB) and when an IBPB is actually used to mitigate Spectre v2. Ever since then, the uses of IBPB expanded. The name became confusing because it does not control all IBPB executions in the kernel. Furthermore, because its name is generic and it's buried within indirect_branch_prediction_barrier(), it's easy to use it not knowing that it is specific to Spectre v2. X86_FEATURE_USE_IBPB is no longer needed because all the IBPB executions it used to control are now controlled through other means (e.g. switch_mm_*_ibpb static branches). Remove the unused feature bit. Signed-off-by: Yosry Ahmed Acked-by: Josh Poimboeuf --- arch/x86/include/asm/cpufeatures.h | 1 - arch/x86/kernel/cpu/bugs.c | 1 - tools/arch/x86/include/asm/cpufeatures.h | 1 - 3 files changed, 3 deletions(-) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpuf= eatures.h index 43653f2704c93..c8701abb77524 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -210,7 +210,6 @@ #define X86_FEATURE_MBA ( 7*32+18) /* "mba" Memory Bandwidth Allocation = */ #define X86_FEATURE_RSB_CTXSW ( 7*32+19) /* Fill RSB on context switches = */ #define X86_FEATURE_PERFMON_V2 ( 7*32+20) /* "perfmon_v2" AMD Performance= Monitoring Version 2 */ -#define X86_FEATURE_USE_IBPB ( 7*32+21) /* Indirect Branch Prediction Bar= rier enabled */ #define X86_FEATURE_USE_IBRS_FW ( 7*32+22) /* Use IBRS during runtime fir= mware calls */ #define X86_FEATURE_SPEC_STORE_BYPASS_DISABLE ( 7*32+23) /* Disable Specul= ative Store Bypass. */ #define X86_FEATURE_LS_CFG_SSBD ( 7*32+24) /* AMD SSBD implementation vi= a LS_CFG MSR */ diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index 7f904d0b0b04f..5397d0afac089 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c @@ -1368,7 +1368,6 @@ spectre_v2_user_select_mitigation(void) =20 /* Initialize Indirect Branch Prediction Barrier */ if (boot_cpu_has(X86_FEATURE_IBPB)) { - setup_force_cpu_cap(X86_FEATURE_USE_IBPB); static_branch_enable(&switch_vcpu_ibpb); =20 spectre_v2_user_ibpb =3D mode; diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/incl= ude/asm/cpufeatures.h index 17b6590748c00..ec9911379c617 100644 --- a/tools/arch/x86/include/asm/cpufeatures.h +++ b/tools/arch/x86/include/asm/cpufeatures.h @@ -210,7 +210,6 @@ #define X86_FEATURE_MBA ( 7*32+18) /* "mba" Memory Bandwidth Allocation = */ #define X86_FEATURE_RSB_CTXSW ( 7*32+19) /* Fill RSB on context switches = */ #define X86_FEATURE_PERFMON_V2 ( 7*32+20) /* "perfmon_v2" AMD Performance= Monitoring Version 2 */ -#define X86_FEATURE_USE_IBPB ( 7*32+21) /* Indirect Branch Prediction Bar= rier enabled */ #define X86_FEATURE_USE_IBRS_FW ( 7*32+22) /* Use IBRS during runtime fir= mware calls */ #define X86_FEATURE_SPEC_STORE_BYPASS_DISABLE ( 7*32+23) /* Disable Specul= ative Store Bypass. */ #define X86_FEATURE_LS_CFG_SSBD ( 7*32+24) /* AMD SSBD implementation vi= a LS_CFG MSR */ --=20 2.48.1.658.g4767266eb4-goog