From nobody Tue Feb 10 04:04:37 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 78DD81DFE8; Fri, 28 Feb 2025 00:29:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740702542; cv=none; b=nxNZrETxfiKEeJoapi3/88GxZigvpKjTNKvSqtP5Ffc2qLxKU9kGMru/UcbcqlmofuWGuKAvUSIpVzKoPXNYgpYAGPEDKu3Qxa1Wb4UG5b18hUax0nE5bpJ+0QXdghzOgG9K2yIqLKTnrpyaQ7et9QEBtVXXqh1zlWy2JB7lIGA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740702542; c=relaxed/simple; bh=kTqIZkhKLJ5jCwow6RTkusGiC8GJWw/LfCRBn/zeLoA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=u0Vi7xQPGr/JKJYZV8AsDe5xj6D0quXNTvcvl/9fibRciKpy/o/PHHaCEXVhESlKIJY8Mlj7C32fdC988q1mQ8rEp1MIHYE4H85AuEPwTd7eOCD4uYFApwyJKl2iLPSYlEj3pxQrcuICovdnFdh/L0uMr6UbTPtX3H1Ez7d6C2Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=BErDsZTa; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="BErDsZTa" Received: by smtp.kernel.org (Postfix) with ESMTPS id 0F0DEC4CEE4; Fri, 28 Feb 2025 00:29:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1740702542; bh=kTqIZkhKLJ5jCwow6RTkusGiC8GJWw/LfCRBn/zeLoA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=BErDsZTa0gOhKW/TxMVLzqappJt3dXdENSDEMIyJYdqx8OnAgsRK0a4tCOXENlyQg Ll1CLmmDbTXRmsHeON+Bmhw7ADzEmzmA1ewsLsjmpOspqJ4HFwSP2ZtGFskoJqHeJa Ik6eHqDWtyHS/qgQOuPrbe9FGzB/tbf95IprPcrK3MEXT9yM/1u5uyKwQKCQ2rmzNA vgUgS4z4p1eY8yvHe3KKRN2cPq4qoSwM36Jfo7SNgcdDc+Y+BH9oJ6Y/BPDvK4fsyt j5okL8KaDXrcXHXeDa8qvhGVG7xIpqIXMXV67G0AMMcKdmVJ3/zWtfMlq8/tkD1MSl uAb/cfTCxa2aA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id EEDE3C19F32; Fri, 28 Feb 2025 00:29:01 +0000 (UTC) From: Satish Kharat via B4 Relay Date: Thu, 27 Feb 2025 19:30:44 -0500 Subject: [PATCH 1/8] enic: Move function from header file to c file Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250227-enic_cleanup_and_ext_cq-v1-1-c314f95812bb@cisco.com> References: <20250227-enic_cleanup_and_ext_cq-v1-0-c314f95812bb@cisco.com> In-Reply-To: <20250227-enic_cleanup_and_ext_cq-v1-0-c314f95812bb@cisco.com> To: Christian Benvenuti , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Satish Kharat , Nelson Escobar , John Daley X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1740702696; l=7840; i=satishkh@cisco.com; s=20250226; h=from:subject:message-id; bh=nNYqYqNjdD0WDdRxaCh9RCgCQpkRynWVhF0dMlyIVxE=; b=VFZPNyP549zHPxa1BZxVAqgAOSCF5iEQu8enDQ5FuewoBdNv0rwbTOVcfWSE2EAiPVEXR6U3l L/mJ3GNpV9xC4OlUyWH0gtM0dWv2nTpIBaOUUeBWCSLNlmsp7yfcTrf X-Developer-Key: i=satishkh@cisco.com; a=ed25519; pk=lkxzORFYn5ejiy0kzcsfkpGoXZDcnHMc4n3YK7jJnJo= X-Endpoint-Received: by B4 Relay for satishkh@cisco.com/20250226 with auth_id=351 X-Original-From: Satish Kharat Reply-To: satishkh@cisco.com From: Satish Kharat Moves cq_enet_rq_desc_dec from cq_enet_desc.h to enic_rq.c. This is in preparation for enic extended completion queue enabling. Co-developed-by: Nelson Escobar Signed-off-by: Nelson Escobar Co-developed-by: John Daley Signed-off-by: John Daley Signed-off-by: Satish Kharat --- drivers/net/ethernet/cisco/enic/cq_enet_desc.h | 81 ----------------------= --- drivers/net/ethernet/cisco/enic/enic_rq.c | 82 ++++++++++++++++++++++= ++++ 2 files changed, 82 insertions(+), 81 deletions(-) diff --git a/drivers/net/ethernet/cisco/enic/cq_enet_desc.h b/drivers/net/e= thernet/cisco/enic/cq_enet_desc.h index d25426470a293989ff472863cc85718e3b1d81d2..6abc134d07032a737c8b3d2987e= 3c7a4b8191991 100644 --- a/drivers/net/ethernet/cisco/enic/cq_enet_desc.h +++ b/drivers/net/ethernet/cisco/enic/cq_enet_desc.h @@ -88,85 +88,4 @@ struct cq_enet_rq_desc { #define CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT (0x1 << 6) #define CQ_ENET_RQ_DESC_FLAGS_FCS_OK (0x1 << 7) =20 -static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc, - u8 *type, u8 *color, u16 *q_number, u16 *completed_index, - u8 *ingress_port, u8 *fcoe, u8 *eop, u8 *sop, u8 *rss_type, - u8 *csum_not_calc, u32 *rss_hash, u16 *bytes_written, u8 *packet_error, - u8 *vlan_stripped, u16 *vlan_tci, u16 *checksum, u8 *fcoe_sof, - u8 *fcoe_fc_crc_ok, u8 *fcoe_enc_error, u8 *fcoe_eof, - u8 *tcp_udp_csum_ok, u8 *udp, u8 *tcp, u8 *ipv4_csum_ok, - u8 *ipv6, u8 *ipv4, u8 *ipv4_fragment, u8 *fcs_ok) -{ - u16 completed_index_flags; - u16 q_number_rss_type_flags; - u16 bytes_written_flags; - - cq_desc_dec((struct cq_desc *)desc, type, - color, q_number, completed_index); - - completed_index_flags =3D le16_to_cpu(desc->completed_index_flags); - q_number_rss_type_flags =3D - le16_to_cpu(desc->q_number_rss_type_flags); - bytes_written_flags =3D le16_to_cpu(desc->bytes_written_flags); - - *ingress_port =3D (completed_index_flags & - CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT) ? 1 : 0; - *fcoe =3D (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_FCOE) ? - 1 : 0; - *eop =3D (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_EOP) ? - 1 : 0; - *sop =3D (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_SOP) ? - 1 : 0; - - *rss_type =3D (u8)((q_number_rss_type_flags >> CQ_DESC_Q_NUM_BITS) & - CQ_ENET_RQ_DESC_RSS_TYPE_MASK); - *csum_not_calc =3D (q_number_rss_type_flags & - CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC) ? 1 : 0; - - *rss_hash =3D le32_to_cpu(desc->rss_hash); - - *bytes_written =3D bytes_written_flags & - CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK; - *packet_error =3D (bytes_written_flags & - CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) ? 1 : 0; - *vlan_stripped =3D (bytes_written_flags & - CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED) ? 1 : 0; - - /* - * Tag Control Information(16) =3D user_priority(3) + cfi(1) + vlan(12) - */ - *vlan_tci =3D le16_to_cpu(desc->vlan); - - if (*fcoe) { - *fcoe_sof =3D (u8)(le16_to_cpu(desc->checksum_fcoe) & - CQ_ENET_RQ_DESC_FCOE_SOF_MASK); - *fcoe_fc_crc_ok =3D (desc->flags & - CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK) ? 1 : 0; - *fcoe_enc_error =3D (desc->flags & - CQ_ENET_RQ_DESC_FCOE_ENC_ERROR) ? 1 : 0; - *fcoe_eof =3D (u8)((le16_to_cpu(desc->checksum_fcoe) >> - CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT) & - CQ_ENET_RQ_DESC_FCOE_EOF_MASK); - *checksum =3D 0; - } else { - *fcoe_sof =3D 0; - *fcoe_fc_crc_ok =3D 0; - *fcoe_enc_error =3D 0; - *fcoe_eof =3D 0; - *checksum =3D le16_to_cpu(desc->checksum_fcoe); - } - - *tcp_udp_csum_ok =3D - (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK) ? 1 : 0; - *udp =3D (desc->flags & CQ_ENET_RQ_DESC_FLAGS_UDP) ? 1 : 0; - *tcp =3D (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP) ? 1 : 0; - *ipv4_csum_ok =3D - (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK) ? 1 : 0; - *ipv6 =3D (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV6) ? 1 : 0; - *ipv4 =3D (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4) ? 1 : 0; - *ipv4_fragment =3D - (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT) ? 1 : 0; - *fcs_ok =3D (desc->flags & CQ_ENET_RQ_DESC_FLAGS_FCS_OK) ? 1 : 0; -} - #endif /* _CQ_ENET_DESC_H_ */ diff --git a/drivers/net/ethernet/cisco/enic/enic_rq.c b/drivers/net/ethern= et/cisco/enic/enic_rq.c index e3228ef7988a1ef78e9051d9b1aa67df5191e2ac..8d5752c6bbbe34c79bdd5b86256= 45abec7eda3f9 100644 --- a/drivers/net/ethernet/cisco/enic/enic_rq.c +++ b/drivers/net/ethernet/cisco/enic/enic_rq.c @@ -101,6 +101,88 @@ static void enic_rq_set_skb_flags(struct vnic_rq *vrq,= u8 type, u32 rss_hash, } } =20 +static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc, u8 *t= ype, u8 *color, + u16 *q_number, u16 *completed_index, u8 *ingress_port, + u8 *fcoe, u8 *eop, u8 *sop, u8 *rss_type, u8 *csum_not_calc, + u32 *rss_hash, u16 *bytes_written, u8 *packet_error, + u8 *vlan_stripped, u16 *vlan_tci, u16 *checksum, + u8 *fcoe_sof, u8 *fcoe_fc_crc_ok, u8 *fcoe_enc_error, + u8 *fcoe_eof, u8 *tcp_udp_csum_ok, u8 *udp, u8 *tcp, + u8 *ipv4_csum_ok, u8 *ipv6, u8 *ipv4, u8 *ipv4_fragment, + u8 *fcs_ok) +{ + u16 completed_index_flags; + u16 q_number_rss_type_flags; + u16 bytes_written_flags; + + cq_desc_dec((struct cq_desc *)desc, type, + color, q_number, completed_index); + + completed_index_flags =3D le16_to_cpu(desc->completed_index_flags); + q_number_rss_type_flags =3D + le16_to_cpu(desc->q_number_rss_type_flags); + bytes_written_flags =3D le16_to_cpu(desc->bytes_written_flags); + + *ingress_port =3D (completed_index_flags & + CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT) ? 1 : 0; + *fcoe =3D (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_FCOE) ? + 1 : 0; + *eop =3D (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_EOP) ? + 1 : 0; + *sop =3D (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_SOP) ? + 1 : 0; + + *rss_type =3D (u8)((q_number_rss_type_flags >> CQ_DESC_Q_NUM_BITS) & + CQ_ENET_RQ_DESC_RSS_TYPE_MASK); + *csum_not_calc =3D (q_number_rss_type_flags & + CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC) ? 1 : 0; + + *rss_hash =3D le32_to_cpu(desc->rss_hash); + + *bytes_written =3D bytes_written_flags & + CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK; + *packet_error =3D (bytes_written_flags & + CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) ? 1 : 0; + *vlan_stripped =3D (bytes_written_flags & + CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED) ? 1 : 0; + + /* + * Tag Control Information(16) =3D user_priority(3) + cfi(1) + vlan(12) + */ + *vlan_tci =3D le16_to_cpu(desc->vlan); + + if (*fcoe) { + *fcoe_sof =3D (u8)(le16_to_cpu(desc->checksum_fcoe) & + CQ_ENET_RQ_DESC_FCOE_SOF_MASK); + *fcoe_fc_crc_ok =3D (desc->flags & + CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK) ? 1 : 0; + *fcoe_enc_error =3D (desc->flags & + CQ_ENET_RQ_DESC_FCOE_ENC_ERROR) ? 1 : 0; + *fcoe_eof =3D (u8)((le16_to_cpu(desc->checksum_fcoe) >> + CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT) & + CQ_ENET_RQ_DESC_FCOE_EOF_MASK); + *checksum =3D 0; + } else { + *fcoe_sof =3D 0; + *fcoe_fc_crc_ok =3D 0; + *fcoe_enc_error =3D 0; + *fcoe_eof =3D 0; + *checksum =3D le16_to_cpu(desc->checksum_fcoe); + } + + *tcp_udp_csum_ok =3D + (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK) ? 1 : 0; + *udp =3D (desc->flags & CQ_ENET_RQ_DESC_FLAGS_UDP) ? 1 : 0; + *tcp =3D (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP) ? 1 : 0; + *ipv4_csum_ok =3D + (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK) ? 1 : 0; + *ipv6 =3D (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV6) ? 1 : 0; + *ipv4 =3D (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4) ? 1 : 0; + *ipv4_fragment =3D + (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT) ? 1 : 0; + *fcs_ok =3D (desc->flags & CQ_ENET_RQ_DESC_FLAGS_FCS_OK) ? 1 : 0; +} + static bool enic_rq_pkt_error(struct vnic_rq *vrq, u8 packet_error, u8 fcs= _ok, u16 bytes_written) { --=20 2.48.1 From nobody Tue Feb 10 04:04:37 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C1FB849C; Fri, 28 Feb 2025 00:29:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740702542; cv=none; b=dmNIEh6RECvk8vVBIjSkwteoUr03b8cj2nk59YLU7aGF/1pI5cWF5X/7WeTi4KNHPyNgtD3WGpnamaGgv6lrplEhHYF6ZuCeV7PJ2gFXPsmTuAnMxHMv30YpLlFJOkBy9Cu51HSz/KVOKzDhH06eDazIYofeKffqdpW8rgI5eww= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740702542; c=relaxed/simple; bh=k3PtVuE0zWNY9n1rsjHvSswg8j8CSMweA7w7N6gx9Tg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=TtT0pEmLo17cwqkU97gjjWG8aIh6el9mXQpPA428mOCK6XAMI2gq671RHAz+oEAugcrqz9LAatAGVSzfNFyTrx030KuipLdtivS/rdovqxngvD0PBYKJyKHPZ6vsAsICpytPFgCeUuXobxgpHFB4hF2dmqf9RB3AapKFuFe+U5A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fBlzd+16; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fBlzd+16" Received: by smtp.kernel.org (Postfix) with ESMTPS id 18389C4CEE8; Fri, 28 Feb 2025 00:29:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1740702542; bh=k3PtVuE0zWNY9n1rsjHvSswg8j8CSMweA7w7N6gx9Tg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=fBlzd+16UC3/AqDfEuB6+2Ktgtcsnz6vVa7c5dHx+6YZXWMgeD9c4K5fCOzpeDTOo TofB9tqjem1JarymkYv3qtVCkqUdwTo4zPlvO1YopTYTvdE6zU5pBbG0y1qQio8RFg Y/dbIXG3FXsQcngInznTbh3Lfzx1WE4o6KQdXQBtoP8ofxe4rFXMMPnqrHc25U20vA Ft2l8zK6eUzHBIFP7QD1Nt4xGbiNqXDNXJAjc9pY8mDEY0kCM4WFriLr6jb4TszYUQ 3xQRe65c2RwAevzu+bMVg+NuzJlkL1TvVl75/KBxfActqH3Tmps1heTY9OZ05qJYq0 2OA7FOrWY+M/g== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B3BBC282C9; Fri, 28 Feb 2025 00:29:02 +0000 (UTC) From: Satish Kharat via B4 Relay Date: Thu, 27 Feb 2025 19:30:45 -0500 Subject: [PATCH 2/8] enic: enic rq code reorg Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250227-enic_cleanup_and_ext_cq-v1-2-c314f95812bb@cisco.com> References: <20250227-enic_cleanup_and_ext_cq-v1-0-c314f95812bb@cisco.com> In-Reply-To: <20250227-enic_cleanup_and_ext_cq-v1-0-c314f95812bb@cisco.com> To: Christian Benvenuti , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Satish Kharat , Nelson Escobar , John Daley X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1740702696; l=9393; i=satishkh@cisco.com; s=20250226; h=from:subject:message-id; bh=70tOE72/YwEW6GZXSaHALe/KnGE3tWRfb8jd98i8vzI=; b=pRPp5xJJhZtpCbB1S8nSKndCXnQgYcw3ItaKusV36sEooT2yJEfp71pEIEpNW/ZpXJ9bQGksl mNpd6X2qeKECrFe/Gkm+/TWg20nerxGvCgbXd/wGj0GWvXlahm/xx92 X-Developer-Key: i=satishkh@cisco.com; a=ed25519; pk=lkxzORFYn5ejiy0kzcsfkpGoXZDcnHMc4n3YK7jJnJo= X-Endpoint-Received: by B4 Relay for satishkh@cisco.com/20250226 with auth_id=351 X-Original-From: Satish Kharat Reply-To: satishkh@cisco.com From: Satish Kharat Separates enic rx path from generic vnic api. Removes some complexity of doign enic callbacks through vnic api in rx. This is in preparation for enabling enic extended cq which applies only to enic rx path. Co-developed-by: Nelson Escobar Signed-off-by: Nelson Escobar Co-developed-by: John Daley Signed-off-by: John Daley Signed-off-by: Satish Kharat --- drivers/net/ethernet/cisco/enic/enic_main.c | 6 +- drivers/net/ethernet/cisco/enic/enic_rq.c | 123 +++++++++++++++++++++---= ---- drivers/net/ethernet/cisco/enic/enic_rq.h | 6 +- 3 files changed, 97 insertions(+), 38 deletions(-) diff --git a/drivers/net/ethernet/cisco/enic/enic_main.c b/drivers/net/ethe= rnet/cisco/enic/enic_main.c index f24fd29ea2071f88b3fa79e7768238a24384970e..080234ef4c2bb53c19e26601ca9= bb38d26a738b7 100644 --- a/drivers/net/ethernet/cisco/enic/enic_main.c +++ b/drivers/net/ethernet/cisco/enic/enic_main.c @@ -1386,8 +1386,7 @@ static int enic_poll(struct napi_struct *napi, int bu= dget) enic_wq_service, NULL); =20 if (budget > 0) - rq_work_done =3D vnic_cq_service(&enic->cq[cq_rq], - rq_work_to_do, enic_rq_service, NULL); + rq_work_done =3D enic_rq_cq_service(enic, cq_rq, rq_work_to_do); =20 /* Accumulate intr event credits for this polling * cycle. An intr event is the completion of a @@ -1516,8 +1515,7 @@ static int enic_poll_msix_rq(struct napi_struct *napi= , int budget) */ =20 if (budget > 0) - work_done =3D vnic_cq_service(&enic->cq[cq], - work_to_do, enic_rq_service, NULL); + work_done =3D enic_rq_cq_service(enic, cq, work_to_do); =20 /* Return intr event credits for this polling * cycle. An intr event is the completion of a diff --git a/drivers/net/ethernet/cisco/enic/enic_rq.c b/drivers/net/ethern= et/cisco/enic/enic_rq.c index 8d5752c6bbbe34c79bdd5b8625645abec7eda3f9..96eeb0e0d69602e8338630eab04= 8dc960b161bbb 100644 --- a/drivers/net/ethernet/cisco/enic/enic_rq.c +++ b/drivers/net/ethernet/cisco/enic/enic_rq.c @@ -21,14 +21,26 @@ static void enic_intr_update_pkt_size(struct vnic_rx_by= tes_counter *pkt_size, pkt_size->small_pkt_bytes_cnt +=3D pkt_len; } =20 -int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, u8 typ= e, - u16 q_number, u16 completed_index, void *opaque) +static void enic_rq_cq_desc_dec(struct cq_enet_rq_desc *desc, u8 *type, + u8 *color, u16 *q_number, u16 *completed_index) { - struct enic *enic =3D vnic_dev_priv(vdev); - - vnic_rq_service(&enic->rq[q_number].vrq, cq_desc, completed_index, - VNIC_RQ_RETURN_DESC, enic_rq_indicate_buf, opaque); - return 0; + /* type_color is the last field for all cq structs */ + u8 type_color =3D desc->type_color; + + /* Make sure color bit is read from desc *before* other fields + * are read from desc. Hardware guarantees color bit is last + * bit (byte) written. Adding the rmb() prevents the compiler + * and/or CPU from reordering the reads which would potentially + * result in reading stale values. + */ + rmb(); + + *q_number =3D le16_to_cpu(desc->q_number_rss_type_flags) & + CQ_DESC_Q_NUM_MASK; + *completed_index =3D le16_to_cpu(desc->completed_index_flags) & + CQ_DESC_COMP_NDX_MASK; + *color =3D (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK; + *type =3D type_color & CQ_DESC_TYPE_MASK; } =20 static void enic_rq_set_skb_flags(struct vnic_rq *vrq, u8 type, u32 rss_ha= sh, @@ -101,9 +113,8 @@ static void enic_rq_set_skb_flags(struct vnic_rq *vrq, = u8 type, u32 rss_hash, } } =20 -static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc, u8 *t= ype, u8 *color, - u16 *q_number, u16 *completed_index, u8 *ingress_port, - u8 *fcoe, u8 *eop, u8 *sop, u8 *rss_type, u8 *csum_not_calc, +static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc, u8 *i= ngress_port, u8 *fcoe, + u8 *eop, u8 *sop, u8 *rss_type, u8 *csum_not_calc, u32 *rss_hash, u16 *bytes_written, u8 *packet_error, u8 *vlan_stripped, u16 *vlan_tci, u16 *checksum, u8 *fcoe_sof, u8 *fcoe_fc_crc_ok, u8 *fcoe_enc_error, @@ -115,9 +126,6 @@ static inline void cq_enet_rq_desc_dec(struct cq_enet_r= q_desc *desc, u8 *type, u u16 q_number_rss_type_flags; u16 bytes_written_flags; =20 - cq_desc_dec((struct cq_desc *)desc, type, - color, q_number, completed_index); - completed_index_flags =3D le16_to_cpu(desc->completed_index_flags); q_number_rss_type_flags =3D le16_to_cpu(desc->q_number_rss_type_flags); @@ -247,37 +255,32 @@ void enic_free_rq_buf(struct vnic_rq *rq, struct vnic= _rq_buf *buf) buf->os_buf =3D NULL; } =20 -void enic_rq_indicate_buf(struct vnic_rq *rq, struct cq_desc *cq_desc, - struct vnic_rq_buf *buf, int skipped, void *opaque) +static void enic_rq_indicate_buf(struct enic *enic, struct vnic_rq *rq, + struct vnic_rq_buf *buf, struct cq_enet_rq_desc *cq_desc, + u8 type, u16 q_number, u16 completed_index) { - struct enic *enic =3D vnic_dev_priv(rq->vdev); struct sk_buff *skb; struct vnic_cq *cq =3D &enic->cq[enic_cq_rq(enic, rq->index)]; struct enic_rq_stats *rqstats =3D &enic->rq[rq->index].stats; struct napi_struct *napi; =20 - u8 type, color, eop, sop, ingress_port, vlan_stripped; + u8 eop, sop, ingress_port, vlan_stripped; u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof; u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok; u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc; u8 packet_error; - u16 q_number, completed_index, bytes_written, vlan_tci, checksum; + u16 bytes_written, vlan_tci, checksum; u32 rss_hash; =20 rqstats->packets++; - if (skipped) { - rqstats->desc_skip++; - return; - } =20 - cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc, &type, &color, - &q_number, &completed_index, &ingress_port, &fcoe, - &eop, &sop, &rss_type, &csum_not_calc, &rss_hash, - &bytes_written, &packet_error, &vlan_stripped, - &vlan_tci, &checksum, &fcoe_sof, &fcoe_fc_crc_ok, - &fcoe_enc_error, &fcoe_eof, &tcp_udp_csum_ok, &udp, - &tcp, &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment, - &fcs_ok); + cq_enet_rq_desc_dec(cq_desc, &ingress_port, + &fcoe, &eop, &sop, &rss_type, &csum_not_calc, + &rss_hash, &bytes_written, &packet_error, + &vlan_stripped, &vlan_tci, &checksum, &fcoe_sof, + &fcoe_fc_crc_ok, &fcoe_enc_error, &fcoe_eof, + &tcp_udp_csum_ok, &udp, &tcp, &ipv4_csum_ok, &ipv6, + &ipv4, &ipv4_fragment, &fcs_ok); =20 if (enic_rq_pkt_error(rq, packet_error, fcs_ok, bytes_written)) return; @@ -322,3 +325,63 @@ void enic_rq_indicate_buf(struct vnic_rq *rq, struct c= q_desc *cq_desc, rqstats->pkt_truncated++; } } + +static void enic_rq_service(struct enic *enic, struct cq_enet_rq_desc *cq_= desc, u8 type, + u16 q_number, u16 completed_index) +{ + struct vnic_rq *vrq =3D &enic->rq[q_number].vrq; + struct vnic_rq_buf *vrq_buf =3D vrq->to_clean; + int skipped; + struct enic_rq_stats *rqstats =3D &enic->rq[q_number].stats; + + while (1) { + skipped =3D (vrq_buf->index !=3D completed_index); + if (!skipped) + enic_rq_indicate_buf(enic, vrq, vrq_buf, cq_desc, type, + q_number, completed_index); + else + rqstats->desc_skip++; + + vrq->ring.desc_avail++; + vrq->to_clean =3D vrq_buf->next; + vrq_buf =3D vrq_buf->next; + if (!skipped) + break; + } +} + +unsigned int enic_rq_cq_service(struct enic *enic, unsigned int cq_index, + unsigned int work_to_do) +{ + u16 q_number, completed_index; + u8 type, color; + unsigned int work_done =3D 0; + + struct vnic_cq *cq =3D &enic->cq[cq_index]; + struct cq_enet_rq_desc *cq_desc =3D (struct cq_enet_rq_desc *)((u8 *)cq->= ring.descs + + cq->ring.desc_size * cq->to_clean); + + enic_rq_cq_desc_dec(cq_desc, &type, &color, &q_number, + &completed_index); + + while (color !=3D cq->last_color) { + enic_rq_service(enic, cq_desc, type, q_number, completed_index); + + cq->to_clean++; + + if (cq->to_clean =3D=3D cq->ring.desc_count) { + cq->to_clean =3D 0; + cq->last_color =3D cq->last_color ? 0 : 1; + } + + if (++work_done >=3D work_to_do) + break; + + cq_desc =3D (struct cq_enet_rq_desc *)((u8 *)cq->ring.descs + + cq->ring.desc_size * cq->to_clean); + enic_rq_cq_desc_dec(cq_desc, &type, &color, &q_number, + &completed_index); + } + + return work_done; +} diff --git a/drivers/net/ethernet/cisco/enic/enic_rq.h b/drivers/net/ethern= et/cisco/enic/enic_rq.h index a75d07562686af0a1ad618803f5f70a77fbc1eec..98476a7297afbba83aa0f4281bf= 9314ea3fd9f27 100644 --- a/drivers/net/ethernet/cisco/enic/enic_rq.h +++ b/drivers/net/ethernet/cisco/enic/enic_rq.h @@ -2,9 +2,7 @@ * Copyright 2024 Cisco Systems, Inc. All rights reserved. */ =20 -int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, u8 typ= e, - u16 q_number, u16 completed_index, void *opaque); -void enic_rq_indicate_buf(struct vnic_rq *rq, struct cq_desc *cq_desc, - struct vnic_rq_buf *buf, int skipped, void *opaque); +unsigned int enic_rq_cq_service(struct enic *enic, unsigned int cq_index, + unsigned int work_to_do); int enic_rq_alloc_buf(struct vnic_rq *rq); void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf); --=20 2.48.1 From nobody Tue Feb 10 04:04:37 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A2D28219E0; Fri, 28 Feb 2025 00:29:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740702542; cv=none; b=UUbjGDjlFcAqzWyQ8kOlYYvEjrsBuDLx+s4MNU2ddLCTjViCTy6M4+H1j+VXgHn2twiYcoqtcKREpcKBWUeVW0IPPmnySENUS6wyYDq5WyHbKa5f1dbI5woMT0GKWGv5QK6BUJ835V/Ce9IEZ/Rz/zhy2VexMRpgR1iJaKOZDG8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740702542; c=relaxed/simple; bh=oo71VY1McPM8/140gIhN/hZPHJcdcpEwgl7m7nF3O78=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=sK3x0FMWsVZo2aQugsWhxMvaBYFqDfHSrjbharlCNTSt/raOKUQ2yf3hudaK5i7gNsYYKgvsjkJmiEK4Sl3rKo3hhNd95+IsZ9u8w7uN1CoHg1jJRz4GW509/CQQB6h8XimCEQ1zLbg7jaw1USFmhvVlI6omxN4jBLd5ZNGkarI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=TuhDHawi; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="TuhDHawi" Received: by smtp.kernel.org (Postfix) with ESMTPS id 263D7C4CEE9; Fri, 28 Feb 2025 00:29:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1740702542; bh=oo71VY1McPM8/140gIhN/hZPHJcdcpEwgl7m7nF3O78=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=TuhDHawisxL70UuXyiqJWIDUTYIfu+yKFG/Y4KYoya3WtNFQesP3pMyxyXbJ1aFrX WE8cp0ey70kPkP520TAlPwljsNc3HzAJdQwNmrrAykO5IePET41V82mWLp5p7y3I1z qWdVmHRwP8twdF9IgpOKaj0ofL0agA0GobmOwdglKXltCG8EfZO6TWoRrKzkk3Jn0H W/oHrCY80dP2rWHGUGAsBWOV+i/V5cULd255mX7OtHkQzmwriUUF0JY7JdrKdaIaD0 9NWrpopA9Z74AOro9y5URZ5vRbMgr6obphPH7+dWXRi2k+ORBV/TvQdUcb5bCk6npi dVGq1n6lIhiIA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19869C282C7; Fri, 28 Feb 2025 00:29:02 +0000 (UTC) From: Satish Kharat via B4 Relay Date: Thu, 27 Feb 2025 19:30:46 -0500 Subject: [PATCH 3/8] enic: enic rq extended cq defines Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250227-enic_cleanup_and_ext_cq-v1-3-c314f95812bb@cisco.com> References: <20250227-enic_cleanup_and_ext_cq-v1-0-c314f95812bb@cisco.com> In-Reply-To: <20250227-enic_cleanup_and_ext_cq-v1-0-c314f95812bb@cisco.com> To: Christian Benvenuti , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Satish Kharat , Nelson Escobar , John Daley X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1740702696; l=4129; i=satishkh@cisco.com; s=20250226; h=from:subject:message-id; bh=lCdejaRbYIFkRngxAAsLt06YyI38y1e/5BxDAW6GFew=; b=8krwWzhGpuEdsnyElxhnTRUhI/KyLuLSqi8SJ8CqWLyoLd0JCD1SoqUVHZ//kgJcf1Mz5VqSj M7FIEJrHjz/CqsglMyPNgBf+H7bloxCWM+BEDOpx4Kpo1Z3y0LEV2WT X-Developer-Key: i=satishkh@cisco.com; a=ed25519; pk=lkxzORFYn5ejiy0kzcsfkpGoXZDcnHMc4n3YK7jJnJo= X-Endpoint-Received: by B4 Relay for satishkh@cisco.com/20250226 with auth_id=351 X-Original-From: Satish Kharat Reply-To: satishkh@cisco.com From: Satish Kharat Adds the defines for 32 and 64 byte receive queue completion queue descriptors. Adds devcmd define to get rq cq descriptor size/s supported by hw. Co-developed-by: Nelson Escobar Signed-off-by: Nelson Escobar Co-developed-by: John Daley Signed-off-by: John Daley Signed-off-by: Satish Kharat --- drivers/net/ethernet/cisco/enic/cq_enet_desc.h | 56 ++++++++++++++++++++++= ++++ drivers/net/ethernet/cisco/enic/vnic_devcmd.h | 19 +++++++++ 2 files changed, 75 insertions(+) diff --git a/drivers/net/ethernet/cisco/enic/cq_enet_desc.h b/drivers/net/e= thernet/cisco/enic/cq_enet_desc.h index 6abc134d07032a737c8b3d2987e3c7a4b8191991..809a3f30b87f78285414990a2a4= 2c9a30a8662c6 100644 --- a/drivers/net/ethernet/cisco/enic/cq_enet_desc.h +++ b/drivers/net/ethernet/cisco/enic/cq_enet_desc.h @@ -24,6 +24,23 @@ static inline void cq_enet_wq_desc_dec(struct cq_enet_wq= _desc *desc, color, q_number, completed_index); } =20 +/* + * Defines and Capabilities for CMD_CQ_ENTRY_SIZE_SET + */ +#define VNIC_RQ_ALL (~0ULL) + +#define VNIC_RQ_CQ_ENTRY_SIZE_16 0 +#define VNIC_RQ_CQ_ENTRY_SIZE_32 1 +#define VNIC_RQ_CQ_ENTRY_SIZE_64 2 + +#define VNIC_RQ_CQ_ENTRY_SIZE_16_CAPABLE BIT(VNIC_RQ_CQ_ENTRY_SIZE_16) +#define VNIC_RQ_CQ_ENTRY_SIZE_32_CAPABLE BIT(VNIC_RQ_CQ_ENTRY_SIZE_32) +#define VNIC_RQ_CQ_ENTRY_SIZE_64_CAPABLE BIT(VNIC_RQ_CQ_ENTRY_SIZE_64) + +#define VNIC_RQ_CQ_ENTRY_SIZE_ALL_BIT (VNIC_RQ_CQ_ENTRY_SIZE_16_CAPABLE |= \ + VNIC_RQ_CQ_ENTRY_SIZE_32_CAPABLE | \ + VNIC_RQ_CQ_ENTRY_SIZE_64_CAPABLE) + /* Completion queue descriptor: Ethernet receive queue, 16B */ struct cq_enet_rq_desc { __le16 completed_index_flags; @@ -36,6 +53,45 @@ struct cq_enet_rq_desc { u8 type_color; }; =20 +/* Completion queue descriptor: Ethernet receive queue, 32B */ +struct cq_enet_rq_desc_32 { + __le16 completed_index_flags; + __le16 q_number_rss_type_flags; + __le32 rss_hash; + __le16 bytes_written_flags; + __le16 vlan; + __le16 checksum_fcoe; + u8 flags; + u8 fetch_index_flags; + __le32 time_stamp; + __le16 time_stamp2; + __le16 pie_info; + __le32 pie_info2; + __le16 pie_info3; + u8 pie_info4; + u8 type_color; +}; + +/* Completion queue descriptor: Ethernet receive queue, 64B */ +struct cq_enet_rq_desc_64 { + __le16 completed_index_flags; + __le16 q_number_rss_type_flags; + __le32 rss_hash; + __le16 bytes_written_flags; + __le16 vlan; + __le16 checksum_fcoe; + u8 flags; + u8 fetch_index_flags; + __le32 time_stamp; + __le16 time_stamp2; + __le16 pie_info; + __le32 pie_info2; + __le16 pie_info3; + u8 pie_info4; + u8 reserved[32]; + u8 type_color; +}; + #define CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT (0x1 << 12) #define CQ_ENET_RQ_DESC_FLAGS_FCOE (0x1 << 13) #define CQ_ENET_RQ_DESC_FLAGS_EOP (0x1 << 14) diff --git a/drivers/net/ethernet/cisco/enic/vnic_devcmd.h b/drivers/net/et= hernet/cisco/enic/vnic_devcmd.h index db56d778877a73b0ef2adf59120cbc57999732ee..605ef17f967e4a7d62738b776bf= 4dbfdf172ba2a 100644 --- a/drivers/net/ethernet/cisco/enic/vnic_devcmd.h +++ b/drivers/net/ethernet/cisco/enic/vnic_devcmd.h @@ -436,6 +436,25 @@ enum vnic_devcmd_cmd { * in: (u16) a2 =3D unsigned short int port information */ CMD_OVERLAY_OFFLOAD_CFG =3D _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 73), + + /* + * Set extended CQ field in MREGS of RQ (or all RQs) + * for given vNIC + * in: (u64) a0 =3D RQ selection (VNIC_RQ_ALL for all RQs) + * (u32) a1 =3D CQ entry size + * VNIC_RQ_CQ_ENTRY_SIZE_16 --> 16 bytes + * VNIC_RQ_CQ_ENTRY_SIZE_32 --> 32 bytes + * VNIC_RQ_CQ_ENTRY_SIZE_64 --> 64 bytes + * + * Capability query: + * out: (u32) a0 =3D errno, 0:valid cmd + * (u32) a1 =3D value consisting of supported entries + * bit 0: 16 bytes + * bit 1: 32 bytes + * bit 2: 64 bytes + */ + CMD_CQ_ENTRY_SIZE_SET =3D _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 90), + }; 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Fri, 28 Feb 2025 00:29:02 +0000 (UTC) From: Satish Kharat via B4 Relay Date: Thu, 27 Feb 2025 19:30:47 -0500 Subject: [PATCH 4/8] enic: enable rq extended cq support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250227-enic_cleanup_and_ext_cq-v1-4-c314f95812bb@cisco.com> References: <20250227-enic_cleanup_and_ext_cq-v1-0-c314f95812bb@cisco.com> In-Reply-To: <20250227-enic_cleanup_and_ext_cq-v1-0-c314f95812bb@cisco.com> To: Christian Benvenuti , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Satish Kharat , Nelson Escobar , John Daley X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1740702696; l=12708; i=satishkh@cisco.com; s=20250226; h=from:subject:message-id; bh=zcHjeaQymHk1BwnhCga558wZWP5OVYnLYowgyF/Ob4s=; b=nw5ATuphmIEMlpn5RUeh1OPjSEEAAg4+8cs3MPYBRHF91uZyXdXPysLhdGxVA+fgfr3jXdPAk TUppvpjeemFBqfeGiy5CYJOXW7wYwB07FlOrSnsSPDBfK01+ynwCiFA X-Developer-Key: i=satishkh@cisco.com; a=ed25519; pk=lkxzORFYn5ejiy0kzcsfkpGoXZDcnHMc4n3YK7jJnJo= X-Endpoint-Received: by B4 Relay for satishkh@cisco.com/20250226 with auth_id=351 X-Original-From: Satish Kharat Reply-To: satishkh@cisco.com From: Satish Kharat Enables getting from hw all the supported rq cq sizes and uses the highest supported cq size. Co-developed-by: Nelson Escobar Signed-off-by: Nelson Escobar Co-developed-by: John Daley Signed-off-by: John Daley Signed-off-by: Satish Kharat --- drivers/net/ethernet/cisco/enic/cq_desc.h | 3 + drivers/net/ethernet/cisco/enic/enic.h | 9 +++ drivers/net/ethernet/cisco/enic/enic_main.c | 4 ++ drivers/net/ethernet/cisco/enic/enic_res.c | 58 +++++++++++++++- drivers/net/ethernet/cisco/enic/enic_rq.c | 101 +++++++++++++++++++++---= ---- 5 files changed, 149 insertions(+), 26 deletions(-) diff --git a/drivers/net/ethernet/cisco/enic/cq_desc.h b/drivers/net/ethern= et/cisco/enic/cq_desc.h index 462c5435a206b4cc93b3734fdc96a2192b53a235..8fc313b6ed0434bd55b8e10bf30= 86ef848acbdf1 100644 --- a/drivers/net/ethernet/cisco/enic/cq_desc.h +++ b/drivers/net/ethernet/cisco/enic/cq_desc.h @@ -40,6 +40,9 @@ struct cq_desc { #define CQ_DESC_COMP_NDX_BITS 12 #define CQ_DESC_COMP_NDX_MASK ((1 << CQ_DESC_COMP_NDX_BITS) - 1) =20 +#define CQ_DESC_32_FI_MASK (BIT(0) | BIT(1)) +#define CQ_DESC_64_FI_MASK (BIT(0) | BIT(1)) + static inline void cq_desc_dec(const struct cq_desc *desc_arg, u8 *type, u8 *color, u16 *q_number, u16 *completed_index) { diff --git a/drivers/net/ethernet/cisco/enic/enic.h b/drivers/net/ethernet/= cisco/enic/enic.h index 305ed12aa0311ca6cc53bfbffcc300182a8011a7..d60e55accafd0e4f83728524da4= f167a474d6213 100644 --- a/drivers/net/ethernet/cisco/enic/enic.h +++ b/drivers/net/ethernet/cisco/enic/enic.h @@ -31,6 +31,13 @@ =20 #define ENIC_AIC_LARGE_PKT_DIFF 3 =20 +enum ext_cq { + ENIC_RQ_CQ_ENTRY_SIZE_16, + ENIC_RQ_CQ_ENTRY_SIZE_32, + ENIC_RQ_CQ_ENTRY_SIZE_64, + ENIC_RQ_CQ_ENTRY_SIZE_MAX, +}; + struct enic_msix_entry { int requested; char devname[IFNAMSIZ + 8]; @@ -228,6 +235,7 @@ struct enic { struct enic_rfs_flw_tbl rfs_h; u8 rss_key[ENIC_RSS_LEN]; struct vnic_gen_stats gen_stats; + enum ext_cq ext_cq; }; =20 static inline struct net_device *vnic_get_netdev(struct vnic_dev *vdev) @@ -349,5 +357,6 @@ int enic_is_valid_vf(struct enic *enic, int vf); int enic_is_dynamic(struct enic *enic); void enic_set_ethtool_ops(struct net_device *netdev); int __enic_set_rsskey(struct enic *enic); +void enic_ext_cq(struct enic *enic); =20 #endif /* _ENIC_H_ */ diff --git a/drivers/net/ethernet/cisco/enic/enic_main.c b/drivers/net/ethe= rnet/cisco/enic/enic_main.c index 080234ef4c2bb53c19e26601ca9bb38d26a738b7..d716514366dfc56b4e08260d18d= 78fddd23f6253 100644 --- a/drivers/net/ethernet/cisco/enic/enic_main.c +++ b/drivers/net/ethernet/cisco/enic/enic_main.c @@ -2192,6 +2192,7 @@ static void enic_reset(struct work_struct *work) enic_init_vnic_resources(enic); enic_set_rss_nic_cfg(enic); enic_dev_set_ig_vlan_rewrite_mode(enic); + enic_ext_cq(enic); enic_open(enic->netdev); =20 /* Allow infiniband to fiddle with the device again */ @@ -2218,6 +2219,7 @@ static void enic_tx_hang_reset(struct work_struct *wo= rk) enic_init_vnic_resources(enic); enic_set_rss_nic_cfg(enic); enic_dev_set_ig_vlan_rewrite_mode(enic); + enic_ext_cq(enic); enic_open(enic->netdev); =20 /* Allow infiniband to fiddle with the device again */ @@ -2592,6 +2594,8 @@ static int enic_dev_init(struct enic *enic) =20 enic_get_res_counts(enic); =20 + enic_ext_cq(enic); + err =3D enic_alloc_enic_resources(enic); if (err) { dev_err(dev, "Failed to allocate enic resources\n"); diff --git a/drivers/net/ethernet/cisco/enic/enic_res.c b/drivers/net/ether= net/cisco/enic/enic_res.c index 1261251998330c8b8363c4dd2db1ccc25847476c..a7179cc4b5296cfbce137c54a9e= 17e6b358a19ae 100644 --- a/drivers/net/ethernet/cisco/enic/enic_res.c +++ b/drivers/net/ethernet/cisco/enic/enic_res.c @@ -312,6 +312,7 @@ void enic_init_vnic_resources(struct enic *enic) int enic_alloc_vnic_resources(struct enic *enic) { enum vnic_dev_intr_mode intr_mode; + int rq_cq_desc_size; unsigned int i; int err; =20 @@ -326,6 +327,24 @@ int enic_alloc_vnic_resources(struct enic *enic) intr_mode =3D=3D VNIC_DEV_INTR_MODE_MSIX ? "MSI-X" : "unknown"); =20 + switch (enic->ext_cq) { + case ENIC_RQ_CQ_ENTRY_SIZE_16: + rq_cq_desc_size =3D 16; + break; + case ENIC_RQ_CQ_ENTRY_SIZE_32: + rq_cq_desc_size =3D 32; + break; + case ENIC_RQ_CQ_ENTRY_SIZE_64: + rq_cq_desc_size =3D 64; + break; + default: + dev_err(enic_get_dev(enic), + "Unable to determine rq cq desc size: %d", + enic->ext_cq); + err =3D -ENODEV; + goto err_out; + } + /* Allocate queue resources */ =20 @@ -348,8 +367,8 @@ int enic_alloc_vnic_resources(struct enic *enic) for (i =3D 0; i < enic->cq_count; i++) { if (i < enic->rq_count) err =3D vnic_cq_alloc(enic->vdev, &enic->cq[i], i, - enic->config.rq_desc_count, - sizeof(struct cq_enet_rq_desc)); + enic->config.rq_desc_count, + rq_cq_desc_size); else err =3D vnic_cq_alloc(enic->vdev, &enic->cq[i], i, enic->config.wq_desc_count, @@ -380,6 +399,39 @@ int enic_alloc_vnic_resources(struct enic *enic) =20 err_out_cleanup: enic_free_vnic_resources(enic); - +err_out: return err; } + +/* + * CMD_CQ_ENTRY_SIZE_SET can fail on older hw generations that don't suppo= rt + * that command + */ +void enic_ext_cq(struct enic *enic) +{ + u64 a0 =3D CMD_CQ_ENTRY_SIZE_SET, a1 =3D 0; + int wait =3D 1000; + int ret; + + spin_lock_bh(&enic->devcmd_lock); + ret =3D vnic_dev_cmd(enic->vdev, CMD_CAPABILITY, &a0, &a1, wait); + if (ret || a0) { + dev_info(&enic->pdev->dev, + "CMD_CQ_ENTRY_SIZE_SET not supported."); + enic->ext_cq =3D ENIC_RQ_CQ_ENTRY_SIZE_16; + goto out; + } + a1 &=3D VNIC_RQ_CQ_ENTRY_SIZE_ALL_BIT; + enic->ext_cq =3D fls(a1) - 1; + a0 =3D VNIC_RQ_ALL; + a1 =3D enic->ext_cq; + ret =3D vnic_dev_cmd(enic->vdev, CMD_CQ_ENTRY_SIZE_SET, &a0, &a1, wait); + if (ret) { + dev_info(&enic->pdev->dev, "CMD_CQ_ENTRY_SIZE_SET failed."); + enic->ext_cq =3D ENIC_RQ_CQ_ENTRY_SIZE_16; + } +out: + spin_unlock_bh(&enic->devcmd_lock); + dev_info(&enic->pdev->dev, "CQ entry size set to %d bytes", + 16 << enic->ext_cq); +} diff --git a/drivers/net/ethernet/cisco/enic/enic_rq.c b/drivers/net/ethern= et/cisco/enic/enic_rq.c index 96eeb0e0d69602e8338630eab048dc960b161bbb..0013f98ccd0bfe006aea7b8a676= a7872e345b8b6 100644 --- a/drivers/net/ethernet/cisco/enic/enic_rq.c +++ b/drivers/net/ethernet/cisco/enic/enic_rq.c @@ -21,24 +21,76 @@ static void enic_intr_update_pkt_size(struct vnic_rx_by= tes_counter *pkt_size, pkt_size->small_pkt_bytes_cnt +=3D pkt_len; } =20 -static void enic_rq_cq_desc_dec(struct cq_enet_rq_desc *desc, u8 *type, +static void enic_rq_cq_desc_dec(void *cq_desc, u8 cq_desc_size, u8 *type, u8 *color, u16 *q_number, u16 *completed_index) { /* type_color is the last field for all cq structs */ - u8 type_color =3D desc->type_color; + u8 type_color; + + switch (cq_desc_size) { + case VNIC_RQ_CQ_ENTRY_SIZE_16: { + struct cq_enet_rq_desc *desc =3D + (struct cq_enet_rq_desc *)cq_desc; + type_color =3D desc->type_color; + + /* Make sure color bit is read from desc *before* other fields + * are read from desc. Hardware guarantees color bit is last + * bit (byte) written. Adding the rmb() prevents the compiler + * and/or CPU from reordering the reads which would potentially + * result in reading stale values. + */ + rmb(); =20 - /* Make sure color bit is read from desc *before* other fields - * are read from desc. Hardware guarantees color bit is last - * bit (byte) written. Adding the rmb() prevents the compiler - * and/or CPU from reordering the reads which would potentially - * result in reading stale values. - */ - rmb(); + *q_number =3D le16_to_cpu(desc->q_number_rss_type_flags) & + CQ_DESC_Q_NUM_MASK; + *completed_index =3D le16_to_cpu(desc->completed_index_flags) & + CQ_DESC_COMP_NDX_MASK; + break; + } + case VNIC_RQ_CQ_ENTRY_SIZE_32: { + struct cq_enet_rq_desc_32 *desc =3D + (struct cq_enet_rq_desc_32 *)cq_desc; + type_color =3D desc->type_color; + + /* Make sure color bit is read from desc *before* other fields + * are read from desc. Hardware guarantees color bit is last + * bit (byte) written. Adding the rmb() prevents the compiler + * and/or CPU from reordering the reads which would potentially + * result in reading stale values. + */ + rmb(); + + *q_number =3D le16_to_cpu(desc->q_number_rss_type_flags) & + CQ_DESC_Q_NUM_MASK; + *completed_index =3D le16_to_cpu(desc->completed_index_flags) & + CQ_DESC_COMP_NDX_MASK; + *completed_index |=3D (desc->fetch_index_flags & CQ_DESC_32_FI_MASK) << + CQ_DESC_COMP_NDX_BITS; + break; + } + case VNIC_RQ_CQ_ENTRY_SIZE_64: { + struct cq_enet_rq_desc_64 *desc =3D + (struct cq_enet_rq_desc_64 *)cq_desc; + type_color =3D desc->type_color; + + /* Make sure color bit is read from desc *before* other fields + * are read from desc. Hardware guarantees color bit is last + * bit (byte) written. Adding the rmb() prevents the compiler + * and/or CPU from reordering the reads which would potentially + * result in reading stale values. + */ + rmb(); + + *q_number =3D le16_to_cpu(desc->q_number_rss_type_flags) & + CQ_DESC_Q_NUM_MASK; + *completed_index =3D le16_to_cpu(desc->completed_index_flags) & + CQ_DESC_COMP_NDX_MASK; + *completed_index |=3D (desc->fetch_index_flags & CQ_DESC_64_FI_MASK) << + CQ_DESC_COMP_NDX_BITS; + break; + } + } =20 - *q_number =3D le16_to_cpu(desc->q_number_rss_type_flags) & - CQ_DESC_Q_NUM_MASK; - *completed_index =3D le16_to_cpu(desc->completed_index_flags) & - CQ_DESC_COMP_NDX_MASK; *color =3D (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK; *type =3D type_color & CQ_DESC_TYPE_MASK; } @@ -113,6 +165,10 @@ static void enic_rq_set_skb_flags(struct vnic_rq *vrq,= u8 type, u32 rss_hash, } } =20 +/* + * cq_enet_rq_desc accesses section uses only the 1st 15 bytes of the cq w= hich is identical + * for all type (16,32 and 64 byte) of cqs. + */ static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc, u8 *i= ngress_port, u8 *fcoe, u8 *eop, u8 *sop, u8 *rss_type, u8 *csum_not_calc, u32 *rss_hash, u16 *bytes_written, u8 *packet_error, @@ -256,7 +312,7 @@ void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_r= q_buf *buf) } =20 static void enic_rq_indicate_buf(struct enic *enic, struct vnic_rq *rq, - struct vnic_rq_buf *buf, struct cq_enet_rq_desc *cq_desc, + struct vnic_rq_buf *buf, void *cq_desc, u8 type, u16 q_number, u16 completed_index) { struct sk_buff *skb; @@ -274,7 +330,7 @@ static void enic_rq_indicate_buf(struct enic *enic, str= uct vnic_rq *rq, =20 rqstats->packets++; =20 - cq_enet_rq_desc_dec(cq_desc, &ingress_port, + cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc, &ingress_port, &fcoe, &eop, &sop, &rss_type, &csum_not_calc, &rss_hash, &bytes_written, &packet_error, &vlan_stripped, &vlan_tci, &checksum, &fcoe_sof, @@ -326,7 +382,7 @@ static void enic_rq_indicate_buf(struct enic *enic, str= uct vnic_rq *rq, } } =20 -static void enic_rq_service(struct enic *enic, struct cq_enet_rq_desc *cq_= desc, u8 type, +static void enic_rq_service(struct enic *enic, void *cq_desc, u8 type, u16 q_number, u16 completed_index) { struct vnic_rq *vrq =3D &enic->rq[q_number].vrq; @@ -358,10 +414,9 @@ unsigned int enic_rq_cq_service(struct enic *enic, uns= igned int cq_index, unsigned int work_done =3D 0; =20 struct vnic_cq *cq =3D &enic->cq[cq_index]; - struct cq_enet_rq_desc *cq_desc =3D (struct cq_enet_rq_desc *)((u8 *)cq->= ring.descs - + cq->ring.desc_size * cq->to_clean); + void *cq_desc =3D (u8 *)cq->ring.descs + cq->ring.desc_size * cq->to_clea= n; =20 - enic_rq_cq_desc_dec(cq_desc, &type, &color, &q_number, + enic_rq_cq_desc_dec(cq_desc, enic->ext_cq, &type, &color, &q_number, &completed_index); =20 while (color !=3D cq->last_color) { @@ -377,10 +432,10 @@ unsigned int enic_rq_cq_service(struct enic *enic, un= signed int cq_index, if (++work_done >=3D work_to_do) break; =20 - cq_desc =3D (struct cq_enet_rq_desc *)((u8 *)cq->ring.descs - + cq->ring.desc_size * cq->to_clean); - enic_rq_cq_desc_dec(cq_desc, &type, &color, &q_number, - &completed_index); + cq_desc =3D ((u8 *)cq->ring.descs + + cq->ring.desc_size * cq->to_clean); + enic_rq_cq_desc_dec(cq_desc, enic->ext_cq, &type, &color, + &q_number, &completed_index); } =20 return work_done; --=20 2.48.1 From nobody Tue Feb 10 04:04:37 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0DC821364; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250227-enic_cleanup_and_ext_cq-v1-5-c314f95812bb@cisco.com> References: <20250227-enic_cleanup_and_ext_cq-v1-0-c314f95812bb@cisco.com> In-Reply-To: <20250227-enic_cleanup_and_ext_cq-v1-0-c314f95812bb@cisco.com> To: Christian Benvenuti , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Satish Kharat , Nelson Escobar , John Daley X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1740702696; l=1103; i=satishkh@cisco.com; s=20250226; h=from:subject:message-id; bh=+dPGv5N9MWqWyMEvqnn1fc2Fu6Bu+7Wi7gCqqsYQK6M=; b=KWA+6iTevuM6VxykwGpIvdzMWcm2zsYvB9CpEIOXq9oPTHmkgkQ9a25+u65xOpBfcoe+PCc4a CKb9/SvVB2NC885ngyrWicFXgv15omQJq1AyDKvWwYR6kCW6/vwulgV X-Developer-Key: i=satishkh@cisco.com; a=ed25519; pk=lkxzORFYn5ejiy0kzcsfkpGoXZDcnHMc4n3YK7jJnJo= X-Endpoint-Received: by B4 Relay for satishkh@cisco.com/20250226 with auth_id=351 X-Original-From: Satish Kharat Reply-To: satishkh@cisco.com From: Satish Kharat Removes cq_enet_wq_desc_dec, not needed anymore. Co-developed-by: Nelson Escobar Signed-off-by: Nelson Escobar Co-developed-by: John Daley Signed-off-by: John Daley Signed-off-by: Satish Kharat --- drivers/net/ethernet/cisco/enic/cq_enet_desc.h | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/net/ethernet/cisco/enic/cq_enet_desc.h b/drivers/net/e= thernet/cisco/enic/cq_enet_desc.h index 809a3f30b87f78285414990a2a42c9a30a8662c6..50787cff29db0cc904109352138= 5781cf557e4cc 100644 --- a/drivers/net/ethernet/cisco/enic/cq_enet_desc.h +++ b/drivers/net/ethernet/cisco/enic/cq_enet_desc.h @@ -17,13 +17,6 @@ struct cq_enet_wq_desc { u8 type_color; }; =20 -static inline void cq_enet_wq_desc_dec(struct cq_enet_wq_desc *desc, - u8 *type, u8 *color, u16 *q_number, u16 *completed_index) -{ - cq_desc_dec((struct cq_desc *)desc, type, - color, q_number, completed_index); -} - /* * Defines and Capabilities for CMD_CQ_ENTRY_SIZE_SET */ --=20 2.48.1 From nobody Tue Feb 10 04:04:37 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A2DF9224CC; Fri, 28 Feb 2025 00:29:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740702542; cv=none; b=Y5UTYjzeKIIUBHKSGnmCmMnvdfR/I6ztQRryHoOvSX4xbZv7FH8Fkcwf+a7PFpteEVodHZd1nTW/NvNOsVH7kEJDFZyrBOluDgksWyD7Pp5Jh8TooFTEUP9NMFcM3yYDHEwGgHI7+UzkcaE+w/cUX3J5l5uJD9xtsgCzoY1a0V0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740702542; c=relaxed/simple; bh=kcr4Krre820bmaF7LeCZpMv8yNsY2bR6A3IuWT89/d8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=alrvPtp3bNnTGaezbJlzzUwyZRhGI8Ki5h/k9QtBV7n5dANOlfZ5qSwf2HY4Wdwuxn8qreNsGM84YDmwd6slHUAmXHmDfuj3iVLWLEBUR/HiBK6Ist4ftF7BGFf48L9xnlbmCCmHbv4uQHZfxrN9hTfE8MabrVa5xet/c50i1js= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nVZ91Jsr; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nVZ91Jsr" Received: by smtp.kernel.org (Postfix) with ESMTPS id 5E004C4CEF0; Fri, 28 Feb 2025 00:29:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1740702542; bh=kcr4Krre820bmaF7LeCZpMv8yNsY2bR6A3IuWT89/d8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=nVZ91JsrKAR5MWIh6G6Y829Tb6AI3fagh7tc9bnAKatEt2Na+xVCt5WomlKlqa3fi VMOmX89qmwDIYxk3OwS0zoBxKsr41pjCUBxiC2qBJ4erpVDi06yZ71m6KcwxmqSxXz mS2B79feftGjKKGplN8f0BPWCJFR+ngZ7U+XfOh+n818/N887sPCnzWDCzyqJSlAf5 wuWvS5fSffI1zPGGbo2IP1qCWg8ZDx3D30iURLZDhyKyDBn5ACgHxI5TB3u1WnFNz0 xUO43BNSOI/cGhyHVjR+XmrBq6UejperlAc005jhy7UrcLJd3iHCz95xS1yZUpPWOB t42JDBaLt2PAQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52E30C282C7; Fri, 28 Feb 2025 00:29:02 +0000 (UTC) From: Satish Kharat via B4 Relay Date: Thu, 27 Feb 2025 19:30:49 -0500 Subject: [PATCH 6/8] enic : added enic_wq.c and enic_wq.h Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250227-enic_cleanup_and_ext_cq-v1-6-c314f95812bb@cisco.com> References: <20250227-enic_cleanup_and_ext_cq-v1-0-c314f95812bb@cisco.com> In-Reply-To: <20250227-enic_cleanup_and_ext_cq-v1-0-c314f95812bb@cisco.com> To: Christian Benvenuti , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Satish Kharat , Nelson Escobar , John Daley X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1740702696; l=11946; i=satishkh@cisco.com; s=20250226; h=from:subject:message-id; bh=yXV/wz+tCPVcaOhW/6r6nU4R1X7xTBUWz+dlUyGLGBc=; b=fsjHXCh1PjtwK/NfEWLRXiaSt/PfQcXGlrOPTi0crEpCVPXLOfYKmcCbuWpBAM6WTZOYJ3WTj sfivki91phaDbgB/X1c0ZDWUwH+q6ppdY0rOb4m3VkxAPgXWq8grbKn X-Developer-Key: i=satishkh@cisco.com; a=ed25519; pk=lkxzORFYn5ejiy0kzcsfkpGoXZDcnHMc4n3YK7jJnJo= X-Endpoint-Received: by B4 Relay for satishkh@cisco.com/20250226 with auth_id=351 X-Original-From: Satish Kharat Reply-To: satishkh@cisco.com From: Satish Kharat Moves wq related function to enic_wq.c. Prepares for a cleaup of enic wq code path. Co-developed-by: Nelson Escobar Signed-off-by: Nelson Escobar Co-developed-by: John Daley Signed-off-by: John Daley Signed-off-by: Satish Kharat --- drivers/net/ethernet/cisco/enic/Makefile | 2 +- drivers/net/ethernet/cisco/enic/cq_desc.h | 24 ------ drivers/net/ethernet/cisco/enic/enic.h | 4 + drivers/net/ethernet/cisco/enic/enic_main.c | 52 +------------ drivers/net/ethernet/cisco/enic/enic_wq.c | 117 ++++++++++++++++++++++++= ++++ drivers/net/ethernet/cisco/enic/enic_wq.h | 13 ++++ drivers/net/ethernet/cisco/enic/vnic_cq.h | 41 ---------- 7 files changed, 136 insertions(+), 117 deletions(-) diff --git a/drivers/net/ethernet/cisco/enic/Makefile b/drivers/net/etherne= t/cisco/enic/Makefile index b3b5196b2dfcc3e59366474ba78fc7a4cd746eb0..a96b8332e6e2a87da6e50a2da3e= f9546d61b589c 100644 --- a/drivers/net/ethernet/cisco/enic/Makefile +++ b/drivers/net/ethernet/cisco/enic/Makefile @@ -3,5 +3,5 @@ obj-$(CONFIG_ENIC) :=3D enic.o =20 enic-y :=3D enic_main.o vnic_cq.o vnic_intr.o vnic_wq.o \ enic_res.o enic_dev.o enic_pp.o vnic_dev.o vnic_rq.o vnic_vic.o \ - enic_ethtool.o enic_api.o enic_clsf.o enic_rq.o + enic_ethtool.o enic_api.o enic_clsf.o enic_rq.o enic_wq.o =20 diff --git a/drivers/net/ethernet/cisco/enic/cq_desc.h b/drivers/net/ethern= et/cisco/enic/cq_desc.h index 8fc313b6ed0434bd55b8e10bf3086ef848acbdf1..bfb3f14e89f5d6cfb0159bdf041= b8004c774d7e8 100644 --- a/drivers/net/ethernet/cisco/enic/cq_desc.h +++ b/drivers/net/ethernet/cisco/enic/cq_desc.h @@ -43,28 +43,4 @@ struct cq_desc { #define CQ_DESC_32_FI_MASK (BIT(0) | BIT(1)) #define CQ_DESC_64_FI_MASK (BIT(0) | BIT(1)) =20 -static inline void cq_desc_dec(const struct cq_desc *desc_arg, - u8 *type, u8 *color, u16 *q_number, u16 *completed_index) -{ - const struct cq_desc *desc =3D desc_arg; - const u8 type_color =3D desc->type_color; - - *color =3D (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK; - - /* - * Make sure color bit is read from desc *before* other fields - * are read from desc. Hardware guarantees color bit is last - * bit (byte) written. Adding the rmb() prevents the compiler - * and/or CPU from reordering the reads which would potentially - * result in reading stale values. - */ - - rmb(); - - *type =3D type_color & CQ_DESC_TYPE_MASK; - *q_number =3D le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK; - *completed_index =3D le16_to_cpu(desc->completed_index) & - CQ_DESC_COMP_NDX_MASK; -} - #endif /* _CQ_DESC_H_ */ diff --git a/drivers/net/ethernet/cisco/enic/enic.h b/drivers/net/ethernet/= cisco/enic/enic.h index d60e55accafd0e4f83728524da4f167a474d6213..9c12e967e9f1299e1cf3e280a16= fb9bf93ac607b 100644 --- a/drivers/net/ethernet/cisco/enic/enic.h +++ b/drivers/net/ethernet/cisco/enic/enic.h @@ -83,6 +83,10 @@ struct enic_rx_coal { #define ENIC_SET_INSTANCE (1 << 3) #define ENIC_SET_HOST (1 << 4) =20 +#define MAX_TSO BIT(16) +#define WQ_ENET_MAX_DESC_LEN BIT(WQ_ENET_LEN_BITS) +#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1) + struct enic_port_profile { u32 set; u8 request; diff --git a/drivers/net/ethernet/cisco/enic/enic_main.c b/drivers/net/ethe= rnet/cisco/enic/enic_main.c index d716514366dfc56b4e08260d18d78fddd23f6253..52174843f02f1fecc75666367ad= 5034cbbcf8f07 100644 --- a/drivers/net/ethernet/cisco/enic/enic_main.c +++ b/drivers/net/ethernet/cisco/enic/enic_main.c @@ -59,11 +59,9 @@ #include "enic_pp.h" #include "enic_clsf.h" #include "enic_rq.h" +#include "enic_wq.h" =20 #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ) -#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS) -#define MAX_TSO (1 << 16) -#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1) =20 #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */ #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic = */ @@ -321,54 +319,6 @@ int enic_is_valid_vf(struct enic *enic, int vf) #endif } =20 -static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf) -{ - struct enic *enic =3D vnic_dev_priv(wq->vdev); - - if (buf->sop) - dma_unmap_single(&enic->pdev->dev, buf->dma_addr, buf->len, - DMA_TO_DEVICE); - else - dma_unmap_page(&enic->pdev->dev, buf->dma_addr, buf->len, - DMA_TO_DEVICE); - - if (buf->os_buf) - dev_kfree_skb_any(buf->os_buf); -} - -static void enic_wq_free_buf(struct vnic_wq *wq, - struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque) -{ - struct enic *enic =3D vnic_dev_priv(wq->vdev); - - enic->wq[wq->index].stats.cq_work++; - enic->wq[wq->index].stats.cq_bytes +=3D buf->len; - enic_free_wq_buf(wq, buf); -} - -static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, - u8 type, u16 q_number, u16 completed_index, void *opaque) -{ - struct enic *enic =3D vnic_dev_priv(vdev); - - spin_lock(&enic->wq[q_number].lock); - - vnic_wq_service(&enic->wq[q_number].vwq, cq_desc, - completed_index, enic_wq_free_buf, - opaque); - - if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number)) && - vnic_wq_desc_avail(&enic->wq[q_number].vwq) >=3D - (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)) { - netif_wake_subqueue(enic->netdev, q_number); - enic->wq[q_number].stats.wake++; - } - - spin_unlock(&enic->wq[q_number].lock); - - return 0; -} - static bool enic_log_q_error(struct enic *enic) { unsigned int i; diff --git a/drivers/net/ethernet/cisco/enic/enic_wq.c b/drivers/net/ethern= et/cisco/enic/enic_wq.c new file mode 100644 index 0000000000000000000000000000000000000000..88fdc462839a8360000eb8526be= 64118ea35c0e2 --- /dev/null +++ b/drivers/net/ethernet/cisco/enic/enic_wq.c @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Copyright 2025 Cisco Systems, Inc. All rights reserved. + +#include +#include "enic_res.h" +#include "enic.h" +#include "enic_wq.h" + +static void cq_desc_dec(const struct cq_desc *desc_arg, u8 *type, u8 *colo= r, + u16 *q_number, u16 *completed_index) +{ + const struct cq_desc *desc =3D desc_arg; + const u8 type_color =3D desc->type_color; + + *color =3D (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK; + + /* + * Make sure color bit is read from desc *before* other fields + * are read from desc. Hardware guarantees color bit is last + * bit (byte) written. Adding the rmb() prevents the compiler + * and/or CPU from reordering the reads which would potentially + * result in reading stale values. + */ + rmb(); + + *type =3D type_color & CQ_DESC_TYPE_MASK; + *q_number =3D le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK; + *completed_index =3D le16_to_cpu(desc->completed_index) & + CQ_DESC_COMP_NDX_MASK; +} + +unsigned int vnic_cq_service(struct vnic_cq *cq, unsigned int work_to_do, + int (*q_service)(struct vnic_dev *vdev, struct cq_desc *cq_desc, + u8 type, u16 q_number, u16 completed_index, + void *opaque), void *opaque) +{ + struct cq_desc *cq_desc; + unsigned int work_done =3D 0; + u16 q_number, completed_index; + u8 type, color; + + cq_desc =3D (struct cq_desc *)((u8 *)cq->ring.descs + + cq->ring.desc_size * cq->to_clean); + cq_desc_dec(cq_desc, &type, &color, + &q_number, &completed_index); + + while (color !=3D cq->last_color) { + if ((*q_service)(cq->vdev, cq_desc, type, q_number, + completed_index, opaque)) + break; + + cq->to_clean++; + if (cq->to_clean =3D=3D cq->ring.desc_count) { + cq->to_clean =3D 0; + cq->last_color =3D cq->last_color ? 0 : 1; + } + + cq_desc =3D (struct cq_desc *)((u8 *)cq->ring.descs + + cq->ring.desc_size * cq->to_clean); + cq_desc_dec(cq_desc, &type, &color, + &q_number, &completed_index); + + work_done++; + if (work_done >=3D work_to_do) + break; + } + + return work_done; +} + +void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf) +{ + struct enic *enic =3D vnic_dev_priv(wq->vdev); + + if (buf->sop) + dma_unmap_single(&enic->pdev->dev, buf->dma_addr, buf->len, + DMA_TO_DEVICE); + else + dma_unmap_page(&enic->pdev->dev, buf->dma_addr, buf->len, + DMA_TO_DEVICE); + + if (buf->os_buf) + dev_kfree_skb_any(buf->os_buf); +} + +static void enic_wq_free_buf(struct vnic_wq *wq, struct cq_desc *cq_desc, + struct vnic_wq_buf *buf, void *opaque) +{ + struct enic *enic =3D vnic_dev_priv(wq->vdev); + + enic->wq[wq->index].stats.cq_work++; + enic->wq[wq->index].stats.cq_bytes +=3D buf->len; + enic_free_wq_buf(wq, buf); +} + +int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, u8 typ= e, + u16 q_number, u16 completed_index, void *opaque) +{ + struct enic *enic =3D vnic_dev_priv(vdev); + + spin_lock(&enic->wq[q_number].lock); + + vnic_wq_service(&enic->wq[q_number].vwq, cq_desc, + completed_index, enic_wq_free_buf, opaque); + + if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number)) && + vnic_wq_desc_avail(&enic->wq[q_number].vwq) >=3D + (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)) { + netif_wake_subqueue(enic->netdev, q_number); + enic->wq[q_number].stats.wake++; + } + + spin_unlock(&enic->wq[q_number].lock); + + return 0; +} + diff --git a/drivers/net/ethernet/cisco/enic/enic_wq.h b/drivers/net/ethern= et/cisco/enic/enic_wq.h new file mode 100644 index 0000000000000000000000000000000000000000..051fe8a0cbbaba603414fb49b8a= 1cc919a2e1347 --- /dev/null +++ b/drivers/net/ethernet/cisco/enic/enic_wq.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only + * Copyright 2025 Cisco Systems, Inc. All rights reserved. + */ + +unsigned int vnic_cq_service(struct vnic_cq *cq, unsigned int work_to_do, + int (*q_service)(struct vnic_dev *vdev, struct cq_desc *cq_desc, + u8 type, u16 q_number, u16 completed_index, + void *opaque), void *opaque); + +void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf); + +int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, u8 typ= e, + u16 q_number, u16 completed_index, void *opaque); diff --git a/drivers/net/ethernet/cisco/enic/vnic_cq.h b/drivers/net/ethern= et/cisco/enic/vnic_cq.h index eed5bf59e5d2c87bf240a96638cc4f58cd17c79c..2fec4218cb8b5d68e0f28b35749= 48a0b7f77e426 100644 --- a/drivers/net/ethernet/cisco/enic/vnic_cq.h +++ b/drivers/net/ethernet/cisco/enic/vnic_cq.h @@ -56,47 +56,6 @@ struct vnic_cq { ktime_t prev_ts; }; =20 -static inline unsigned int vnic_cq_service(struct vnic_cq *cq, - unsigned int work_to_do, - int (*q_service)(struct vnic_dev *vdev, struct cq_desc *cq_desc, - u8 type, u16 q_number, u16 completed_index, void *opaque), - void *opaque) -{ - struct cq_desc *cq_desc; - unsigned int work_done =3D 0; - u16 q_number, completed_index; - u8 type, color; - - cq_desc =3D (struct cq_desc *)((u8 *)cq->ring.descs + - cq->ring.desc_size * cq->to_clean); - cq_desc_dec(cq_desc, &type, &color, - &q_number, &completed_index); - - while (color !=3D cq->last_color) { - - if ((*q_service)(cq->vdev, cq_desc, type, - q_number, completed_index, opaque)) - break; - - cq->to_clean++; - if (cq->to_clean =3D=3D cq->ring.desc_count) { - cq->to_clean =3D 0; - cq->last_color =3D cq->last_color ? 0 : 1; - } - - cq_desc =3D (struct cq_desc *)((u8 *)cq->ring.descs + - cq->ring.desc_size * cq->to_clean); - cq_desc_dec(cq_desc, &type, &color, - &q_number, &completed_index); - - work_done++; - if (work_done >=3D work_to_do) - break; - } - - return work_done; -} - void vnic_cq_free(struct vnic_cq *cq); int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int = index, unsigned int desc_count, unsigned int desc_size); --=20 2.48.1 From nobody Tue Feb 10 04:04:37 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C31DF28DD0; Fri, 28 Feb 2025 00:29:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740702542; cv=none; b=h5RHnrc88ac/qzb8HPqm+hQAEh5WQkpqCVVZouezc+d5TJaR9t/lW+Um/dPNwuOSDxpLVZUAVqDPdtldSJF9BxDVqiNB3a+GKcs5rn+K99e4Jucu/nRkAlc30JrzitNytqMggMAheUB8lRVeQBnwLwIwBqhYKKneRy7Zw5m8Fo4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740702542; c=relaxed/simple; bh=NsY29KM8qQTeChFpSPoCssap1GnyJX+lxtAgVW2qX7s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kQt60NJpnUYVRBezJnEMADozgwrTw/eZAxWcyukRy3ekcuK0lxSWki3sKzZi2TMM2QNvh9P+/ZjMTM8VesrsBLXdZPIH1CKfHRqSAB5dUqqlmM8M2srlifOsZKRx3CorQUYoCwP0sjHPEzhYuIjjHuijqR/jb2cCCYNYz6DrDWU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=X1zWxrGl; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="X1zWxrGl" Received: by smtp.kernel.org (Postfix) with ESMTPS id 6BBDCC4CEF2; Fri, 28 Feb 2025 00:29:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1740702542; bh=NsY29KM8qQTeChFpSPoCssap1GnyJX+lxtAgVW2qX7s=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=X1zWxrGlP0LTN9Bw4cHhQHH9BPaj50ZWfPTNIgjUCA96k3x//DqqQV/e7Iks8uxc2 AXe9c+88Ht+6+agTWQXgsXYc9qkmx6rS54Pl0C4qFdbigzcGF9hUbC/cEztpatAGij cPzUeQBJhbd5z1GHAxdXfnvPKQW/1ei4piCU6WV4xe62LHwhGq4zCcO7jGMlqrSFcm p0Hpv+xcu48urGxbqb5t5q78CEFgaBwAW9s9CRsK86wIJkTzrZ0AgL8Ux8k8dMYRgS 7H6ZgsKiDtJycUub3QhiieR2uhU5JQ52FeuHtzD9gOLGpVqzqMwN7BaFkOM8iEwNEc DTLMpacRAaDsQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61717C282C5; Fri, 28 Feb 2025 00:29:02 +0000 (UTC) From: Satish Kharat via B4 Relay Date: Thu, 27 Feb 2025 19:30:50 -0500 Subject: [PATCH 7/8] enic : cleanup of enic wq request completion path Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250227-enic_cleanup_and_ext_cq-v1-7-c314f95812bb@cisco.com> References: <20250227-enic_cleanup_and_ext_cq-v1-0-c314f95812bb@cisco.com> In-Reply-To: <20250227-enic_cleanup_and_ext_cq-v1-0-c314f95812bb@cisco.com> To: Christian Benvenuti , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Satish Kharat , Nelson Escobar , John Daley X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1740702696; l=7262; i=satishkh@cisco.com; s=20250226; h=from:subject:message-id; bh=1sczjSBdRA3aypx3Bqw397yw73Gn6lT/RmBkFM9Qsq4=; b=S+2we0MzlHBtbMJAKz/mOZW0ApUFVBIoGksFzT8Ga0CfCYnVMQC5330ULP4q+pMql0LT24YZE RSf5SnhA9L/Ac/cVu8XAkxbc9uwS39Nj4ZemnqglKGxb/YwtH5SDgQX X-Developer-Key: i=satishkh@cisco.com; a=ed25519; pk=lkxzORFYn5ejiy0kzcsfkpGoXZDcnHMc4n3YK7jJnJo= X-Endpoint-Received: by B4 Relay for satishkh@cisco.com/20250226 with auth_id=351 X-Original-From: Satish Kharat Reply-To: satishkh@cisco.com From: Satish Kharat Cleans up the enic wq request completion path needed for 16k wq size support. Co-developed-by: Nelson Escobar Signed-off-by: Nelson Escobar Co-developed-by: John Daley Signed-off-by: John Daley Signed-off-by: Satish Kharat --- drivers/net/ethernet/cisco/enic/enic_main.c | 7 +-- drivers/net/ethernet/cisco/enic/enic_wq.c | 98 +++++++++++++++----------= ---- drivers/net/ethernet/cisco/enic/enic_wq.h | 9 +-- 3 files changed, 55 insertions(+), 59 deletions(-) diff --git a/drivers/net/ethernet/cisco/enic/enic_main.c b/drivers/net/ethe= rnet/cisco/enic/enic_main.c index 52174843f02f1fecc75666367ad5034cbbcf8f07..54aa3953bf7b6ed4fdadd7b9871= ee7bbcf6614ea 100644 --- a/drivers/net/ethernet/cisco/enic/enic_main.c +++ b/drivers/net/ethernet/cisco/enic/enic_main.c @@ -1332,8 +1332,7 @@ static int enic_poll(struct napi_struct *napi, int bu= dget) unsigned int work_done, rq_work_done =3D 0, wq_work_done; int err; =20 - wq_work_done =3D vnic_cq_service(&enic->cq[cq_wq], wq_work_to_do, - enic_wq_service, NULL); + wq_work_done =3D enic_wq_cq_service(enic, cq_wq, wq_work_to_do); =20 if (budget > 0) rq_work_done =3D enic_rq_cq_service(enic, cq_rq, rq_work_to_do); @@ -1435,8 +1434,8 @@ static int enic_poll_msix_wq(struct napi_struct *napi= , int budget) wq_irq =3D wq->index; cq =3D enic_cq_wq(enic, wq_irq); intr =3D enic_msix_wq_intr(enic, wq_irq); - wq_work_done =3D vnic_cq_service(&enic->cq[cq], wq_work_to_do, - enic_wq_service, NULL); + + wq_work_done =3D enic_wq_cq_service(enic, cq, wq_work_to_do); =20 vnic_intr_return_credits(&enic->intr[intr], wq_work_done, 0 /* don't unmask intr */, diff --git a/drivers/net/ethernet/cisco/enic/enic_wq.c b/drivers/net/ethern= et/cisco/enic/enic_wq.c index 88fdc462839a8360000eb8526be64118ea35c0e2..37e8f6eeae3fabd3391b8fcacc5= f3420ad091b17 100644 --- a/drivers/net/ethernet/cisco/enic/enic_wq.c +++ b/drivers/net/ethernet/cisco/enic/enic_wq.c @@ -6,8 +6,12 @@ #include "enic.h" #include "enic_wq.h" =20 -static void cq_desc_dec(const struct cq_desc *desc_arg, u8 *type, u8 *colo= r, - u16 *q_number, u16 *completed_index) +#define ENET_CQ_DESC_COMP_NDX_BITS 14 +#define ENET_CQ_DESC_COMP_NDX_MASK GENMASK(ENET_CQ_DESC_COMP_NDX_BITS - 1,= 0) + +static inline void enic_wq_cq_desc_dec(const struct cq_desc *desc_arg, boo= l ext_wq, + u8 *type, u8 *color, u16 *q_number, + u16 *completed_index) { const struct cq_desc *desc =3D desc_arg; const u8 type_color =3D desc->type_color; @@ -25,47 +29,13 @@ static void cq_desc_dec(const struct cq_desc *desc_arg,= u8 *type, u8 *color, =20 *type =3D type_color & CQ_DESC_TYPE_MASK; *q_number =3D le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK; - *completed_index =3D le16_to_cpu(desc->completed_index) & - CQ_DESC_COMP_NDX_MASK; -} - -unsigned int vnic_cq_service(struct vnic_cq *cq, unsigned int work_to_do, - int (*q_service)(struct vnic_dev *vdev, struct cq_desc *cq_desc, - u8 type, u16 q_number, u16 completed_index, - void *opaque), void *opaque) -{ - struct cq_desc *cq_desc; - unsigned int work_done =3D 0; - u16 q_number, completed_index; - u8 type, color; =20 - cq_desc =3D (struct cq_desc *)((u8 *)cq->ring.descs + - cq->ring.desc_size * cq->to_clean); - cq_desc_dec(cq_desc, &type, &color, - &q_number, &completed_index); - - while (color !=3D cq->last_color) { - if ((*q_service)(cq->vdev, cq_desc, type, q_number, - completed_index, opaque)) - break; - - cq->to_clean++; - if (cq->to_clean =3D=3D cq->ring.desc_count) { - cq->to_clean =3D 0; - cq->last_color =3D cq->last_color ? 0 : 1; - } - - cq_desc =3D (struct cq_desc *)((u8 *)cq->ring.descs + - cq->ring.desc_size * cq->to_clean); - cq_desc_dec(cq_desc, &type, &color, - &q_number, &completed_index); - - work_done++; - if (work_done >=3D work_to_do) - break; - } - - return work_done; + if (ext_wq) + *completed_index =3D le16_to_cpu(desc->completed_index) & + ENET_CQ_DESC_COMP_NDX_MASK; + else + *completed_index =3D le16_to_cpu(desc->completed_index) & + CQ_DESC_COMP_NDX_MASK; } =20 void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf) @@ -93,15 +63,15 @@ static void enic_wq_free_buf(struct vnic_wq *wq, struct= cq_desc *cq_desc, enic_free_wq_buf(wq, buf); } =20 -int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, u8 typ= e, - u16 q_number, u16 completed_index, void *opaque) +static void enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, + u8 type, u16 q_number, u16 completed_index) { struct enic *enic =3D vnic_dev_priv(vdev); =20 spin_lock(&enic->wq[q_number].lock); =20 vnic_wq_service(&enic->wq[q_number].vwq, cq_desc, - completed_index, enic_wq_free_buf, opaque); + completed_index, enic_wq_free_buf, NULL); =20 if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number)) && vnic_wq_desc_avail(&enic->wq[q_number].vwq) >=3D @@ -111,7 +81,41 @@ int enic_wq_service(struct vnic_dev *vdev, struct cq_de= sc *cq_desc, u8 type, } =20 spin_unlock(&enic->wq[q_number].lock); - - return 0; } =20 +unsigned int enic_wq_cq_service(struct enic *enic, unsigned int cq_index, = unsigned int work_to_do) +{ + u16 q_number, completed_index; + u8 type, color; + unsigned int work_done =3D 0; + struct vnic_cq *cq =3D &enic->cq[cq_index]; + struct cq_desc *cq_desc =3D (struct cq_desc *)((u8 *)cq->ring.descs + + cq->ring.desc_size * cq->to_clean); + + bool ext_wq =3D cq->ring.size > ENIC_MAX_WQ_DESCS; + + enic_wq_cq_desc_dec(cq_desc, ext_wq, &type, &color, + &q_number, &completed_index); + + while (color !=3D cq->last_color) { + enic_wq_service(cq->vdev, cq_desc, type, q_number, completed_index); + + cq->to_clean++; + + if (cq->to_clean =3D=3D cq->ring.desc_count) { + cq->to_clean =3D 0; + cq->last_color =3D cq->last_color ? 0 : 1; + } + + if (++work_done >=3D work_to_do) + break; + + cq_desc =3D (struct cq_desc *)((u8 *)cq->ring.descs + + cq->ring.desc_size * cq->to_clean); + + enic_wq_cq_desc_dec(cq_desc, ext_wq, &type, &color, + &q_number, &completed_index); + } + + return work_done; +} diff --git a/drivers/net/ethernet/cisco/enic/enic_wq.h b/drivers/net/ethern= et/cisco/enic/enic_wq.h index 051fe8a0cbbaba603414fb49b8a1cc919a2e1347..c54df0a7f061dc544816a2c64bb= 42f2d617c00bb 100644 --- a/drivers/net/ethernet/cisco/enic/enic_wq.h +++ b/drivers/net/ethernet/cisco/enic/enic_wq.h @@ -2,12 +2,5 @@ * Copyright 2025 Cisco Systems, Inc. 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Satish Kharat , Nelson Escobar , John Daley X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1740702696; l=8090; i=satishkh@cisco.com; s=20250226; h=from:subject:message-id; bh=vOtOGLgIwHioJuNVEdz1PRgNdWKUp87V1dxR5wuRaVM=; b=I04rCjeE0JD9Y/0rPE3IceHP9RXGQ8kzkZ/XXn/7WUAYR8NrVYOPmNFYOMWtDcHPocUN423cY yTv/Sz1gb1UBwLrOeMcAB6dHh/RgZF96Zb1BwaZjBTZyKa4Zmez2Kvs X-Developer-Key: i=satishkh@cisco.com; a=ed25519; pk=lkxzORFYn5ejiy0kzcsfkpGoXZDcnHMc4n3YK7jJnJo= X-Endpoint-Received: by B4 Relay for satishkh@cisco.com/20250226 with auth_id=351 X-Original-From: Satish Kharat Reply-To: satishkh@cisco.com From: Satish Kharat Enables reading the max rq and wq entries supported from the hw. Enables 16k rq and wq entries on hw that supports. Co-developed-by: Nelson Escobar Signed-off-by: Nelson Escobar Co-developed-by: John Daley Signed-off-by: John Daley Signed-off-by: Satish Kharat --- drivers/net/ethernet/cisco/enic/enic_ethtool.c | 12 +++++------ drivers/net/ethernet/cisco/enic/enic_res.c | 29 ++++++++++++++++------= ---- drivers/net/ethernet/cisco/enic/enic_res.h | 11 ++++++---- drivers/net/ethernet/cisco/enic/enic_wq.c | 2 +- drivers/net/ethernet/cisco/enic/vnic_enet.h | 5 +++++ drivers/net/ethernet/cisco/enic/vnic_rq.h | 2 +- drivers/net/ethernet/cisco/enic/vnic_wq.h | 2 +- 7 files changed, 39 insertions(+), 24 deletions(-) diff --git a/drivers/net/ethernet/cisco/enic/enic_ethtool.c b/drivers/net/e= thernet/cisco/enic/enic_ethtool.c index 18b929fc2879912ad09025996a4f1b9fdb353961..529160926a9633f5e2d60e6842c= 2fcf07492854b 100644 --- a/drivers/net/ethernet/cisco/enic/enic_ethtool.c +++ b/drivers/net/ethernet/cisco/enic/enic_ethtool.c @@ -222,9 +222,9 @@ static void enic_get_ringparam(struct net_device *netde= v, struct enic *enic =3D netdev_priv(netdev); struct vnic_enet_config *c =3D &enic->config; =20 - ring->rx_max_pending =3D ENIC_MAX_RQ_DESCS; + ring->rx_max_pending =3D c->max_rq_ring; ring->rx_pending =3D c->rq_desc_count; - ring->tx_max_pending =3D ENIC_MAX_WQ_DESCS; + ring->tx_max_pending =3D c->max_wq_ring; ring->tx_pending =3D c->wq_desc_count; } =20 @@ -252,18 +252,18 @@ static int enic_set_ringparam(struct net_device *netd= ev, } rx_pending =3D c->rq_desc_count; tx_pending =3D c->wq_desc_count; - if (ring->rx_pending > ENIC_MAX_RQ_DESCS || + if (ring->rx_pending > c->max_rq_ring || ring->rx_pending < ENIC_MIN_RQ_DESCS) { netdev_info(netdev, "rx pending (%u) not in range [%u,%u]", ring->rx_pending, ENIC_MIN_RQ_DESCS, - ENIC_MAX_RQ_DESCS); + c->max_rq_ring); return -EINVAL; } - if (ring->tx_pending > ENIC_MAX_WQ_DESCS || + if (ring->tx_pending > c->max_wq_ring || ring->tx_pending < ENIC_MIN_WQ_DESCS) { netdev_info(netdev, "tx pending (%u) not in range [%u,%u]", ring->tx_pending, ENIC_MIN_WQ_DESCS, - ENIC_MAX_WQ_DESCS); + c->max_wq_ring); return -EINVAL; } if (running) diff --git a/drivers/net/ethernet/cisco/enic/enic_res.c b/drivers/net/ether= net/cisco/enic/enic_res.c index a7179cc4b5296cfbce137c54a9e17e6b358a19ae..bbd3143ed73e77d25a1e4921e07= 3c929e92d8230 100644 --- a/drivers/net/ethernet/cisco/enic/enic_res.c +++ b/drivers/net/ethernet/cisco/enic/enic_res.c @@ -59,31 +59,38 @@ int enic_get_vnic_config(struct enic *enic) GET_CONFIG(intr_timer_usec); GET_CONFIG(loop_tag); GET_CONFIG(num_arfs); + GET_CONFIG(max_rq_ring); + GET_CONFIG(max_wq_ring); + GET_CONFIG(max_cq_ring); + + if (!c->max_wq_ring) + c->max_wq_ring =3D ENIC_MAX_WQ_DESCS_DEFAULT; + if (!c->max_rq_ring) + c->max_rq_ring =3D ENIC_MAX_RQ_DESCS_DEFAULT; + if (!c->max_cq_ring) + c->max_cq_ring =3D ENIC_MAX_CQ_DESCS_DEFAULT; =20 c->wq_desc_count =3D - min_t(u32, ENIC_MAX_WQ_DESCS, - max_t(u32, ENIC_MIN_WQ_DESCS, - c->wq_desc_count)); + min_t(u32, c->max_wq_ring, + max_t(u32, ENIC_MIN_WQ_DESCS, c->wq_desc_count)); c->wq_desc_count &=3D 0xffffffe0; /* must be aligned to groups of 32 */ =20 c->rq_desc_count =3D - min_t(u32, ENIC_MAX_RQ_DESCS, - max_t(u32, ENIC_MIN_RQ_DESCS, - c->rq_desc_count)); + min_t(u32, c->max_rq_ring, + max_t(u32, ENIC_MIN_RQ_DESCS, c->rq_desc_count)); c->rq_desc_count &=3D 0xffffffe0; /* must be aligned to groups of 32 */ =20 if (c->mtu =3D=3D 0) c->mtu =3D 1500; - c->mtu =3D min_t(u16, ENIC_MAX_MTU, - max_t(u16, ENIC_MIN_MTU, - c->mtu)); + c->mtu =3D min_t(u16, ENIC_MAX_MTU, max_t(u16, ENIC_MIN_MTU, c->mtu)); =20 c->intr_timer_usec =3D min_t(u32, c->intr_timer_usec, vnic_dev_get_intr_coal_timer_max(enic->vdev)); =20 dev_info(enic_get_dev(enic), - "vNIC MAC addr %pM wq/rq %d/%d mtu %d\n", - enic->mac_addr, c->wq_desc_count, c->rq_desc_count, c->mtu); + "vNIC MAC addr %pM wq/rq %d/%d max wq/rq/cq %d/%d/%d mtu %d\n", + enic->mac_addr, c->wq_desc_count, c->rq_desc_count, + c->max_wq_ring, c->max_rq_ring, c->max_cq_ring, c->mtu); =20 dev_info(enic_get_dev(enic), "vNIC csum tx/rx %s/%s " "tso/lro %s/%s rss %s intr mode %s type %s timer %d usec " diff --git a/drivers/net/ethernet/cisco/enic/enic_res.h b/drivers/net/ether= net/cisco/enic/enic_res.h index b8ee42d297aaf7db75e711be15280b01389567c9..02dca1ae4a2246811277e5ff3aa= 6650f09fb0f9a 100644 --- a/drivers/net/ethernet/cisco/enic/enic_res.h +++ b/drivers/net/ethernet/cisco/enic/enic_res.h @@ -12,10 +12,13 @@ #include "vnic_wq.h" #include "vnic_rq.h" =20 -#define ENIC_MIN_WQ_DESCS 64 -#define ENIC_MAX_WQ_DESCS 4096 -#define ENIC_MIN_RQ_DESCS 64 -#define ENIC_MAX_RQ_DESCS 4096 +#define ENIC_MIN_WQ_DESCS 64 +#define ENIC_MAX_WQ_DESCS_DEFAULT 4096 +#define ENIC_MAX_WQ_DESCS 16384 +#define ENIC_MIN_RQ_DESCS 64 +#define ENIC_MAX_RQ_DESCS 16384 +#define ENIC_MAX_RQ_DESCS_DEFAULT 4096 +#define ENIC_MAX_CQ_DESCS_DEFAULT (64 * 1024) =20 #define ENIC_MIN_MTU ETH_MIN_MTU #define ENIC_MAX_MTU 9000 diff --git a/drivers/net/ethernet/cisco/enic/enic_wq.c b/drivers/net/ethern= et/cisco/enic/enic_wq.c index 37e8f6eeae3fabd3391b8fcacc5f3420ad091b17..82d8073e5549094825520e20dbd= de3ba97f56b2c 100644 --- a/drivers/net/ethernet/cisco/enic/enic_wq.c +++ b/drivers/net/ethernet/cisco/enic/enic_wq.c @@ -92,7 +92,7 @@ unsigned int enic_wq_cq_service(struct enic *enic, unsign= ed int cq_index, unsign struct cq_desc *cq_desc =3D (struct cq_desc *)((u8 *)cq->ring.descs + cq->ring.desc_size * cq->to_clean); =20 - bool ext_wq =3D cq->ring.size > ENIC_MAX_WQ_DESCS; + bool ext_wq =3D cq->ring.size > ENIC_MAX_WQ_DESCS_DEFAULT; =20 enic_wq_cq_desc_dec(cq_desc, ext_wq, &type, &color, &q_number, &completed_index); diff --git a/drivers/net/ethernet/cisco/enic/vnic_enet.h b/drivers/net/ethe= rnet/cisco/enic/vnic_enet.h index 5acc236069dea358c2f330824ad57ad7920889cc..9e8e86262a3fea0ab37f8044c81= ba798b5b00c90 100644 --- a/drivers/net/ethernet/cisco/enic/vnic_enet.h +++ b/drivers/net/ethernet/cisco/enic/vnic_enet.h @@ -21,6 +21,11 @@ struct vnic_enet_config { u16 loop_tag; u16 vf_rq_count; u16 num_arfs; + u8 reserved[66]; + u32 max_rq_ring; // MAX RQ ring size + u32 max_wq_ring; // MAX WQ ring size + u32 max_cq_ring; // MAX CQ ring size + u32 rdma_rsvd_lkey; // Reserved (privileged) LKey }; =20 #define VENETF_TSO 0x1 /* TSO enabled */ diff --git a/drivers/net/ethernet/cisco/enic/vnic_rq.h b/drivers/net/ethern= et/cisco/enic/vnic_rq.h index 2ee4be2b9a343a7a340c2b4a81fe560ccc2e6715..a1cdd729caece5c3378c3a8025c= edf9b2bf758ab 100644 --- a/drivers/net/ethernet/cisco/enic/vnic_rq.h +++ b/drivers/net/ethernet/cisco/enic/vnic_rq.h @@ -50,7 +50,7 @@ struct vnic_rq_ctrl { (VNIC_RQ_BUF_BLK_ENTRIES(entries) * sizeof(struct vnic_rq_buf)) #define VNIC_RQ_BUF_BLKS_NEEDED(entries) \ DIV_ROUND_UP(entries, VNIC_RQ_BUF_BLK_ENTRIES(entries)) -#define VNIC_RQ_BUF_BLKS_MAX VNIC_RQ_BUF_BLKS_NEEDED(4096) +#define VNIC_RQ_BUF_BLKS_MAX VNIC_RQ_BUF_BLKS_NEEDED(16384) =20 struct vnic_rq_buf { struct vnic_rq_buf *next; diff --git a/drivers/net/ethernet/cisco/enic/vnic_wq.h b/drivers/net/ethern= et/cisco/enic/vnic_wq.h index 75c52691107447f1ea1deb1d4eeabb0e0313b3eb..3bb4758100ba481c3bd7a873203= e8b033d6b99a6 100644 --- a/drivers/net/ethernet/cisco/enic/vnic_wq.h +++ b/drivers/net/ethernet/cisco/enic/vnic_wq.h @@ -62,7 +62,7 @@ struct vnic_wq_buf { (VNIC_WQ_BUF_BLK_ENTRIES(entries) * sizeof(struct vnic_wq_buf)) #define VNIC_WQ_BUF_BLKS_NEEDED(entries) \ DIV_ROUND_UP(entries, VNIC_WQ_BUF_BLK_ENTRIES(entries)) -#define VNIC_WQ_BUF_BLKS_MAX VNIC_WQ_BUF_BLKS_NEEDED(4096) +#define VNIC_WQ_BUF_BLKS_MAX VNIC_WQ_BUF_BLKS_NEEDED(16384) =20 struct vnic_wq { unsigned int index; --=20 2.48.1