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[34.91.171.30]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5e462032b00sm3058459a12.68.2025.02.26.08.44.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Feb 2025 08:44:37 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 26 Feb 2025 16:44:26 +0000 Subject: [PATCH v2 1/2] dt-bindings: reset: syscon-reboot: support reset modes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250226-syscon-reboot-reset-mode-v2-1-f80886370bb7@linaro.org> References: <20250226-syscon-reboot-reset-mode-v2-0-f80886370bb7@linaro.org> In-Reply-To: <20250226-syscon-reboot-reset-mode-v2-0-f80886370bb7@linaro.org> To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Add support for specifying different register/mask/value combinations for different types of reset. In particular, update the binding to allow platforms to specify the following reset modes: soft, warm, cold, hard. Linux can perform different types of reset using its reboot=3D kernel command line argument, and some platforms also wish to reset differently based on whether or not e.g. contents of RAM should be retained across the reboot. The new properties match the existing properties, just prefixed with one of the reset modes mentioned above. Signed-off-by: Andr=C3=A9 Draszik --- .../bindings/power/reset/syscon-reboot.yaml | 74 ++++++++++++++++++= ++++ 1 file changed, 74 insertions(+) diff --git a/Documentation/devicetree/bindings/power/reset/syscon-reboot.ya= ml b/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml index 19d3093e6cd2f7e39d94c56636dc202a4427ffc3..1bd821877a16b274ac78a80017d= 003f1aa9fd471 100644 --- a/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml +++ b/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml @@ -18,6 +18,11 @@ description: |+ parental dt-node. So the SYSCON reboot node should be represented as a sub-node of a "syscon", "simple-mfd" node. Though the regmap property pointing to the system controller node is also supported. + This also supports specification of separate sets of register/mask/value + pairs for different types of reset: cold, hard, soft and warm, using + the respective properties with the respective reset type prefix. If pref= ixed + properties are not specified for a reset type, the non-prefixed properti= es + will be used for that reset type. =20 properties: compatible: @@ -49,12 +54,41 @@ properties: priority: default: 192 =20 +patternProperties: + "^(cold|hard|soft|warm)-(mask|offset|value)$": + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Optional alternative offset / mask / value combinations for specific + reboot modes. The mask is optional. + + "^(cold|hard|soft|warm)-reg$": + description: + Optional alternative base address and size for the reboot register f= or + specific reboot modes. + oneOf: - required: - offset - required: - reg =20 +dependencies: + cold-mask: [ cold-value ] + cold-offset: [ cold-value ] + cold-reg: [ cold-value ] + + hard-mask: [ hard-value ] + hard-offset: [ hard-value ] + hard-reg: [ hard-value ] + + soft-mask: [ soft-value ] + soft-offset: [ soft-value ] + soft-reg: [ soft-value ] + + warm-mask: [ warm-value ] + warm-offset: [ warm-value ] + warm-reg: [ warm-value ] + required: - compatible =20 @@ -70,6 +104,46 @@ allOf: required: - value =20 + - if: + required: + - cold-value + then: + oneOf: + - required: + - cold-offset + - required: + - cold-reg + + - if: + required: + - hard-value + then: + oneOf: + - required: + - hard-offset + - required: + - hard-reg + + - if: + required: + - soft-value + then: + oneOf: + - required: + - soft-offset + - required: + - soft-reg + + - if: + required: + - warm-value + then: + oneOf: + - required: + - warm-offset + - required: + - warm-reg + examples: - | reboot { --=20 2.48.1.658.g4767266eb4-goog From nobody Mon Feb 9 01:07:01 2026 Received: from mail-ed1-f42.google.com (mail-ed1-f42.google.com [209.85.208.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE323222569 for ; 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[34.91.171.30]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5e462032b00sm3058459a12.68.2025.02.26.08.44.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Feb 2025 08:44:38 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 26 Feb 2025 16:44:27 +0000 Subject: [PATCH v2 2/2] power: reset: syscon-reboot: support different reset modes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250226-syscon-reboot-reset-mode-v2-2-f80886370bb7@linaro.org> References: <20250226-syscon-reboot-reset-mode-v2-0-f80886370bb7@linaro.org> In-Reply-To: <20250226-syscon-reboot-reset-mode-v2-0-f80886370bb7@linaro.org> To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Linux supports a couple different reset modes, but this driver here doesn't distinguish between them and issues the same syscon register write irrespective of the reset mode requested by the kernel. Update this driver to support most of Linux' reset modes: cold, hard, warm, and soft. The actions to take for these are taken from DT, and are all new optional properties. The property names match the existing properties supported but should be prefixed with the reset mode. This change is meant to be backwards compatible with existing DTs, and if Linux requests a reset mode that this driver doesn't support, or that the DT doesn't specify, the reset is triggered using the fallback / default entry. As an example why this is useful, other than properly supporting the Linux reboot=3D kernel command line option or sysfs entry, this change allows platforms to e.g. default to a more secure cold-reset, but also to do a warm-reset in case RAM contents needs to be retained across the reset. Signed-off-by: Andr=C3=A9 Draszik --- drivers/power/reset/syscon-reboot.c | 88 ++++++++++++++++++++++++++++++++-= ---- 1 file changed, 77 insertions(+), 11 deletions(-) diff --git a/drivers/power/reset/syscon-reboot.c b/drivers/power/reset/sysc= on-reboot.c index d623d77e657e4c233d8ae88bb099bee13c48a9ef..1d3d8a3265ae8005c685b42d3e5= 54bd8bb0047ea 100644 --- a/drivers/power/reset/syscon-reboot.c +++ b/drivers/power/reset/syscon-reboot.c @@ -14,11 +14,29 @@ #include #include =20 -struct syscon_reboot_context { - struct regmap *map; +/* REBOOT_GPIO doesn't make sense for syscon-reboot */ +static const struct { + enum reboot_mode mode; + const char *prefix; +} prefix_map[] =3D { + { .mode =3D REBOOT_COLD, .prefix =3D "cold" }, + { .mode =3D REBOOT_WARM, .prefix =3D "warm" }, + { .mode =3D REBOOT_HARD, .prefix =3D "hard" }, + { .mode =3D REBOOT_SOFT, .prefix =3D "soft" }, +}; + +struct reboot_mode_bits { u32 offset; u32 value; u32 mask; + bool valid; +}; + +struct syscon_reboot_context { + struct regmap *map; + + struct reboot_mode_bits mode_bits[REBOOT_SOFT + 1]; + struct reboot_mode_bits catchall; struct notifier_block restart_handler; }; =20 @@ -28,9 +46,16 @@ static int syscon_restart_handle(struct notifier_block *= this, struct syscon_reboot_context *ctx =3D container_of(this, struct syscon_reboot_context, restart_handler); + const struct reboot_mode_bits *mode_bits; + + if (mode < ARRAY_SIZE(ctx->mode_bits) && ctx->mode_bits[mode].valid) + mode_bits =3D &ctx->mode_bits[mode]; + else + mode_bits =3D &ctx->catchall; =20 /* Issue the reboot */ - regmap_update_bits(ctx->map, ctx->offset, ctx->mask, ctx->value); + regmap_update_bits(ctx->map, mode_bits->offset, mode_bits->mask, + mode_bits->value); =20 mdelay(1000); =20 @@ -45,6 +70,7 @@ static int syscon_reboot_probe(struct platform_device *pd= ev) int mask_err, value_err; int priority; int err; + char prop[32]; =20 ctx =3D devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); if (!ctx) @@ -60,12 +86,52 @@ static int syscon_reboot_probe(struct platform_device *= pdev) if (of_property_read_s32(pdev->dev.of_node, "priority", &priority)) priority =3D 192; =20 - if (of_property_read_u32(pdev->dev.of_node, "offset", &ctx->offset)) - if (of_property_read_u32(pdev->dev.of_node, "reg", &ctx->offset)) + BUILD_BUG_ON(ARRAY_SIZE(prefix_map) !=3D ARRAY_SIZE(ctx->mode_bits)); + BUILD_BUG_ON(ARRAY_SIZE(ctx->mode_bits) <=3D REBOOT_COLD); + BUILD_BUG_ON(ARRAY_SIZE(ctx->mode_bits) <=3D REBOOT_WARM); + BUILD_BUG_ON(ARRAY_SIZE(ctx->mode_bits) <=3D REBOOT_HARD); + BUILD_BUG_ON(ARRAY_SIZE(ctx->mode_bits) <=3D REBOOT_SOFT); + + for (int i =3D 0; i < ARRAY_SIZE(prefix_map); ++i) { + const char * const prefix =3D prefix_map[i].prefix; + struct reboot_mode_bits * const mode_bits =3D + &ctx->mode_bits[prefix_map[i].mode]; + + snprintf(prop, sizeof(prop), "%s-offset", prefix); + if (of_property_read_u32(pdev->dev.of_node, "offset", + &mode_bits->offset)) + continue; + + snprintf(prop, sizeof(prop), "%s-value", prefix); + if (of_property_read_u32(pdev->dev.of_node, prop, + &mode_bits->value)) { + /* don't support old binding here */ + dev_err(dev, "'%s-value' is mandatory\n", prefix); + continue; + } + + snprintf(prop, sizeof(prop), "%s-mask", prefix); + mask_err =3D of_property_read_u32(pdev->dev.of_node, prop, + &mode_bits->mask); + + if (mask_err) + /* support value without mask*/ + mode_bits->mask =3D 0xffffffff; + + mode_bits->valid =3D true; + } + + /* catch-all entry */ + if (of_property_read_u32(pdev->dev.of_node, "offset", + &ctx->catchall.offset)) + if (of_property_read_u32(pdev->dev.of_node, "reg", + &ctx->catchall.offset)) return -EINVAL; =20 - value_err =3D of_property_read_u32(pdev->dev.of_node, "value", &ctx->valu= e); - mask_err =3D of_property_read_u32(pdev->dev.of_node, "mask", &ctx->mask); + value_err =3D of_property_read_u32(pdev->dev.of_node, "value", + &ctx->catchall.value); + mask_err =3D of_property_read_u32(pdev->dev.of_node, "mask", + &ctx->catchall.mask); if (value_err && mask_err) { dev_err(dev, "unable to read 'value' and 'mask'"); return -EINVAL; @@ -73,11 +139,11 @@ static int syscon_reboot_probe(struct platform_device = *pdev) =20 if (value_err) { /* support old binding */ - ctx->value =3D ctx->mask; - ctx->mask =3D 0xFFFFFFFF; + ctx->catchall.value =3D ctx->catchall.mask; + ctx->catchall.mask =3D 0xFFFFFFFF; } else if (mask_err) { - /* support value without mask*/ - ctx->mask =3D 0xFFFFFFFF; + /* support value without mask */ + ctx->catchall.mask =3D 0xFFFFFFFF; } =20 ctx->restart_handler.notifier_call =3D syscon_restart_handle; --=20 2.48.1.658.g4767266eb4-goog