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charset="utf-8" Add DSI Controller v2.5.1 support for SA8775P SoC. Signed-off-by: Ayushi Makhija --- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 18 ++++++++++++++++++ drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 + 2 files changed, 19 insertions(+) diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/ds= i_cfg.c index 7754dcec33d0..71881d9370af 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -221,6 +221,22 @@ static const struct msm_dsi_config sc7280_dsi_cfg =3D { }, }; =20 +static const struct regulator_bulk_data sa8775p_dsi_regulators[] =3D { + { .supply =3D "vdda", .init_load_uA =3D 30100 }, /* 1.2 V */ + { .supply =3D "refgen" }, +}; + +static const struct msm_dsi_config sa8775p_dsi_cfg =3D { + .io_offset =3D DSI_6G_REG_SHIFT, + .regulator_data =3D sa8775p_dsi_regulators, + .num_regulators =3D ARRAY_SIZE(sa8775p_dsi_regulators), + .bus_clk_names =3D dsi_v2_4_clk_names, + .num_bus_clks =3D ARRAY_SIZE(dsi_v2_4_clk_names), + .io_start =3D { + { 0xae94000, 0xae96000 }, + }, +}; + static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops =3D { .link_clk_set_rate =3D dsi_link_clk_set_rate_v2, .link_clk_enable =3D dsi_link_clk_enable_v2, @@ -294,6 +310,8 @@ static const struct msm_dsi_cfg_handler dsi_cfg_handler= s[] =3D { &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_5_0, &sc7280_dsi_cfg, &msm_dsi_6g_v2_host_ops}, + {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_5_1, + &sa8775p_dsi_cfg, &msm_dsi_6g_v2_host_ops}, {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_6_0, &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_7_0, diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h b/drivers/gpu/drm/msm/dsi/ds= i_cfg.h index 120cb65164c1..65b0705fac0e 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h @@ -27,6 +27,7 @@ #define MSM_DSI_6G_VER_MINOR_V2_4_0 0x20040000 #define MSM_DSI_6G_VER_MINOR_V2_4_1 0x20040001 #define MSM_DSI_6G_VER_MINOR_V2_5_0 0x20050000 +#define MSM_DSI_6G_VER_MINOR_V2_5_1 0x20050001 #define MSM_DSI_6G_VER_MINOR_V2_6_0 0x20060000 #define MSM_DSI_6G_VER_MINOR_V2_7_0 0x20070000 #define MSM_DSI_6G_VER_MINOR_V2_8_0 0x20080000 --=20 2.34.1