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Tue, 25 Feb 2025 01:05:19 -0800 (PST) From: Neil Armstrong Date: Tue, 25 Feb 2025 10:05:10 +0100 Subject: [PATCH 2/4] media: platform: qcom/iris: add reset_controller & power_off_controller to vpu_ops Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250225-topic-sm8x50-iris-v10-v1-2-128ef05d9665@linaro.org> References: <20250225-topic-sm8x50-iris-v10-v1-0-128ef05d9665@linaro.org> In-Reply-To: <20250225-topic-sm8x50-iris-v10-v1-0-128ef05d9665@linaro.org> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4781; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=MuVFv0xJA1aIIdUbLAcynY4g87XgdT+Fpu04pLc0qqk=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBnvYfLpi2ryu2nYjTFw4rJn8OiaJy5B5WJgLv0J0SB noO6oFeJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZ72HywAKCRB33NvayMhJ0SJ3D/ 9LqsoPuOuXTSSGjcDIaChAU3qiHXJeQd+SP4Y4Lz51YFykc44TJzIyw2FpeKqPGMGt6/lJ1Am3NOkM oU0cfdc1iGpzgcxt/Mp1guuEFXZRkzSqcceXw/YyE+m7t1AGyu8BRFveUwxTQoaH6BNeLudxBOKLl2 z/wGTmZkMQd1JVzVsX8TLI1F2fmDW38bO1TnQfIGTALiB+kP6LkedkCNaKqD7FQULmr/xYb1lLDOEe bEy/EuP7EuvjCt6vWLh+RC228HcZHFuwyORpP/dNXMJWJxlWGk8x79nfysiG7NSW4i/EiVPD4oxD5e KyZHjoOCsM9JSByZlW7He6usz5D3ZBEp7ievG2E7Ww27GqDH++cynzOFE6meK2fzd8jy25hTrv14Jj STFXGLGt8T1sgdG1WyShCNoNhmwltYzskZGXvzCH5BbvyVEljSSNNpUNxxrIfZGKzLv7wvjWd1rRhF dqZsxiPY4dRnObHfC4DvBIvtaU9rrpT2FCtlj/fRBRlmthEgURkmlqZOXtEGVlQ8991ReN1FOpNBcE utJdBjoQI/61mbJiwpixZNfES81PLGjegIs3Xy6PX3VBE08r4nd3mWWLMeNnaa8Gwl4ONlHnDDFCs+ wyzvJiKy9P0BHNOcAKQqG7gqmGBcuhwl38fwKGA3BgQY+OSK6HGc2q8/gjaA== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE In order to support the SM8650 iris33 hardware, we need to provide specific reset and constoller power off sequences via the vpu_ops callbacks. Add those callbacks, and use the current helpers for currently supported platforms. Signed-off-by: Neil Armstrong --- drivers/media/platform/qcom/iris/iris_vpu2.c | 2 ++ drivers/media/platform/qcom/iris/iris_vpu3.c | 2 ++ drivers/media/platform/qcom/iris/iris_vpu_common.c | 14 ++++++++++---- drivers/media/platform/qcom/iris/iris_vpu_common.h | 4 ++++ 4 files changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_vpu2.c b/drivers/media/p= latform/qcom/iris/iris_vpu2.c index 8f502aed43ce2fa6a272a2ce14ff1ca54d3e63a2..093e2068ec35e902f6c7bb3a487= a679f9eada39a 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu2.c +++ b/drivers/media/platform/qcom/iris/iris_vpu2.c @@ -33,6 +33,8 @@ static u64 iris_vpu2_calc_freq(struct iris_inst *inst, si= ze_t data_size) } =20 const struct vpu_ops iris_vpu2_ops =3D { + .reset_controller =3D iris_vpu_reset_controller, .power_off_hw =3D iris_vpu_power_off_hw, + .power_off_controller =3D iris_vpu_power_off_controller, .calc_freq =3D iris_vpu2_calc_freq, }; diff --git a/drivers/media/platform/qcom/iris/iris_vpu3.c b/drivers/media/p= latform/qcom/iris/iris_vpu3.c index b484638e6105a69319232f667ee7ae95e3853698..95f362633c95b101ecfda6480c4= c0b73416bd00c 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu3.c +++ b/drivers/media/platform/qcom/iris/iris_vpu3.c @@ -117,6 +117,8 @@ static u64 iris_vpu3_calculate_frequency(struct iris_in= st *inst, size_t data_siz } =20 const struct vpu_ops iris_vpu3_ops =3D { + .reset_controller =3D iris_vpu_reset_controller, .power_off_hw =3D iris_vpu3_power_off_hardware, + .power_off_controller =3D iris_vpu_power_off_controller, .calc_freq =3D iris_vpu3_calculate_frequency, }; diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/m= edia/platform/qcom/iris/iris_vpu_common.c index fe9896d66848cdcd8c67bd45bbf3b6ce4a01ab10..ec8b10d836d0993bcd722a2bafb= b577b85f41fc9 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c @@ -211,7 +211,7 @@ int iris_vpu_prepare_pc(struct iris_core *core) return -EAGAIN; } =20 -static int iris_vpu_power_off_controller(struct iris_core *core) +int iris_vpu_power_off_controller(struct iris_core *core) { u32 val =3D 0; int ret; @@ -264,23 +264,29 @@ void iris_vpu_power_off(struct iris_core *core) { dev_pm_opp_set_rate(core->dev, 0); core->iris_platform_data->vpu_ops->power_off_hw(core); - iris_vpu_power_off_controller(core); + core->iris_platform_data->vpu_ops->power_off_controller(core); iris_unset_icc_bw(core); =20 if (!iris_vpu_watchdog(core, core->intr_status)) disable_irq_nosync(core->irq); } =20 -static int iris_vpu_power_on_controller(struct iris_core *core) +int iris_vpu_reset_controller(struct iris_core *core) { u32 rst_tbl_size =3D core->iris_platform_data->clk_rst_tbl_size; + + return reset_control_bulk_reset(rst_tbl_size, core->resets); +} + +static int iris_vpu_power_on_controller(struct iris_core *core) +{ int ret; =20 ret =3D iris_enable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_= CTRL_POWER_DOMAIN]); if (ret) return ret; =20 - ret =3D reset_control_bulk_reset(rst_tbl_size, core->resets); + ret =3D core->iris_platform_data->vpu_ops->reset_controller(core); if (ret) goto err_disable_power; =20 diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.h b/drivers/m= edia/platform/qcom/iris/iris_vpu_common.h index 63fa1fa5a4989e48aebdb6c7619c140000c0b44c..c948d8b5aee87ccf1fd53c5518a= 27294232d8fb8 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.h +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.h @@ -12,7 +12,9 @@ extern const struct vpu_ops iris_vpu2_ops; extern const struct vpu_ops iris_vpu3_ops; =20 struct vpu_ops { + int (*reset_controller)(struct iris_core *core); void (*power_off_hw)(struct iris_core *core); + int (*power_off_controller)(struct iris_core *core); u64 (*calc_freq)(struct iris_inst *inst, size_t data_size); }; =20 @@ -21,7 +23,9 @@ void iris_vpu_raise_interrupt(struct iris_core *core); void iris_vpu_clear_interrupt(struct iris_core *core); int iris_vpu_watchdog(struct iris_core *core, u32 intr_status); int iris_vpu_prepare_pc(struct iris_core *core); +int iris_vpu_reset_controller(struct iris_core *core); int iris_vpu_power_on(struct iris_core *core); +int iris_vpu_power_off_controller(struct iris_core *core); void iris_vpu_power_off_hw(struct iris_core *core); void iris_vpu_power_off(struct iris_core *core); =20 --=20 2.34.1