From nobody Tue Dec 16 21:17:46 2025 Received: from smtp-8fa9.mail.infomaniak.ch (smtp-8fa9.mail.infomaniak.ch [83.166.143.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D61DA254AE5 for ; Mon, 24 Feb 2025 10:03:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=83.166.143.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740391422; cv=none; b=SPD66Zt/sR2MThXZ9TRC3YCD2EIxO3FCmrcLL6992j/tUq4/5X0rlSokME9fncS/YdPHD3L2AzmBHFHMp6jskfzfBH7z3NaaPva412y7Tg3OtBUsORkq7ajouUfpsmsZc/mWm1jsoY0HAJsfM38J4MMZvXlpDq7Pj/VeqSBLTds= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740391422; c=relaxed/simple; bh=8hA1pc5M55QlmWKkVrcEHKEe8AcgBBvC20RbeGf0ld8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=iOAPQiZulUGhaAoi1C51qHBRmbumP0QYab8QdeDKmVm2NaF7tBABmalzMvuxF66xrkz+ImhTV2ixr9ojj4mANwBSN+1CddSCSYq8Vl/eWWxMdw5tqJbBIk5rba8sxENHl+ZjJybWhpbmHvj4DjuFt5h1vmDl2acyGRJZUEjiP9I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net; spf=pass smtp.mailfrom=0leil.net; arc=none smtp.client-ip=83.166.143.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0leil.net Received: from smtp-4-0000.mail.infomaniak.ch (unknown [IPv6:2001:1600:7:10:40ca:feff:fe05:0]) by smtp-4-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4Z1bsc1ktqzKy4; Mon, 24 Feb 2025 11:03:32 +0100 (CET) Received: from unknown by smtp-4-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4Z1bsb3hkPzQ2b; Mon, 24 Feb 2025 11:03:31 +0100 (CET) From: Quentin Schulz Date: Mon, 24 Feb 2025 11:03:21 +0100 Subject: [PATCH v3 1/2] dt-bindings: gpio: nxp,pcf8575: add reset GPIO Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250224-pca976x-reset-driver-v3-1-58370ef405be@cherry.de> References: <20250224-pca976x-reset-driver-v3-0-58370ef405be@cherry.de> In-Reply-To: <20250224-pca976x-reset-driver-v3-0-58370ef405be@cherry.de> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Laurent Pinchart Cc: Heiko Stuebner , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Quentin Schulz , Conor Dooley , Laurent Pinchart X-Mailer: b4 0.14.2 X-Infomaniak-Routing: alpha From: Quentin Schulz A few of the I2C GPIO expander chips supported by this binding have a RESETN pin to be able to reset the chip. The chip is held in reset while the pin is low, therefore the polarity of reset-gpios is expected to reflect that, i.e. a GPIO_ACTIVE_HIGH means the GPIO will be driven high for reset and then driven low, GPIO_ACTIVE_LOW means the GPIO will be driven low for reset and then driven high. If a GPIO is directly routed to RESETN pin on the IC without any inverter, GPIO_ACTIVE_LOW is thus expected. Out of the supported chips, only PCA9670, PCA9671, PCA9672 and PCA9673 show a RESETN pin in their datasheets. They all share the same reset timings, that is 4+us reset pulse[0] and 100+us reset time[0]. When performing a reset, "The PCA9670 registers and I2C-bus state machine will be held in their default state until the RESET input is once again HIGH."[1] meaning we now know the state of each line controlled by the GPIO expander. Therefore, setting lines-initial-states and reset-gpios both does not make sense and their presence is XOR'ed. [0] https://www.nxp.com/docs/en/data-sheet/PCA9670.pdf Fig 22. [1] https://www.nxp.com/docs/en/data-sheet/PCA9670.pdf 8.5 Tested-by: Heiko Stuebner # exclusion logic Acked-by: Conor Dooley Reviewed-by: Laurent Pinchart Signed-off-by: Quentin Schulz --- .../devicetree/bindings/gpio/nxp,pcf8575.yaml | 37 ++++++++++++++++++= ++++ 1 file changed, 37 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml b/Docu= mentation/devicetree/bindings/gpio/nxp,pcf8575.yaml index 3718103e966a13e1d77f73335ff73c18a3199469..8bca574bb66d491d984cb1b1665= 743048bcf4566 100644 --- a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml +++ b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml @@ -73,6 +73,43 @@ properties: =20 wakeup-source: true =20 + reset-gpios: + maxItems: 1 + description: + GPIO controlling the (reset active LOW) RESET# pin. + + The active polarity of the GPIO must translate to the low state of t= he + RESET# pin on the IC, i.e. if a GPIO is directly routed to the RESET= # pin + without any inverter, GPIO_ACTIVE_LOW is expected. + + Performing a reset makes all lines initialized to their input (pulle= d-up) + state. + +allOf: + - if: + properties: + compatible: + not: + contains: + enum: + - nxp,pca9670 + - nxp,pca9671 + - nxp,pca9672 + - nxp,pca9673 + then: + properties: + reset-gpios: false + + # lines-initial-states XOR reset-gpios + # Performing a reset reinitializes all lines to a known state which + # may not match passed lines-initial-states + - if: + required: + - lines-initial-states + then: + properties: + reset-gpios: false + patternProperties: "^(.+-hog(-[0-9]+)?)$": type: object --=20 2.48.1