From nobody Fri Dec 19 01:43:28 2025 Received: from smtp-190e.mail.infomaniak.ch (smtp-190e.mail.infomaniak.ch [185.125.25.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF4791F473A for ; Thu, 20 Feb 2025 12:20:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.125.25.14 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740054047; cv=none; b=GUnmUZJXqPIPeg2r285uq/cdRTTtdAuzY2rCcHaOnG2LheFVwn2BKybQnRqy+n/PHRomVKDh0AGHeHKiGEjMPOG+qM0lJDTTVZQy7JMig2AIS6IDOG/hVOLY7tvyUqohblqOXv4CjP4XJt/qgA0xdhKuWiUhrlCDNxKklMdLSGY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740054047; c=relaxed/simple; bh=+JLjXWKiRg+EQ4ENsImXRR1E80JN9eVBk/Ontn9bJF4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PPNOTcPI2yRUfIveMEGLqrqrbeJTpt3mH7hX0hixw5oNYls8rdv6NZnzVbFgZINHGafqYOYI9tLUmDyiBfioBvdQP2eekQ1WhW66Wnj5Y2KhZT1evJaNib/n+onkHRsROu9OoQkq3x4YgkIuwYsy+GOM2wKI1G/8SkiK+yYJg4g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net; spf=pass smtp.mailfrom=0leil.net; arc=none smtp.client-ip=185.125.25.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0leil.net Received: from smtp-3-0000.mail.infomaniak.ch (smtp-3-0000.mail.infomaniak.ch [10.4.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4YzC5d4p2nzrHb; Thu, 20 Feb 2025 13:20:37 +0100 (CET) Received: from unknown by smtp-3-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4YzC5d05GWzGQY; Thu, 20 Feb 2025 13:20:36 +0100 (CET) From: Quentin Schulz Date: Thu, 20 Feb 2025 13:20:13 +0100 Subject: [PATCH 4/5] arm64: dts: rockchip: add overlay for PX30 Ringneck Haikou Video Demo adapter Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250220-ringneck-dtbos-v1-4-25c97f2385e6@cherry.de> References: <20250220-ringneck-dtbos-v1-0-25c97f2385e6@cherry.de> In-Reply-To: <20250220-ringneck-dtbos-v1-0-25c97f2385e6@cherry.de> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Quentin Schulz , Farouk Bouabid Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Quentin Schulz X-Mailer: b4 0.14.2 X-Infomaniak-Routing: alpha From: Quentin Schulz This adds support for the video-demo-adapter DEVKIT ADDON CAM-TS-A01 (https://embedded.cherry.de/product/development-kit/) for the Haikou devkit with PX30 Ringneck SoM. The Video Demo adapter is an adapter connected to the fake PCIe slot labeled "Video Connector" on the Haikou devkit. Itss main feature is a Leadtek DSI-display with touchscreen and a camera (that is not supported yet because the expected clock rate by the driver cannot be exactly reached by the clock driver). To drive these components a number of additional regulators are grouped on the adapter as well as a PCA9670 gpio-expander to provide the needed additional gpio-lines. Signed-off-by: Quentin Schulz --- arch/arm64/boot/dts/rockchip/Makefile | 5 + .../rockchip/px30-ringneck-haikou-video-demo.dtso | 190 +++++++++++++++++= ++++ 2 files changed, 195 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index b40b82bd07223f542c17704e7844f002bb31e1c5..0f7c5c55c8b8be11e3fd7a69995= ce1c17b22c80d 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D px30-engicam-px30-core-edi= mm2.2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D px30-firefly-jd4-core-mb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D px30-ringneck-haikou.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D px30-ringneck-haikou-lvds-9904379.dtbo +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D px30-ringneck-haikou-video-demo.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3308-bpi-p2-pro.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3308-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3308-roc-cc.dtb @@ -196,6 +197,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D px30-ringneck-haikou-= haikou-lvds-9904379.dtb px30-ringneck-haikou-haikou-lvds-9904379-dtbs :=3D px30-ringneck-haikou.dt= b \ px30-ringneck-haikou-lvds-9904379.dtbo =20 +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D px30-ringneck-haikou-haikou-video-demo.dtb +px30-ringneck-haikou-haikou-video-demo-dtbs :=3D px30-ringneck-haikou.dtb \ + px30-ringneck-haikou-video-demo.dtbo + dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-wolfvision-pf5-vz-2-uhd.dtb rk3568-wolfvision-pf5-vz-2-uhd-dtbs :=3D rk3568-wolfvision-pf5.dtb \ rk3568-wolfvision-pf5-display-vz.dtbo \ diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-video-demo.d= tso b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-video-demo.dtso new file mode 100644 index 0000000000000000000000000000000000000000..7d9ea5aa598486680191d52e4c8= 7af59f7b0e579 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-video-demo.dtso @@ -0,0 +1,190 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2025 Cherry Embedded Solutions GmbH + * + * DEVKIT ADDON CAM-TS-A01 + * https://embedded.cherry.de/product/development-kit/ + * + * DT-overlay for the camera / DSI demo appliance for Haikou boards. + * In the flavour for use with a Ringneck system-on-module. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include + +&{/} { + backlight: backlight { + compatible =3D "pwm-backlight"; + power-supply =3D <&dc_12v>; + pwms =3D <&pwm0 0 25000 0>; + }; + + cam_afvdd_2v8: regulator-cam-afvdd-2v8 { + compatible =3D "regulator-fixed"; + gpio =3D <&pca9670 2 GPIO_ACTIVE_LOW>; + regulator-max-microvolt =3D <2800000>; + regulator-min-microvolt =3D <2800000>; + regulator-name =3D "cam-afvdd-2v8"; + vin-supply =3D <&vcc2v8_video>; + }; + + cam_avdd_2v8: regulator-cam-avdd-2v8 { + compatible =3D "regulator-fixed"; + gpio =3D <&pca9670 4 GPIO_ACTIVE_LOW>; + regulator-max-microvolt =3D <2800000>; + regulator-min-microvolt =3D <2800000>; + regulator-name =3D "cam-avdd-2v8"; + vin-supply =3D <&vcc2v8_video>; + }; + + cam_dovdd_1v8: regulator-cam-dovdd-1v8 { + compatible =3D "regulator-fixed"; + gpio =3D <&pca9670 3 GPIO_ACTIVE_LOW>; + regulator-max-microvolt =3D <1800000>; + regulator-min-microvolt =3D <1800000>; + regulator-name =3D "cam-dovdd-1v8"; + vin-supply =3D <&vcc1v8_video>; + }; + + cam_dvdd_1v2: regulator-cam-dvdd-1v2 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&pca9670 5 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt =3D <1200000>; + regulator-min-microvolt =3D <1200000>; + regulator-name =3D "cam-dvdd-1v2"; + vin-supply =3D <&vcc3v3_baseboard>; + }; + + vcc1v8_video: regulator-vcc1v8-video { + compatible =3D "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1800000>; + regulator-min-microvolt =3D <1800000>; + regulator-name =3D "vcc1v8-video"; + vin-supply =3D <&vcc3v3_baseboard>; + }; + + vcc2v8_video: regulator-vcc2v8-video { + compatible =3D "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <2800000>; + regulator-min-microvolt =3D <2800000>; + regulator-name =3D "vcc2v8-video"; + vin-supply =3D <&vcc3v3_baseboard>; + }; + + video-adapter-leds { + compatible =3D "gpio-leds"; + + video-adapter-led { + color =3D ; + gpios =3D <&pca9670 7 GPIO_ACTIVE_HIGH>; + label =3D "video-adapter-led"; + linux,default-trigger =3D "none"; + }; + }; +}; + +&display_subsystem { + status =3D "okay"; +}; + +&dsi { + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + panel@0 { + compatible =3D "leadtek,ltk050h3148w"; + reg =3D <0>; + backlight =3D <&backlight>; + iovcc-supply =3D <&vcc1v8_video>; + reset-gpios =3D <&pca9670 0 GPIO_ACTIVE_LOW>; + vci-supply =3D <&vcc2v8_video>; + + port { + mipi_in_panel: endpoint { + remote-endpoint =3D <&mipi_out_panel>; + }; + }; + }; +}; + +&dsi_dphy { + status =3D "okay"; +}; + +&dsi_out { + mipi_out_panel: endpoint { + remote-endpoint =3D <&mipi_in_panel>; + }; +}; + +&i2c1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + /* OV5675, GT911, DW9714 are limited to 400KHz */ + clock-frequency =3D <400000>; + + touchscreen@14 { + compatible =3D "goodix,gt911"; + reg =3D <0x14>; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + irq-gpios =3D <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; + pinctrl-0 =3D <&touch_int>; + pinctrl-names =3D "default"; + reset-gpios =3D <&pca9670 1 GPIO_ACTIVE_HIGH>; + AVDD28-supply =3D <&vcc2v8_video>; + VDDIO-supply =3D <&vcc3v3_baseboard>; + }; + + pca9670: gpio@27 { + compatible =3D "nxp,pca9670"; + reg =3D <0x27>; + gpio-controller; + #gpio-cells =3D <2>; + pinctrl-0 =3D <&pca9670_resetn>; + pinctrl-names =3D "default"; + reset-gpios =3D <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; + }; +}; + +&pinctrl { + pca9670 { + pca9670_resetn: pca9670-resetn { + rockchip,pins =3D <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + touch { + touch_int: touch-int { + rockchip,pins =3D <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&vopb { + status =3D "okay"; +}; + +&vopb_mmu { + status =3D "okay"; +}; + +&vopl { + status =3D "okay"; +}; + +&vopl_mmu { + status =3D "okay"; +}; --=20 2.48.1