From nobody Tue Dec 16 14:20:42 2025 Received: from mail-ed1-f53.google.com (mail-ed1-f53.google.com [209.85.208.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DCE6F26AA9E for ; Tue, 18 Feb 2025 19:30:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739907060; cv=none; b=hU2w1kN7Y/4981pMJ4gz321jYbRuF9RH8vFX9YuRXW5bUpmLIy3kRp2Pkc0bQD9efh/1QvfxH+BSgPWuGg9S1gaf/ncsFlF6yRQQEblvT0Homo2vco0Ye9pTdq5KsSZRix+u4XH+l9mQWh5pPOTLmdLAwmH/c0NdixTcF8EbLVI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739907060; c=relaxed/simple; bh=QQ/ztLzccoD2euaC9XiJx7WBiQoWT8xupZIvkEt0604=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=smm7uBPLomvKK2CxwlhWLuBhVVWhMqrGk/MJ131SJgbI0hDLr9K/z1oYuJNI+KPAy4DfEFS/vSRdwHtkQ2AccLs+/2BDN5VsdMgIF3sgPwigL9PRNo/eVP59375faZqcVl5i3Uzpi1I6hwm5cECl9OH4nMioRMy3e1AnUjaxSvs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=x66dltxJ; arc=none smtp.client-ip=209.85.208.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="x66dltxJ" Received: by mail-ed1-f53.google.com with SMTP id 4fb4d7f45d1cf-5e0373c7f55so6257427a12.0 for ; Tue, 18 Feb 2025 11:30:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1739907056; x=1740511856; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=E174y95QWB8sLP4kKdqQSVofl2EIrt9GShIhCjB+Tv8=; b=x66dltxJ2imkOsOyvb+S38tfRpiPaYohRf8fURu/0BOGy/wft679UJGRx21KU+sRpn woTViUMDAxeblIqMbSYTL3qniw6et3JR5JlymWFXcCHCST30UDmzRLM39k5IYKKmtMzk 5DPG7sLZmJ9O1j8riZAx3vlDW/LlN7zuMOB4U6PjNsVdMZsWh/HdYw/67ioolSzB7Ma4 EYUTuFQ0u7sFJZuKDUqZ8bwa95Hy2fiBnaplBo4kDkzQOoJ6oRrXx8nI0ozhkFZj/9o/ Xl2A0w/mYEQ1E4uWSnAcnd2FchP5FEeFE1bfYOZnrKfY7JG8OkphiZh6YfY9IRwpNonG 3zBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1739907056; x=1740511856; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=E174y95QWB8sLP4kKdqQSVofl2EIrt9GShIhCjB+Tv8=; b=xAQ37tJk/NDA6dlDERTUOKM/X2vr8rxmPfXjsHAzhPVCsdzHKsPkHqLw9L+CLws7hI aREGlmnNcfkIMnpsHDBLJF0kmUHgxp9b6JL4k2uiDP7UTEkniRWbVBGn6XwWS5DA3S/+ QCbhdKm6Wg4majeIsF45k97BLFI4nxsJ5GCWoXIyUXxePo76groUDKmAj+ywYKWjBez4 idfAkcBwTb3TCLVdUWY/2b9/isetRsFGE6CQQpx6lUpviMeJI9v++IU3VMtjIp/CT9LL yuOGIrcdt1pbhrNENVa9/H+QR4YWvmwRbT0yAqjxz/vzFekpOXrnHyXjzZ6k8WTysc1f qg3w== X-Gm-Message-State: AOJu0YxvcASuNUeuevJUqBzmypmVsTmUBkqoK5ewVwxtD4zETy6FPZxA EdUNOwQnMs6vV/7IWNh18gP75QB089M/yjoj5OZcLczLhtNtiVoM/lgI3v3rqW8= X-Gm-Gg: ASbGnctz6qkillRMaAsO34nm8TTvMcHnpMrj+WbSMS9Y/XvjJ4XWhpjoEQm3HMLyJJm WORA6kHHoqjfK+U4mwt5b6hMgrLYIlr4bWS2pG01cVXOip4At07PsBiL3MxTEUh300HIFNtsTq4 UO+ZpnupfDxaHPpegypWN+0rmznJ30JOSQnMsxYrR24zEQT7S5sRH8bENZTLn9bArHG2JtqDSg2 SNQU22RyUzoOEI2zZjkhU5sd10kV+jIMMVa4uo4psw3fh78+hRjuVTeEHunR9IWWwZQPvCdThjq DpYVNyEIztGn9WVtozgwHNaHEABQ X-Google-Smtp-Source: AGHT+IH6dYXNSP6vLBRqe/ecMthhMu5dDSxKiguicPwszoCj13HXx3I+/2icxv2B1ExrsNYAjEdIdw== X-Received: by 2002:a05:6402:2354:b0:5e0:4c04:4186 with SMTP id 4fb4d7f45d1cf-5e089d2fb1dmr614186a12.24.1739907056050; Tue, 18 Feb 2025 11:30:56 -0800 (PST) Received: from toaster.baylibre.com ([2a01:e0a:3c5:5fb1:cbaf:af0:839d:fb4a]) by smtp.googlemail.com with ESMTPSA id 4fb4d7f45d1cf-5dece1c3ce5sm9338985a12.17.2025.02.18.11.30.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Feb 2025 11:30:54 -0800 (PST) From: Jerome Brunet Date: Tue, 18 Feb 2025 20:29:53 +0100 Subject: [PATCH v4 8/8] clk: amlogic: axg-audio: use the auxiliary reset driver - take 2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250218-aux-device-create-helper-v4-8-c3d7dfdea2e6@baylibre.com> References: <20250218-aux-device-create-helper-v4-0-c3d7dfdea2e6@baylibre.com> In-Reply-To: <20250218-aux-device-create-helper-v4-0-c3d7dfdea2e6@baylibre.com> To: Greg Kroah-Hartman , Dave Ertman , Ira Weiny , "Rafael J. Wysocki" , Stephen Boyd , Arnd Bergmann , Danilo Krummrich , Conor Dooley , Daire McNamara , Philipp Zabel , Douglas Anderson , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Bryan O'Donoghue , Vladimir Kondratiev , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Michael Turquette , Abel Vesa , Peng Fan , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Kevin Hilman , Martin Blumenstingl Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, platform-driver-x86@vger.kernel.org, linux-mips@vger.kernel.org, linux-clk@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Jerome Brunet X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=5906; i=jbrunet@baylibre.com; h=from:subject:message-id; bh=QQ/ztLzccoD2euaC9XiJx7WBiQoWT8xupZIvkEt0604=; b=owEBbQKS/ZANAwAKAeb8Dxw38tqFAcsmYgBntN/VtNnyVBp1TZn2uakB3wDmrM70EYdAQGZ+h wV2jlYYVniJAjMEAAEKAB0WIQT04VmuGPP1bV8btxvm/A8cN/LahQUCZ7Tf1QAKCRDm/A8cN/La hQBjD/0RTaMxkXwenpFzTWRtbkfYP170epu7rqTng51UkW5dx0c746c0Qrzw65ygwvKsO9bol97 b/pX1khkHz4ELctHC0/gUmfugRQcCjQABsrNxkCDZbVBWRI7TKwaVoFcjcogbLRmvhkjiXSfa1S 76FtH1DuaN7gQrQdnBBv1x7FKtahKBLyNkCamDmUN9/H+D4B5VUNpcymmgVRLIBszSinmGqPTL3 MFDp0iDIpcxyoimExExtn7UXtiiqjTpiVC3WAuZQXY27zbMEjJJxtF7SWARmqxnkHPm4H6w4tje yctm1scmNxdLcnIBZBttjcu1TSntqESMEE4DFI03peNUvXuIL/XIFKO9EyRcTaq7T5JooFZ+uYF LjdTh5p1c+BdBEMRNBzCgChSerJ/F58X3dhAkb7BXDZfPr8Y2bCPMd1mwrJAwZRHh5EgJA5zdFo rSJu5S0ppYvzv4qYrPuiIwYXLpBN9djNeVshuwVJwGsoAJqs06vCyDgSjU/Wht/lVTA6m64V/xZ oA6dK3fHpBl5KIXSw65n854LYYRdWFln2yKyuGoYuso0i2Ib91Z91bnr/bzsBtM6h7s6w+3u2D3 qcBQmOQ4aRSkyjclGXHc52MWgItdbJJ6s4Skitguub8FI3JxLo5cemUnME0vG2oMshqf0hDvQex S37+rb/FVdA14/A== X-Developer-Key: i=jbrunet@baylibre.com; a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 Remove the implementation of the reset driver in axg audio clock driver and migrate to the one provided by reset framework on the auxiliary bus. Signed-off-by: Jerome Brunet --- drivers/clk/meson/Kconfig | 2 +- drivers/clk/meson/axg-audio.c | 114 +++++---------------------------------= ---- 2 files changed, 14 insertions(+), 102 deletions(-) diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index be2e3a5f83363b07cdcec2601acf15780ff24892..7cb21fc223b063cb93812643f02= f192343981ed8 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -106,7 +106,7 @@ config COMMON_CLK_AXG_AUDIO select COMMON_CLK_MESON_SCLK_DIV select COMMON_CLK_MESON_CLKC_UTILS select REGMAP_MMIO - select RESET_CONTROLLER + imply RESET_MESON_AUX help Support for the audio clock controller on AmLogic A113D devices, aka axg, Say Y if you want audio subsystem to work. diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c index 9df627b142f89788966ede0262aaaf39e13f0b49..3948f5d0faca372dd5cc4ed6dc9= 5f9c89fe5bae8 100644 --- a/drivers/clk/meson/axg-audio.c +++ b/drivers/clk/meson/axg-audio.c @@ -4,6 +4,7 @@ * Author: Jerome Brunet */ =20 +#include #include #include #include @@ -12,7 +13,6 @@ #include #include #include -#include #include =20 #include "meson-clkc-utils.h" @@ -1678,84 +1678,6 @@ static struct clk_regmap *const sm1_clk_regmaps[] = =3D { &sm1_earcrx_dmac_clk, }; =20 -struct axg_audio_reset_data { - struct reset_controller_dev rstc; - struct regmap *map; - unsigned int offset; -}; - -static void axg_audio_reset_reg_and_bit(struct axg_audio_reset_data *rst, - unsigned long id, - unsigned int *reg, - unsigned int *bit) -{ - unsigned int stride =3D regmap_get_reg_stride(rst->map); - - *reg =3D (id / (stride * BITS_PER_BYTE)) * stride; - *reg +=3D rst->offset; - *bit =3D id % (stride * BITS_PER_BYTE); -} - -static int axg_audio_reset_update(struct reset_controller_dev *rcdev, - unsigned long id, bool assert) -{ - struct axg_audio_reset_data *rst =3D - container_of(rcdev, struct axg_audio_reset_data, rstc); - unsigned int offset, bit; - - axg_audio_reset_reg_and_bit(rst, id, &offset, &bit); - - regmap_update_bits(rst->map, offset, BIT(bit), - assert ? BIT(bit) : 0); - - return 0; -} - -static int axg_audio_reset_status(struct reset_controller_dev *rcdev, - unsigned long id) -{ - struct axg_audio_reset_data *rst =3D - container_of(rcdev, struct axg_audio_reset_data, rstc); - unsigned int val, offset, bit; - - axg_audio_reset_reg_and_bit(rst, id, &offset, &bit); - - regmap_read(rst->map, offset, &val); - - return !!(val & BIT(bit)); -} - -static int axg_audio_reset_assert(struct reset_controller_dev *rcdev, - unsigned long id) -{ - return axg_audio_reset_update(rcdev, id, true); -} - -static int axg_audio_reset_deassert(struct reset_controller_dev *rcdev, - unsigned long id) -{ - return axg_audio_reset_update(rcdev, id, false); -} - -static int axg_audio_reset_toggle(struct reset_controller_dev *rcdev, - unsigned long id) -{ - int ret; - - ret =3D axg_audio_reset_assert(rcdev, id); - if (ret) - return ret; - - return axg_audio_reset_deassert(rcdev, id); -} - -static const struct reset_control_ops axg_audio_rstc_ops =3D { - .assert =3D axg_audio_reset_assert, - .deassert =3D axg_audio_reset_deassert, - .reset =3D axg_audio_reset_toggle, - .status =3D axg_audio_reset_status, -}; - static struct regmap_config axg_audio_regmap_cfg =3D { .reg_bits =3D 32, .val_bits =3D 32, @@ -1766,8 +1688,7 @@ struct audioclk_data { struct clk_regmap *const *regmap_clks; unsigned int regmap_clk_num; struct meson_clk_hw_data hw_clks; - unsigned int reset_offset; - unsigned int reset_num; + const char *rst_drvname; unsigned int max_register; }; =20 @@ -1775,7 +1696,7 @@ static int axg_audio_clkc_probe(struct platform_devic= e *pdev) { struct device *dev =3D &pdev->dev; const struct audioclk_data *data; - struct axg_audio_reset_data *rst; + struct auxiliary_device *auxdev; struct regmap *map; void __iomem *regs; struct clk_hw *hw; @@ -1834,22 +1755,15 @@ static int axg_audio_clkc_probe(struct platform_dev= ice *pdev) if (ret) return ret; =20 - /* Stop here if there is no reset */ - if (!data->reset_num) - return 0; - - rst =3D devm_kzalloc(dev, sizeof(*rst), GFP_KERNEL); - if (!rst) - return -ENOMEM; - - rst->map =3D map; - rst->offset =3D data->reset_offset; - rst->rstc.nr_resets =3D data->reset_num; - rst->rstc.ops =3D &axg_audio_rstc_ops; - rst->rstc.of_node =3D dev->of_node; - rst->rstc.owner =3D THIS_MODULE; + /* Register auxiliary reset driver when applicable */ + if (data->rst_drvname) { + auxdev =3D __devm_auxiliary_device_create(dev, dev->driver->name, + data->rst_drvname, NULL, 0); + if (!auxdev) + return -ENODEV; + } =20 - return devm_reset_controller_register(dev, &rst->rstc); + return 0; } =20 static const struct audioclk_data axg_audioclk_data =3D { @@ -1869,8 +1783,7 @@ static const struct audioclk_data g12a_audioclk_data = =3D { .hws =3D g12a_audio_hw_clks, .num =3D ARRAY_SIZE(g12a_audio_hw_clks), }, - .reset_offset =3D AUDIO_SW_RESET, - .reset_num =3D 26, + .rst_drvname =3D "rst-g12a", .max_register =3D AUDIO_CLK_SPDIFOUT_B_CTRL, }; =20 @@ -1881,8 +1794,7 @@ static const struct audioclk_data sm1_audioclk_data = =3D { .hws =3D sm1_audio_hw_clks, .num =3D ARRAY_SIZE(sm1_audio_hw_clks), }, - .reset_offset =3D AUDIO_SM1_SW_RESET0, - .reset_num =3D 39, + .rst_drvname =3D "rst-sm1", .max_register =3D AUDIO_EARCRX_DMAC_CLK_CTRL, }; =20 --=20 2.47.2