From nobody Thu Dec 18 10:02:08 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 74A57225A31; Mon, 17 Feb 2025 15:49:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739807369; cv=none; b=Y0lB8VQZIXHh7hiFTQdldKsZsaxwv75Axth9NhOYC6gaZ1WbFGx4evp3ZnIKSkuON8ye8gCrVHXy1EOgu0+uUpUwB9gkCCsy4EpJOktBqfSY8uCqTTKSeEtzGLZfWS7QwsElITbZ30O6cMe15NNiXrPFHIA7Iuug5ucNi3ueD/w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739807369; c=relaxed/simple; bh=haG+Ll//wFuiDnGFDVamvyLqzdnTfQQPJ7Cb+bswt7U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sU+YykmJDflOW5x3gl9FHScJjfX6PxMay3XzK4iSsOaGl4qTCei/of+tgFV0B+ggTRe9TIGg3LvUGLahkSJQ9LtE4oYdI5dnlb9vl5cwz+wnTKHHCw60Eag9g+H6t9LFUN/JeT/UfIlAFJP9XCt0dV7vORdBCHGulVpklM5DQco= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=M3YrcvRi; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="M3YrcvRi" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1739807365; bh=haG+Ll//wFuiDnGFDVamvyLqzdnTfQQPJ7Cb+bswt7U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=M3YrcvRi1Vn7U2IVS0Hk01EdlcpEsdl4zyalPs9wIRbiOOZkyneM+s2kjliDrsI90 B419JoyW6No/UNRIO5VU/ClUGYKPBoIEInXG1z/ZJoOfzneWCt3hP6PBhrl5vVadJY caQxNhPbYCLrvrjV4UgsaKyqE1Uwus3dNI/sVto2eGZmCI/0rW9Pd80N9w9WWVAhdv Zab7xl0LnSRTdxul4iU0H+HVBWJDC4NGFuljF7MZPZ7eHKYqRGzqx60K/hxzv+sBgf c5uLncQlC2QEmt1+ckkTroh9+aO2TLHdJFDwGu814Lj6ea/lQn+x6N/7DQfQW/nruN i0hGsy3mbnSMg== Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by bali.collaboradmins.com (Postfix) with ESMTPSA id 5D3EB17E1564; Mon, 17 Feb 2025 16:49:24 +0100 (CET) From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, ck.hu@mediatek.com, jitao.shi@mediatek.com, jie.qiu@mediatek.com, junzhi.zhao@mediatek.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, dmitry.baryshkov@linaro.org, lewis.liao@mediatek.com, ives.chenjh@mediatek.com, tommyyl.chen@mediatek.com, jason-jh.lin@mediatek.com Subject: [PATCH v7 06/43] drm/mediatek: mtk_dpi: Move the input_2p_en bit to platform data Date: Mon, 17 Feb 2025 16:47:59 +0100 Message-ID: <20250217154836.108895-7-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250217154836.108895-1-angelogioacchino.delregno@collabora.com> References: <20250217154836.108895-1-angelogioacchino.delregno@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In preparation for adding support for MT8195's HDMI reserved DPI instance, move the input_2p_en bit for DP_INTF to platform data. While at it, remove the input_2pixel member from platform data as having this bit implies that the 2pixel feature must be enabled. Reviewed-by: CK Hu Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_dpi.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/= mtk_dpi.c index bb1a17f1384b..9a6c0f75f764 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -135,14 +135,14 @@ struct mtk_dpi_factor { * @is_ck_de_pol: Support CK/DE polarity. * @swap_input_support: Support input swap function. * @support_direct_pin: IP supports direct connection to dpi panels. - * @input_2pixel: Input pixel of dp_intf is 2 pixel per round, so enable t= his - * config to enable this feature. * @dimension_mask: Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PO= RCH * (no shift). * @hvsize_mask: Mask of HSIZE and VSIZE mask (no shift). * @channel_swap_shift: Shift value of channel swap. * @yuv422_en_bit: Enable bit of yuv422. * @csc_enable_bit: Enable bit of CSC. + * @input_2p_en_bit: Enable bit for input two pixel per round feature. + If present, implies that the feature must be enabled. * @pixels_per_iter: Quantity of transferred pixels per iteration. * @edge_cfg_in_mmsys: If the edge configuration for DPI's output needs to= be set in MMSYS. */ @@ -157,12 +157,12 @@ struct mtk_dpi_conf { bool is_ck_de_pol; bool swap_input_support; bool support_direct_pin; - bool input_2pixel; u32 dimension_mask; u32 hvsize_mask; u32 channel_swap_shift; u32 yuv422_en_bit; u32 csc_enable_bit; + u32 input_2p_en_bit; u32 pixels_per_iter; bool edge_cfg_in_mmsys; }; @@ -651,9 +651,9 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, mtk_dpi_dual_edge(dpi); mtk_dpi_config_disable_edge(dpi); } - if (dpi->conf->input_2pixel) { - mtk_dpi_mask(dpi, DPI_CON, DPINTF_INPUT_2P_EN, - DPINTF_INPUT_2P_EN); + if (dpi->conf->input_2p_en_bit) { + mtk_dpi_mask(dpi, DPI_CON, dpi->conf->input_2p_en_bit, + dpi->conf->input_2p_en_bit); } mtk_dpi_sw_reset(dpi, false); =20 @@ -1121,12 +1121,12 @@ static const struct mtk_dpi_conf mt8195_dpintf_conf= =3D { .output_fmts =3D mt8195_output_fmts, .num_output_fmts =3D ARRAY_SIZE(mt8195_output_fmts), .pixels_per_iter =3D 4, - .input_2pixel =3D true, .dimension_mask =3D DPINTF_HPW_MASK, .hvsize_mask =3D DPINTF_HSIZE_MASK, .channel_swap_shift =3D DPINTF_CH_SWAP, .yuv422_en_bit =3D DPINTF_YUV422_EN, .csc_enable_bit =3D DPINTF_CSC_ENABLE, + .input_2p_en_bit =3D DPINTF_INPUT_2P_EN, }; =20 static int mtk_dpi_probe(struct platform_device *pdev) --=20 2.48.1