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[109.210.4.206]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38f259f7b68sm4424654f8f.85.2025.02.14.04.23.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Feb 2025 04:23:16 -0800 (PST) From: Esteban Blanc Date: Fri, 14 Feb 2025 13:22:33 +0100 Subject: [PATCH v4 3/6] iio: adc: ad4030: add averaging support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250214-eblanc-ad4630_v1-v4-3-135dd66cab6a@baylibre.com> References: <20250214-eblanc-ad4630_v1-v4-0-135dd66cab6a@baylibre.com> In-Reply-To: <20250214-eblanc-ad4630_v1-v4-0-135dd66cab6a@baylibre.com> To: Lars-Peter Clausen , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Corbet Cc: Michael Hennerich , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Esteban Blanc X-Mailer: b4 0.14.2 This add support for the averaging mode of AD4030 using oversampling IIO attribute Signed-off-by: Esteban Blanc --- drivers/iio/adc/ad4030.c | 136 +++++++++++++++++++++++++++++++++++++++++--= ---- 1 file changed, 119 insertions(+), 17 deletions(-) diff --git a/drivers/iio/adc/ad4030.c b/drivers/iio/adc/ad4030.c index 8188d44bdd664aa74a7adcaa1f836e79a54a6050..ed31a3d1d13b831f46818cb7235= 3e11b1689407d 100644 --- a/drivers/iio/adc/ad4030.c +++ b/drivers/iio/adc/ad4030.c @@ -112,6 +112,11 @@ enum ad4030_out_mode { AD4030_OUT_DATA_MD_32_PATTERN, }; =20 +enum { + AD4030_SCAN_TYPE_NORMAL, + AD4030_SCAN_TYPE_AVG, +}; + struct ad4030_chip_info { const char *name; const unsigned long *available_masks; @@ -127,10 +132,12 @@ struct ad4030_state { struct spi_device *spi; struct regmap *regmap; const struct ad4030_chip_info *chip; + const struct iio_scan_type *current_scan_type; struct gpio_desc *cnv_gpio; int vref_uv; int vio_uv; int offset_avail[3]; + unsigned int avg_log2; enum ad4030_out_mode mode; =20 /* @@ -184,7 +191,11 @@ struct ad4030_state { * - voltage0-voltage1 * - voltage2-voltage3 */ -#define AD4030_CHAN_DIFF(_idx, _storage, _real, _shift) { \ +#define AD4030_CHAN_DIFF(_idx, _scan_type) { \ + .info_mask_shared_by_all =3D \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + .info_mask_shared_by_all_available =3D \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ .info_mask_separate =3D BIT(IIO_CHAN_INFO_SCALE) | \ BIT(IIO_CHAN_INFO_CALIBSCALE) | \ BIT(IIO_CHAN_INFO_CALIBBIAS) | \ @@ -198,15 +209,17 @@ struct ad4030_state { .channel2 =3D (_idx) * 2 + 1, \ .scan_index =3D (_idx), \ .differential =3D true, \ - .scan_type =3D { \ - .sign =3D 's', \ - .storagebits =3D _storage, \ - .realbits =3D _real, \ - .shift =3D _shift, \ - .endianness =3D IIO_BE, \ - }, \ + .has_ext_scan_type =3D 1, \ + .ext_scan_type =3D _scan_type, \ + .num_ext_scan_type =3D ARRAY_SIZE(_scan_type), \ } =20 +static const int ad4030_average_modes[] =3D { + 1, 2, 4, 8, 16, 32, 64, 128, + 256, 512, 1024, 2048, 4096, 8192, 16384, 32768, + 65536, +}; + static int ad4030_enter_config_mode(struct ad4030_state *st) { st->tx_data[0] =3D AD4030_REG_ACCESS; @@ -356,10 +369,13 @@ static int ad4030_get_chan_scale(struct iio_dev *indi= o_dev, int *val2) { struct ad4030_state *st =3D iio_priv(indio_dev); + struct iio_scan_type *scan_type; =20 if (chan->differential) { + scan_type =3D iio_get_current_scan_type(indio_dev, + st->chip->channels); *val =3D (st->vref_uv * 2) / MILLI; - *val2 =3D chan->scan_type.realbits; + *val2 =3D scan_type->realbits; return IIO_VAL_FRACTIONAL_LOG2; } =20 @@ -474,6 +490,27 @@ static int ad4030_set_chan_calibbias(struct iio_dev *i= ndio_dev, st->tx_data, AD4030_REG_OFFSET_BYTES_NB); } =20 +static int ad4030_set_avg_frame_len(struct iio_dev *dev, int avg_val) +{ + struct ad4030_state *st =3D iio_priv(dev); + unsigned int avg_log2 =3D ilog2(avg_val); + unsigned int last_avg_idx =3D ARRAY_SIZE(ad4030_average_modes) - 1; + int ret; + + if (avg_val < 0 || avg_val > ad4030_average_modes[last_avg_idx]) + return -EINVAL; + + ret =3D regmap_write(st->regmap, AD4030_REG_AVG, + AD4030_REG_AVG_MASK_AVG_SYNC | + FIELD_PREP(AD4030_REG_AVG_MASK_AVG_VAL, avg_log2)); + if (ret) + return ret; + + st->avg_log2 =3D avg_log2; + + return 0; +} + static bool ad4030_is_common_byte_asked(struct ad4030_state *st, unsigned int mask) { @@ -484,11 +521,18 @@ static int ad4030_set_mode(struct iio_dev *indio_dev,= unsigned long mask) { struct ad4030_state *st =3D iio_priv(indio_dev); =20 - if (ad4030_is_common_byte_asked(st, mask)) + if (st->avg_log2 > 0) + st->mode =3D AD4030_OUT_DATA_MD_30_AVERAGED_DIFF; + else if (ad4030_is_common_byte_asked(st, mask)) st->mode =3D AD4030_OUT_DATA_MD_24_DIFF_8_COM; else st->mode =3D AD4030_OUT_DATA_MD_DIFF; =20 + st->current_scan_type =3D iio_get_current_scan_type(indio_dev, + st->chip->channels); + if (IS_ERR(st->current_scan_type)) + return PTR_ERR(st->current_scan_type); + return regmap_update_bits(st->regmap, AD4030_REG_MODES, AD4030_REG_MODES_MASK_OUT_DATA_MODE, st->mode); @@ -497,9 +541,11 @@ static int ad4030_set_mode(struct iio_dev *indio_dev, = unsigned long mask) static int ad4030_conversion(struct iio_dev *indio_dev) { struct ad4030_state *st =3D iio_priv(indio_dev); - const struct iio_scan_type scan_type =3D indio_dev->channels->scan_type; - unsigned char diff_realbytes =3D BITS_TO_BYTES(scan_type.realbits); + unsigned char diff_realbytes =3D + BITS_TO_BYTES(st->current_scan_type->realbits); unsigned int bytes_to_read; + unsigned long cnv_nb =3D BIT(st->avg_log2); + unsigned int i; int ret; =20 /* Number of bytes for one differential channel */ @@ -510,10 +556,12 @@ static int ad4030_conversion(struct iio_dev *indio_de= v) /* Mulitiply by the number of hardware channels */ bytes_to_read *=3D st->chip->num_voltage_inputs; =20 - gpiod_set_value_cansleep(st->cnv_gpio, 1); - ndelay(AD4030_TCNVH_NS); - gpiod_set_value_cansleep(st->cnv_gpio, 0); - ndelay(st->chip->tcyc_ns); + for (i =3D 0; i < cnv_nb; i++) { + gpiod_set_value_cansleep(st->cnv_gpio, 1); + ndelay(AD4030_TCNVH_NS); + gpiod_set_value_cansleep(st->cnv_gpio, 0); + ndelay(st->chip->tcyc_ns); + } =20 ret =3D spi_read(st->spi, st->rx_data.raw, bytes_to_read); if (ret) @@ -593,6 +641,12 @@ static int ad4030_read_avail(struct iio_dev *indio_dev, *type =3D IIO_VAL_INT_PLUS_NANO; return IIO_AVAIL_RANGE; =20 + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + *vals =3D ad4030_average_modes; + *type =3D IIO_VAL_INT; + *length =3D ARRAY_SIZE(ad4030_average_modes); + return IIO_AVAIL_LIST; + default: return -EINVAL; } @@ -602,6 +656,8 @@ static int ad4030_read_raw_dispatch(struct iio_dev *ind= io_dev, struct iio_chan_spec const *chan, int *val, int *val2, long info) { + struct ad4030_state *st =3D iio_priv(indio_dev); + switch (info) { case IIO_CHAN_INFO_RAW: return ad4030_single_conversion(indio_dev, chan, val); @@ -612,6 +668,10 @@ static int ad4030_read_raw_dispatch(struct iio_dev *in= dio_dev, case IIO_CHAN_INFO_CALIBBIAS: return ad4030_get_chan_calibbias(indio_dev, chan, val); =20 + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + *val =3D BIT(st->avg_log2); + return IIO_VAL_INT; + default: return -EINVAL; } @@ -650,6 +710,9 @@ static int ad4030_write_raw_dispatch(struct iio_dev *in= dio_dev, return -EINVAL; return ad4030_set_chan_calibbias(indio_dev, chan, val); =20 + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + return ad4030_set_avg_frame_len(indio_dev, val); + default: return -EINVAL; } @@ -701,12 +764,21 @@ static int ad4030_read_label(struct iio_dev *indio_de= v, return sprintf(label, "common-mode%lu\n", chan->address); } =20 +static int ad4030_get_current_scan_type(const struct iio_dev *indio_dev, + const struct iio_chan_spec *chan) +{ + struct ad4030_state *st =3D iio_priv(indio_dev); + + return st->avg_log2 ? AD4030_SCAN_TYPE_AVG : AD4030_SCAN_TYPE_NORMAL; +} + static const struct iio_info ad4030_iio_info =3D { .read_avail =3D ad4030_read_avail, .read_raw =3D ad4030_read_raw, .write_raw =3D ad4030_write_raw, .debugfs_reg_access =3D ad4030_reg_access, .read_label =3D ad4030_read_label, + .get_current_scan_type =3D ad4030_get_current_scan_type, }; =20 static int ad4030_buffer_preenable(struct iio_dev *indio_dev) @@ -714,8 +786,21 @@ static int ad4030_buffer_preenable(struct iio_dev *ind= io_dev) return ad4030_set_mode(indio_dev, *indio_dev->active_scan_mask); } =20 +static bool ad4030_validate_scan_mask(struct iio_dev *indio_dev, + const unsigned long *scan_mask) +{ + struct ad4030_state *st =3D iio_priv(indio_dev); + + /* Asking for both common channels and averaging */ + if (st->avg_log2 && ad4030_is_common_byte_asked(st, *scan_mask)) + return false; + + return true; +} + static const struct iio_buffer_setup_ops ad4030_buffer_setup_ops =3D { .preenable =3D ad4030_buffer_preenable, + .validate_scan_mask =3D ad4030_validate_scan_mask, }; =20 static int ad4030_regulators_get(struct ad4030_state *st) @@ -881,11 +966,28 @@ static const unsigned long ad4030_channel_masks[] =3D= { 0, }; =20 +static const struct iio_scan_type ad4030_24_scan_types[] =3D { + [AD4030_SCAN_TYPE_NORMAL] =3D { + .sign =3D 's', + .storagebits =3D 32, + .realbits =3D 24, + .shift =3D 8, + .endianness =3D IIO_BE, + }, + [AD4030_SCAN_TYPE_AVG] =3D { + .sign =3D 's', + .storagebits =3D 32, + .realbits =3D 30, + .shift =3D 2, + .endianness =3D IIO_BE, + }, +}; + static const struct ad4030_chip_info ad4030_24_chip_info =3D { .name =3D "ad4030-24", .available_masks =3D ad4030_channel_masks, .channels =3D { - AD4030_CHAN_DIFF(0, 32, 24, 8), + AD4030_CHAN_DIFF(0, ad4030_24_scan_types), AD4030_CHAN_CMO(1, 0), IIO_CHAN_SOFT_TIMESTAMP(2), }, --=20 2.47.2