From nobody Thu Dec 18 13:45:51 2025 Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D5F9586325; Thu, 13 Feb 2025 05:32:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.156.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739424748; cv=none; b=VKWiL7QnYXehmM8FUTvH3ys9j9MPhGCeWQ4d0f7odL9uJN1HscxCuClVAAYykxwxTPcuRYPU73pKjauLmcI0jlHY6v2byoXc5hIBRjVVf+teHU7veG6s7lyou0zQHpJBTpA7LLq41njEAjEk2ieOLBdSwUu6OOvoyhKEnDfzhZ8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739424748; c=relaxed/simple; bh=IMEIoLYeHKoxfztcFzUT0rWMKm20n4CxjKokVII5Jdc=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=B7PP8s1HWrECogAI+jTq2sQx0KiKwDbGnixobtzd5HqRXC8IHNEtzFFUvrMKQg1UGS0lN35Y94WjR4ixP/WDgCTBpXWi34F/7Q+1Cxv2h1EqQzYtmj8gbQnj3Iin0SCAluLNuO/sJJ4KqFugYEWLNFgtzuqS+u/1AThiuusYRxg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=marvell.com; spf=pass smtp.mailfrom=marvell.com; dkim=pass (2048-bit key) header.d=marvell.com header.i=@marvell.com header.b=k8J0q2cD; arc=none smtp.client-ip=67.231.156.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=marvell.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=marvell.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=marvell.com header.i=@marvell.com header.b="k8J0q2cD" Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51D5ONuL023587; Wed, 12 Feb 2025 21:32:01 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=C CHOSsUitI3LpMR3tgvamh7ObhQUNhr7pu6TnKgwEfM=; b=k8J0q2cDxg6M5+ceZ btx3xA4Stg9B8siy4q+Hbcmwzhyau6LqyAZ8HQB+ABRH8KFlVteB8Gi/hk6wOlsa /v7VZbhmH6UroSFYxh07e/fMkmlcsejQtRg539RbZudmjpcpISczQdzqWPQoQoB9 NmTFPLV8jDZbeF+5rLKeG1igLERTxSUyL3aCgbtFTy2sL2Ilnx92O4YtiPDF3nuu /MvV8xFW5SR48Uh8eoDbpqaN2mYhR1NEAqOpsv4zCkZhIJqNDbZ0s3fc1d3p3PvT XgJpLoq5TCfcxMRgX+2FffoqP4KLC3NoAQHO3aXc/0zxIiclwJIKNI2kZcXOSeFL 1HEaw== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 44rw9g9pkn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Feb 2025 21:32:00 -0800 (PST) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Wed, 12 Feb 2025 21:31:57 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Wed, 12 Feb 2025 21:31:57 -0800 Received: from localhost.localdomain (unknown [10.28.36.166]) by maili.marvell.com (Postfix) with ESMTP id 72EC33F7096; Wed, 12 Feb 2025 21:31:51 -0800 (PST) From: Suman Ghosh To: , , , , , , , , , , , , , , , , , , , , CC: Suman Ghosh Subject: [net-next PATCH v6 1/6] octeontx2-pf: use xdp_return_frame() to free xdp buffers Date: Thu, 13 Feb 2025 11:01:36 +0530 Message-ID: <20250213053141.2833254-2-sumang@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250213053141.2833254-1-sumang@marvell.com> References: <20250213053141.2833254-1-sumang@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: 0rkaLYpMW7uemACXpL9JACrhS4YH6Sb5 X-Proofpoint-ORIG-GUID: 0rkaLYpMW7uemACXpL9JACrhS4YH6Sb5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-13_02,2025-02-11_01,2024-11-22_01 Content-Type: text/plain; charset="utf-8" xdp_return_frames() will help to free the xdp frames and their associated pages back to page pool. Signed-off-by: Geetha sowjanya Signed-off-by: Suman Ghosh --- .../marvell/octeontx2/nic/otx2_common.h | 4 +- .../ethernet/marvell/octeontx2/nic/otx2_pf.c | 7 ++- .../marvell/octeontx2/nic/otx2_txrx.c | 53 +++++++++++-------- .../marvell/octeontx2/nic/otx2_txrx.h | 1 + 4 files changed, 38 insertions(+), 27 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/dri= vers/net/ethernet/marvell/octeontx2/nic/otx2_common.h index 65814e3dc93f..d5fbccb289df 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h @@ -21,6 +21,7 @@ #include #include #include +#include =20 #include #include @@ -1094,7 +1095,8 @@ int otx2_del_macfilter(struct net_device *netdev, con= st u8 *mac); int otx2_add_macfilter(struct net_device *netdev, const u8 *mac); int otx2_enable_rxvlan(struct otx2_nic *pf, bool enable); int otx2_install_rxvlan_offload_flow(struct otx2_nic *pfvf); -bool otx2_xdp_sq_append_pkt(struct otx2_nic *pfvf, u64 iova, int len, u16 = qidx); +bool otx2_xdp_sq_append_pkt(struct otx2_nic *pfvf, struct xdp_frame *xdpf, + u64 iova, int len, u16 qidx, u16 flags); u16 otx2_get_max_mtu(struct otx2_nic *pfvf); int otx2_handle_ntuple_tc_features(struct net_device *netdev, netdev_features_t features); diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers= /net/ethernet/marvell/octeontx2/nic/otx2_pf.c index e1dde93e8af8..4347a3c95350 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c @@ -2691,7 +2691,6 @@ static int otx2_get_vf_config(struct net_device *netd= ev, int vf, static int otx2_xdp_xmit_tx(struct otx2_nic *pf, struct xdp_frame *xdpf, int qidx) { - struct page *page; u64 dma_addr; int err =3D 0; =20 @@ -2701,11 +2700,11 @@ static int otx2_xdp_xmit_tx(struct otx2_nic *pf, st= ruct xdp_frame *xdpf, if (dma_mapping_error(pf->dev, dma_addr)) return -ENOMEM; =20 - err =3D otx2_xdp_sq_append_pkt(pf, dma_addr, xdpf->len, qidx); + err =3D otx2_xdp_sq_append_pkt(pf, xdpf, dma_addr, xdpf->len, + qidx, XDP_REDIRECT); if (!err) { otx2_dma_unmap_page(pf, dma_addr, xdpf->len, DMA_TO_DEVICE); - page =3D virt_to_page(xdpf->data); - put_page(page); + xdp_return_frame(xdpf); return -ENOMEM; } return 0; diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c b/drive= rs/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c index 224cef938927..4a7275043103 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c @@ -96,20 +96,16 @@ static unsigned int frag_num(unsigned int i) =20 static void otx2_xdp_snd_pkt_handler(struct otx2_nic *pfvf, struct otx2_snd_queue *sq, - struct nix_cqe_tx_s *cqe) + struct nix_cqe_tx_s *cqe) { struct nix_send_comp_s *snd_comp =3D &cqe->comp; struct sg_list *sg; - struct page *page; - u64 pa; =20 sg =3D &sq->sg[snd_comp->sqe_id]; - - pa =3D otx2_iova_to_phys(pfvf->iommu_domain, sg->dma_addr[0]); - otx2_dma_unmap_page(pfvf, sg->dma_addr[0], - sg->size[0], DMA_TO_DEVICE); - page =3D virt_to_page(phys_to_virt(pa)); - put_page(page); + if (sg->flags & XDP_REDIRECT) + otx2_dma_unmap_page(pfvf, sg->dma_addr[0], sg->size[0], DMA_TO_DEVICE); + xdp_return_frame((struct xdp_frame *)sg->skb); + sg->skb =3D (u64)NULL; } =20 static void otx2_snd_pkt_handler(struct otx2_nic *pfvf, @@ -1359,8 +1355,9 @@ void otx2_free_pending_sqe(struct otx2_nic *pfvf) } } =20 -static void otx2_xdp_sqe_add_sg(struct otx2_snd_queue *sq, u64 dma_addr, - int len, int *offset) +static void otx2_xdp_sqe_add_sg(struct otx2_snd_queue *sq, + struct xdp_frame *xdpf, + u64 dma_addr, int len, int *offset, u16 flags) { struct nix_sqe_sg_s *sg =3D NULL; u64 *iova =3D NULL; @@ -1377,9 +1374,12 @@ static void otx2_xdp_sqe_add_sg(struct otx2_snd_queu= e *sq, u64 dma_addr, sq->sg[sq->head].dma_addr[0] =3D dma_addr; sq->sg[sq->head].size[0] =3D len; sq->sg[sq->head].num_segs =3D 1; + sq->sg[sq->head].flags =3D flags; + sq->sg[sq->head].skb =3D (u64)xdpf; } =20 -bool otx2_xdp_sq_append_pkt(struct otx2_nic *pfvf, u64 iova, int len, u16 = qidx) +bool otx2_xdp_sq_append_pkt(struct otx2_nic *pfvf, struct xdp_frame *xdpf, + u64 iova, int len, u16 qidx, u16 flags) { struct nix_sqe_hdr_s *sqe_hdr; struct otx2_snd_queue *sq; @@ -1405,7 +1405,7 @@ bool otx2_xdp_sq_append_pkt(struct otx2_nic *pfvf, u6= 4 iova, int len, u16 qidx) =20 offset =3D sizeof(*sqe_hdr); =20 - otx2_xdp_sqe_add_sg(sq, iova, len, &offset); + otx2_xdp_sqe_add_sg(sq, xdpf, iova, len, &offset, flags); sqe_hdr->sizem1 =3D (offset / 16) - 1; pfvf->hw_ops->sqe_flush(pfvf, sq, offset, qidx); =20 @@ -1419,6 +1419,8 @@ static bool otx2_xdp_rcv_pkt_handler(struct otx2_nic = *pfvf, bool *need_xdp_flush) { unsigned char *hard_start; + struct otx2_pool *pool; + struct xdp_frame *xdpf; int qidx =3D cq->cq_idx; struct xdp_buff xdp; struct page *page; @@ -1426,6 +1428,7 @@ static bool otx2_xdp_rcv_pkt_handler(struct otx2_nic = *pfvf, u32 act; int err; =20 + pool =3D &pfvf->qset.pool[qidx]; iova =3D cqe->sg.seg_addr - OTX2_HEAD_ROOM; pa =3D otx2_iova_to_phys(pfvf->iommu_domain, iova); page =3D virt_to_page(phys_to_virt(pa)); @@ -1444,19 +1447,21 @@ static bool otx2_xdp_rcv_pkt_handler(struct otx2_ni= c *pfvf, case XDP_TX: qidx +=3D pfvf->hw.tx_queues; cq->pool_ptrs++; - return otx2_xdp_sq_append_pkt(pfvf, iova, - cqe->sg.seg_size, qidx); + xdpf =3D xdp_convert_buff_to_frame(&xdp); + return otx2_xdp_sq_append_pkt(pfvf, xdpf, cqe->sg.seg_addr, + cqe->sg.seg_size, qidx, XDP_TX); case XDP_REDIRECT: cq->pool_ptrs++; err =3D xdp_do_redirect(pfvf->netdev, &xdp, prog); - - otx2_dma_unmap_page(pfvf, iova, pfvf->rbsize, - DMA_FROM_DEVICE); if (!err) { *need_xdp_flush =3D true; return true; } - put_page(page); + + otx2_dma_unmap_page(pfvf, iova, pfvf->rbsize, + DMA_FROM_DEVICE); + xdpf =3D xdp_convert_buff_to_frame(&xdp); + xdp_return_frame(xdpf); break; default: bpf_warn_invalid_xdp_action(pfvf->netdev, prog, act); @@ -1465,10 +1470,14 @@ static bool otx2_xdp_rcv_pkt_handler(struct otx2_ni= c *pfvf, trace_xdp_exception(pfvf->netdev, prog, act); break; case XDP_DROP: - otx2_dma_unmap_page(pfvf, iova, pfvf->rbsize, - DMA_FROM_DEVICE); - put_page(page); cq->pool_ptrs++; + if (page->pp) { + page_pool_recycle_direct(pool->page_pool, page); + } else { + otx2_dma_unmap_page(pfvf, iova, pfvf->rbsize, + DMA_FROM_DEVICE); + put_page(page); + } return true; } return false; diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h b/drive= rs/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h index d23810963fdb..92e1e84cad75 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h @@ -76,6 +76,7 @@ struct otx2_rcv_queue { =20 struct sg_list { u16 num_segs; + u16 flags; u64 skb; u64 size[OTX2_MAX_FRAGS_IN_SQE]; u64 dma_addr[OTX2_MAX_FRAGS_IN_SQE]; --=20 2.25.1