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It is used to manage auxiliary CPUs in an LM (e.g. additional cores in an AP cluster). Signed-off-by: Peng Fan --- drivers/firmware/arm_scmi/vendors/imx/Kconfig | 11 + drivers/firmware/arm_scmi/vendors/imx/Makefile | 1 + drivers/firmware/arm_scmi/vendors/imx/imx-sm-cpu.c | 287 +++++++++++++++++= ++++ include/linux/scmi_imx_protocol.h | 10 + 4 files changed, 309 insertions(+) diff --git a/drivers/firmware/arm_scmi/vendors/imx/Kconfig b/drivers/firmwa= re/arm_scmi/vendors/imx/Kconfig index 1a936fc87d2350e2a21bccd45dfbeebfa3b90286..b5f13d0e40155e485f4d1696e95= 50645d888ef44 100644 --- a/drivers/firmware/arm_scmi/vendors/imx/Kconfig +++ b/drivers/firmware/arm_scmi/vendors/imx/Kconfig @@ -12,6 +12,17 @@ config IMX_SCMI_BBM_EXT To compile this driver as a module, choose M here: the module will be called imx-sm-bbm. =20 +config IMX_SCMI_CPU_EXT + tristate "i.MX SCMI CPU EXTENSION" + depends on ARM_SCMI_PROTOCOL || (COMPILE_TEST && OF) + default y if ARCH_MXC + help + This enables i.MX System CPU Protocol to manage cpu + start, stop and etc. + + To compile this driver as a module, choose M here: the + module will be called imx-sm-cpu. + config IMX_SCMI_LMM_EXT tristate "i.MX SCMI LMM EXTENSION" depends on ARM_SCMI_PROTOCOL || (COMPILE_TEST && OF) diff --git a/drivers/firmware/arm_scmi/vendors/imx/Makefile b/drivers/firmw= are/arm_scmi/vendors/imx/Makefile index f39a99ccaf9af757475e8b112d224669444d7ddc..e3a5ea46345c89da1afae25e556= 98044672b7c28 100644 --- a/drivers/firmware/arm_scmi/vendors/imx/Makefile +++ b/drivers/firmware/arm_scmi/vendors/imx/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_IMX_SCMI_BBM_EXT) +=3D imx-sm-bbm.o +obj-$(CONFIG_IMX_SCMI_CPU_EXT) +=3D imx-sm-cpu.o obj-$(CONFIG_IMX_SCMI_LMM_EXT) +=3D imx-sm-lmm.o obj-$(CONFIG_IMX_SCMI_MISC_EXT) +=3D imx-sm-misc.o diff --git a/drivers/firmware/arm_scmi/vendors/imx/imx-sm-cpu.c b/drivers/f= irmware/arm_scmi/vendors/imx/imx-sm-cpu.c new file mode 100644 index 0000000000000000000000000000000000000000..c815b58897c3b74dcc8ffdbbde9= 714f3c7e0784e --- /dev/null +++ b/drivers/firmware/arm_scmi/vendors/imx/imx-sm-cpu.c @@ -0,0 +1,287 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * System control and Management Interface (SCMI) NXP CPU Protocol + * + * Copyright 2025 NXP + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "../../protocols.h" +#include "../../notify.h" + +#define SCMI_PROTOCOL_SUPPORTED_VERSION 0x10000 + +enum scmi_imx_cpu_protocol_cmd { + SCMI_IMX_CPU_ATTRIBUTES =3D 0x3, + SCMI_IMX_CPU_START =3D 0x4, + SCMI_IMX_CPU_STOP =3D 0x5, + SCMI_IMX_CPU_RESET_VECTOR_SET =3D 0x6, + SCMI_IMX_CPU_INFO_GET =3D 0xC, +}; + +struct scmi_imx_cpu_info { + u32 nr_cpu; +}; + +#define SCMI_IMX_CPU_PROTO_ATTR_NUM_CPUS(x) ((x) & 0xFFFF) +struct scmi_msg_imx_cpu_protocol_attributes { + __le32 attributes; +}; + +struct scmi_msg_imx_cpu_attributes_out { + __le32 attributes; +#define CPU_MAX_NAME 16 + u8 name[CPU_MAX_NAME]; +}; + +struct scmi_imx_cpu_reset_vector_set_in { + __le32 cpuid; +#define CPU_VEC_FLAGS_RESUME BIT(31) +#define CPU_VEC_FLAGS_START BIT(30) +#define CPU_VEC_FLAGS_BOOT BIT(29) + __le32 flags; + __le32 resetvectorlow; + __le32 resetvectorhigh; +}; + +struct scmi_imx_cpu_info_get_out { +#define CPU_RUN_MODE_START 0 +#define CPU_RUN_MODE_HOLD 1 +#define CPU_RUN_MODE_STOP 2 +#define CPU_RUN_MODE_SLEEP 3 + __le32 runmode; + __le32 sleepmode; + __le32 resetvectorlow; + __le32 resetvectorhigh; +}; + +static int scmi_imx_cpu_validate_cpuid(const struct scmi_protocol_handle *= ph, + u32 cpuid) +{ + struct scmi_imx_cpu_info *info =3D ph->get_priv(ph); + + if (cpuid >=3D info->nr_cpu) + return -EINVAL; + + return 0; +} + +static int scmi_imx_cpu_start(const struct scmi_protocol_handle *ph, u32 c= puid) +{ + struct scmi_xfer *t; + int ret; + + ret =3D scmi_imx_cpu_validate_cpuid(ph, cpuid); + if (ret) + return ret; + + ret =3D ph->xops->xfer_get_init(ph, SCMI_IMX_CPU_START, sizeof(u32), + 0, &t); + if (ret) + return ret; + + put_unaligned_le32(cpuid, t->tx.buf); + ret =3D ph->xops->do_xfer(ph, t); + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_imx_cpu_stop(const struct scmi_protocol_handle *ph, u32 cp= uid) +{ + struct scmi_xfer *t; + int ret; + + ret =3D scmi_imx_cpu_validate_cpuid(ph, cpuid); + if (ret) + return ret; + + ret =3D ph->xops->xfer_get_init(ph, SCMI_IMX_CPU_STOP, sizeof(u32), + 0, &t); + if (ret) + return ret; + + put_unaligned_le32(cpuid, t->tx.buf); + ret =3D ph->xops->do_xfer(ph, t); + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_imx_cpu_reset_vector_set(const struct scmi_protocol_handle= *ph, + u32 cpuid, u64 vector, bool start, + bool boot, bool resume) +{ + struct scmi_imx_cpu_reset_vector_set_in *in; + struct scmi_xfer *t; + int ret; + u32 flags; + + ret =3D scmi_imx_cpu_validate_cpuid(ph, cpuid); + if (ret) + return ret; + + ret =3D ph->xops->xfer_get_init(ph, SCMI_IMX_CPU_RESET_VECTOR_SET, sizeof= (*in), + 0, &t); + if (ret) + return ret; + + in =3D t->tx.buf; + in->cpuid =3D cpu_to_le32(cpuid); + flags =3D start ? CPU_VEC_FLAGS_START : 0; + flags |=3D boot ? CPU_VEC_FLAGS_BOOT : 0; + flags |=3D resume ? CPU_VEC_FLAGS_RESUME : 0; + in->flags =3D cpu_to_le32(flags); + in->resetvectorlow =3D cpu_to_le32(lower_32_bits(vector)); + in->resetvectorhigh =3D cpu_to_le32(upper_32_bits(vector)); + ret =3D ph->xops->do_xfer(ph, t); + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_imx_cpu_started(const struct scmi_protocol_handle *ph, u32= cpuid, + bool *started) +{ + struct scmi_imx_cpu_info_get_out *out; + struct scmi_xfer *t; + u32 mode; + int ret; + + *started =3D false; + ret =3D scmi_imx_cpu_validate_cpuid(ph, cpuid); + if (ret) + return ret; + + ret =3D ph->xops->xfer_get_init(ph, SCMI_IMX_CPU_INFO_GET, sizeof(u32), + 0, &t); + if (ret) + return ret; + + put_unaligned_le32(cpuid, t->tx.buf); + ret =3D ph->xops->do_xfer(ph, t); + if (!ret) { + out =3D t->rx.buf; + mode =3D le32_to_cpu(out->runmode); + if ((mode =3D=3D CPU_RUN_MODE_START) || (mode =3D=3D CPU_RUN_MODE_SLEEP)) + *started =3D true; + } + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static const struct scmi_imx_cpu_proto_ops scmi_imx_cpu_proto_ops =3D { + .cpu_reset_vector_set =3D scmi_imx_cpu_reset_vector_set, + .cpu_start =3D scmi_imx_cpu_start, + .cpu_started =3D scmi_imx_cpu_started, + .cpu_stop =3D scmi_imx_cpu_stop, +}; + +static int scmi_imx_cpu_protocol_attributes_get(const struct scmi_protocol= _handle *ph, + struct scmi_imx_cpu_info *info) +{ + struct scmi_msg_imx_cpu_protocol_attributes *attr; + struct scmi_xfer *t; + int ret; + + ret =3D ph->xops->xfer_get_init(ph, PROTOCOL_ATTRIBUTES, 0, + sizeof(*attr), &t); + if (ret) + return ret; + + attr =3D t->rx.buf; + + ret =3D ph->xops->do_xfer(ph, t); + if (!ret) { + info->nr_cpu =3D SCMI_IMX_CPU_PROTO_ATTR_NUM_CPUS(attr->attributes); + dev_info(ph->dev, "i.MX SM CPU: %d cpus\n", + info->nr_cpu); + } + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_imx_cpu_attributes_get(const struct scmi_protocol_handle *= ph, + u32 cpuid) +{ + struct scmi_msg_imx_cpu_attributes_out *out; + char name[SCMI_SHORT_NAME_MAX_SIZE] =3D {'\0'}; + struct scmi_xfer *t; + int ret; + + ret =3D ph->xops->xfer_get_init(ph, SCMI_IMX_CPU_ATTRIBUTES, sizeof(u32),= 0, &t); + if (ret) + return ret; + + put_unaligned_le32(cpuid, t->tx.buf); + ret =3D ph->xops->do_xfer(ph, t); + if (!ret) { + out =3D t->rx.buf; + strscpy(name, out->name, SCMI_SHORT_NAME_MAX_SIZE); + dev_info(ph->dev, "i.MX CPU: name: %s\n", name); + } else { + dev_err(ph->dev, "i.MX cpu: Failed to get info of cpu(%u)\n", cpuid); + } + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_imx_cpu_protocol_init(const struct scmi_protocol_handle *p= h) +{ + struct scmi_imx_cpu_info *info; + u32 version; + int ret, i; + + ret =3D ph->xops->version_get(ph, &version); + if (ret) + return ret; + + dev_info(ph->dev, "NXP SM CPU Protocol Version %d.%d\n", + PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version)); + + info =3D devm_kzalloc(ph->dev, sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; + + ret =3D scmi_imx_cpu_protocol_attributes_get(ph, info); + if (ret) + return ret; + + for (i =3D 0; i < info->nr_cpu; i++) { + ret =3D scmi_imx_cpu_attributes_get(ph, i); + if (ret) + return ret; + } + + return ph->set_priv(ph, info, version); +} + +static const struct scmi_protocol scmi_imx_cpu =3D { + .id =3D SCMI_PROTOCOL_IMX_CPU, + .owner =3D THIS_MODULE, + .instance_init =3D &scmi_imx_cpu_protocol_init, + .ops =3D &scmi_imx_cpu_proto_ops, + .supported_version =3D SCMI_PROTOCOL_SUPPORTED_VERSION, + .vendor_id =3D SCMI_IMX_VENDOR, + .sub_vendor_id =3D SCMI_IMX_SUBVENDOR, +}; +module_scmi_protocol(scmi_imx_cpu); + +MODULE_DESCRIPTION("i.MX SCMI CPU driver"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/scmi_imx_protocol.h b/include/linux/scmi_imx_pro= tocol.h index 07779c36ef9a126907e26e304a8feca16fd60ab2..6aa76580718f2604a5da25f71ff= f564cf59dab45 100644 --- a/include/linux/scmi_imx_protocol.h +++ b/include/linux/scmi_imx_protocol.h @@ -16,6 +16,7 @@ =20 #define SCMI_PROTOCOL_IMX_LMM 0x80 #define SCMI_PROTOCOL_IMX_BBM 0x81 +#define SCMI_PROTOCOL_IMX_CPU 0x82 #define SCMI_PROTOCOL_IMX_MISC 0x84 =20 #define SCMI_IMX_VENDOR "NXP" @@ -88,4 +89,13 @@ struct scmi_imx_lmm_proto_ops { u32 flags); }; =20 +struct scmi_imx_cpu_proto_ops { + int (*cpu_reset_vector_set)(const struct scmi_protocol_handle *ph, + u32 cpuid, u64 vector, bool start, + bool boot, bool resume); + int (*cpu_start)(const struct scmi_protocol_handle *ph, u32 cpuid); + int (*cpu_started)(const struct scmi_protocol_handle *ph, u32 cpuid, + bool *started); + int (*cpu_stop)(const struct scmi_protocol_handle *ph, u32 cpuid); +}; #endif --=20 2.37.1