From nobody Mon Feb 9 07:19:21 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 093752566D9 for ; Tue, 11 Feb 2025 16:36:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739291814; cv=none; b=DgK6NSzmgUQfxkLfOaUnIi7NApOxkm+7iJKGNKbJ84uYqWiWnH4pK67MVIkJQq/ubkT5VEtR8rLjI+myRhIKOO0s2iwzKJ1mrHk7IkiISsiEWmlIFNL5RsIBIkGHuMIM6AbQ95PcM5wPsrq5SCNWyTCuRLL67etWbQB+Q4elrTI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739291814; c=relaxed/simple; bh=wosn00B4pxMkJctTKQf3+5j8AEOueZxZUqlh/A18SV8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HIeZPb6UGMg+gVY3p3tuLYParj3MiOQbZb4Vjd3Xv43ncS+zPpNRhkyUi3emYoAWfELKSbPZFaSVgfnbu3+01CO2ZgfLHUj/QzJWOfWUfSmBhV7LfhYpCSjyhwrhhBsuYPHRCEk4EM63BUQ7q7HPfj/7NCJDNxu6Pmz/K2FW/Aw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=RAD1/ky6; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="RAD1/ky6" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8B828C4CEE7; Tue, 11 Feb 2025 16:36:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1739291813; bh=wosn00B4pxMkJctTKQf3+5j8AEOueZxZUqlh/A18SV8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RAD1/ky65sJj8CTrtOO/HvQPNPgHFVKFnD7Qik3Q4NP6GHZX4NmkZq8rBG7RlovsT rQwG7BR9tImIHrbk7cWgiyOEVZaTQwCKEIawchQBUKpWQRJ43ijKCz8wGbENVcbhU9 gq56XLtLyHd+GFOoUPdRygSEgrnmNOK/P4u/VSa8378UyKecFL9Ja2gNPyExdJk7R9 DR8c3PCG24KhO3XYCX5YPgUF6ebQgJu+njyUhbAi0gdLJplT19m6s+hIaxyf8Q9L+g yHG5W8pHj2xEjUPCupjOgkbXwzZ14RAkE0PD5YnWLaRqSpshXFsBEIQz+GnuIvTVjm 23tcTFePQe6YQ== From: Borislav Petkov To: X86 ML Cc: LKML , "Borislav Petkov (AMD)" Subject: [PATCH 1/5] x86/microcode/AMD: Remove ugly linebreak in __verify_patch_section() signature Date: Tue, 11 Feb 2025 17:36:44 +0100 Message-ID: <20250211163648.30531-2-bp@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250211163648.30531-1-bp@kernel.org> References: <20250211163648.30531-1-bp@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Borislav Petkov (AMD)" No functional changes. Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Thomas Gleixner --- arch/x86/kernel/cpu/microcode/amd.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/micr= ocode/amd.c index a5dac7f3c0a0..4a62625c311a 100644 --- a/arch/x86/kernel/cpu/microcode/amd.c +++ b/arch/x86/kernel/cpu/microcode/amd.c @@ -246,8 +246,7 @@ static bool verify_equivalence_table(const u8 *buf, siz= e_t buf_size) * On success, @sh_psize returns the patch size according to the section h= eader, * to the caller. */ -static bool -__verify_patch_section(const u8 *buf, size_t buf_size, u32 *sh_psize) +static bool __verify_patch_section(const u8 *buf, size_t buf_size, u32 *sh= _psize) { u32 p_type, p_size; const u32 *hdr; --=20 2.43.0 From nobody Mon Feb 9 07:19:21 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5B99A256C89 for ; Tue, 11 Feb 2025 16:36:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739291815; cv=none; b=TLDMgcEl6KdheDxrNzCskV1tnZuSrEHHGMsf5f/4XEQewZW5mx4wlWtbPpQCxHib5TfRlkMNG3MbXIVNUFxqyFRnsFAzaaFlabA7Tdw3jc7Y80uSt8pIKLDVPs1a9+/W2JvzaLe4txbZm3QLnljQVIv/vpWEcxU76ZqKeYkO1Go= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739291815; c=relaxed/simple; bh=Xzv2Idcboi/8TyI9SKYnRnJkKusnSgH6ZxaO62tE/HU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=jen61VUDJqvd9Q7RL43wJ9lQHXfQQq8/FhHj/vJ5kn7X4RDWlUe3I5yVpmcw0TAeB6lmyA/gvSLCyE6bYcOYUaaGWOSdniQxGN4wWK+99wBXEJt63B+qO+gKsZU0ma8vM94+bw/gdTcXY2AZUkfetFHJgkzXaj8+q8dfAvpwiuM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ION3maPw; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ION3maPw" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E7041C4CEE8; Tue, 11 Feb 2025 16:36:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1739291814; bh=Xzv2Idcboi/8TyI9SKYnRnJkKusnSgH6ZxaO62tE/HU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ION3maPw6zJtMYtXXs9QSzU8e9ecIOfwaSBtwT8WFFMg/Q5aqJVzx0dkeTdUpjARV 5C8CrPpKXOT4I12VbojMMQFHZDepQaKmKcmiwIPW+u/ADogzK+0qQJHlJg9f47j0H5 LjAqyc33NKQI0a1fKX9sik88IqNZHcWXUlA4NiYMytOHGRWj/5TVm/aeEqfQ3RG2yS Am4ACfPurge/yxpRURPnW+RtfaIw91zb9JzBCL8DTSSIrz2Y0EcC3vm7qvfIo2He5P /jGBwKpZ9qXh9XjOZKzmR4mAx151miiESkvB1xAcCK3xorPboic/n8ZWvfhUgZuVsb C1F2HzPejp+CQ== From: Borislav Petkov To: X86 ML Cc: LKML , "Borislav Petkov (AMD)" Subject: [PATCH 2/5] x86/microcode/AMD: Remove unused save_microcode_in_initrd_amd() declarations Date: Tue, 11 Feb 2025 17:36:45 +0100 Message-ID: <20250211163648.30531-3-bp@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250211163648.30531-1-bp@kernel.org> References: <20250211163648.30531-1-bp@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Borislav Petkov (AMD)" Commit a7939f016720 ("x86/microcode/amd: Cache builtin/initrd microcode early") renamed it to save_microcode_in_initrd() and made it static. Zap the forgotten declarations. No functional changes. Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Thomas Gleixner --- arch/x86/kernel/cpu/microcode/amd.c | 2 +- arch/x86/kernel/cpu/microcode/internal.h | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/micr= ocode/amd.c index 4a62625c311a..f831c0602994 100644 --- a/arch/x86/kernel/cpu/microcode/amd.c +++ b/arch/x86/kernel/cpu/microcode/amd.c @@ -517,7 +517,7 @@ static bool __apply_microcode_amd(struct microcode_amd = *mc, unsigned int psize) * patch container file in initrd, traverse equivalent cpu table, look for= a * matching microcode patch, and update, all in initrd memory in place. * When vmalloc() is available for use later -- on 64-bit during first AP = load, - * and on 32-bit during save_microcode_in_initrd_amd() -- we can call + * and on 32-bit during save_microcode_in_initrd() -- we can call * load_microcode_amd() to save equivalent cpu table and microcode patches= in * kernel heap memory. * diff --git a/arch/x86/kernel/cpu/microcode/internal.h b/arch/x86/kernel/cpu= /microcode/internal.h index 21776c529fa9..5df621752fef 100644 --- a/arch/x86/kernel/cpu/microcode/internal.h +++ b/arch/x86/kernel/cpu/microcode/internal.h @@ -100,14 +100,12 @@ extern bool force_minrev; #ifdef CONFIG_CPU_SUP_AMD void load_ucode_amd_bsp(struct early_load_data *ed, unsigned int family); void load_ucode_amd_ap(unsigned int family); -int save_microcode_in_initrd_amd(unsigned int family); void reload_ucode_amd(unsigned int cpu); struct microcode_ops *init_amd_microcode(void); void exit_amd_microcode(void); #else /* CONFIG_CPU_SUP_AMD */ static inline void load_ucode_amd_bsp(struct early_load_data *ed, unsigned= int family) { } static inline void load_ucode_amd_ap(unsigned int family) { } -static inline int save_microcode_in_initrd_amd(unsigned int family) { retu= rn -EINVAL; } static inline void reload_ucode_amd(unsigned int cpu) { } static inline struct microcode_ops *init_amd_microcode(void) { return NULL= ; } static inline void exit_amd_microcode(void) { } --=20 2.43.0 From nobody Mon Feb 9 07:19:21 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C489256C67 for ; Tue, 11 Feb 2025 16:36:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739291816; cv=none; b=I3hKnqdXIPWVU9tMbs7yixxlvaepUs3SgZI9GEZXoSAyCADsRKoLD3SLNQYubDq6mjF6LmJMSeYp6K1H+5qEs/iEfPrH/URMddgh2SIkUOpK/sKjjDf//zxtfusFpXDrHQ10t7UCjcXRU9+tjDEWchvqzuUAIpT4xDF/RKsnvOY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739291816; c=relaxed/simple; bh=ED3ny5115pDBmmp0qaqzGXjvXu2hgnTP/uhYI604o+c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cuOriFglNDMfQCGNi+/YotpLuvnbK5cY+nRWiPJeRXa/nwL7GbpVQdgpFKPiY90+sOSa6Oee1tSLfd8UfPnkU0xg+AcaKsQQ1zsOqWXN32SR3YLNpXJzaX5o9WML7OeG4+D566KhsS+xT5ZNp3Wu9OhgFiU4neRGL9IDMcY/tJk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=rmovjLpj; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="rmovjLpj" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4FA45C4CEE5; Tue, 11 Feb 2025 16:36:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1739291816; bh=ED3ny5115pDBmmp0qaqzGXjvXu2hgnTP/uhYI604o+c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rmovjLpjq0dVciSd4DxaCN2mAlz5YZRnHU1cUi5tEkYCz6dbxgx2iiDuFlq7o3Tca 3a3THFsTUTAFvJ3wbU2UfyltCr+ZcMgbDdVSwFqYGv59uFPikY+Jq0rHoXqyK5d389 4vUX6i+vAmybeYq//RiG4vJGjbuZ91kT7yomwbCLGaWpFgmK1XBjSKQcaPsKEbmIKY Tf/QxrA2WeZJjg5qvHgdk1mfZrExjDoSWeNU8uu9hfaZ5XQhr9ah3dw04UZkCLy9DY BesiMr+ak0TqWE4DGii/KsYy/Dtbh37pHj/3vTwUQy4jeeC4aNu8VLn3z0Kp30VlsH gIHfnGM2gFtQg== From: Borislav Petkov To: X86 ML Cc: LKML , "Borislav Petkov (AMD)" Subject: [PATCH 3/5] x86/microcode/AMD: Merge early_apply_microcode() into its single callsite Date: Tue, 11 Feb 2025 17:36:46 +0100 Message-ID: <20250211163648.30531-4-bp@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250211163648.30531-1-bp@kernel.org> References: <20250211163648.30531-1-bp@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Borislav Petkov (AMD)" No functional changes. Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Thomas Gleixner --- arch/x86/kernel/cpu/microcode/amd.c | 60 +++++++++++++---------------- 1 file changed, 26 insertions(+), 34 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/micr= ocode/amd.c index f831c0602994..90f93b3ca9db 100644 --- a/arch/x86/kernel/cpu/microcode/amd.c +++ b/arch/x86/kernel/cpu/microcode/amd.c @@ -512,39 +512,6 @@ static bool __apply_microcode_amd(struct microcode_amd= *mc, unsigned int psize) return true; } =20 -/* - * Early load occurs before we can vmalloc(). So we look for the microcode - * patch container file in initrd, traverse equivalent cpu table, look for= a - * matching microcode patch, and update, all in initrd memory in place. - * When vmalloc() is available for use later -- on 64-bit during first AP = load, - * and on 32-bit during save_microcode_in_initrd() -- we can call - * load_microcode_amd() to save equivalent cpu table and microcode patches= in - * kernel heap memory. - * - * Returns true if container found (sets @desc), false otherwise. - */ -static bool early_apply_microcode(u32 old_rev, void *ucode, size_t size) -{ - struct cont_desc desc =3D { 0 }; - struct microcode_amd *mc; - - scan_containers(ucode, size, &desc); - - mc =3D desc.mc; - if (!mc) - return false; - - /* - * Allow application of the same revision to pick up SMT-specific - * changes even if the revision of the other SMT thread is already - * up-to-date. - */ - if (old_rev > mc->hdr.patch_id) - return false; - - return __apply_microcode_amd(mc, desc.psize); -} - static bool get_builtin_microcode(struct cpio_data *cp) { char fw_name[36] =3D "amd-ucode/microcode_amd.bin"; @@ -582,8 +549,19 @@ static bool __init find_blobs_in_containers(struct cpi= o_data *ret) return found; } =20 +/* + * Early load occurs before we can vmalloc(). So we look for the microcode + * patch container file in initrd, traverse equivalent cpu table, look for= a + * matching microcode patch, and update, all in initrd memory in place. + * When vmalloc() is available for use later -- on 64-bit during first AP = load, + * and on 32-bit during save_microcode_in_initrd() -- we can call + * load_microcode_amd() to save equivalent cpu table and microcode patches= in + * kernel heap memory. + */ void __init load_ucode_amd_bsp(struct early_load_data *ed, unsigned int cp= uid_1_eax) { + struct cont_desc desc =3D { }; + struct microcode_amd *mc; struct cpio_data cp =3D { }; u32 dummy; =20 @@ -597,7 +575,21 @@ void __init load_ucode_amd_bsp(struct early_load_data = *ed, unsigned int cpuid_1_ if (!find_blobs_in_containers(&cp)) return; =20 - if (early_apply_microcode(ed->old_rev, cp.data, cp.size)) + scan_containers(cp.data, cp.size, &desc); + + mc =3D desc.mc; + if (!mc) + return; + + /* + * Allow application of the same revision to pick up SMT-specific + * changes even if the revision of the other SMT thread is already + * up-to-date. + */ + if (ed->old_rev > mc->hdr.patch_id) + return; + + if (__apply_microcode_amd(mc, desc.psize)) native_rdmsr(MSR_AMD64_PATCH_LEVEL, ed->new_rev, dummy); } =20 --=20 2.43.0 From nobody Mon Feb 9 07:19:21 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 28BDE256C71 for ; Tue, 11 Feb 2025 16:36:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739291818; cv=none; b=XdTQatGfq+Ms2x2ydg0VgovdjRWZvpcPVRg+PsDjkYSLqGa26plUfm5NXmDRrq0YS9LHd2TiuvA+DLN1djAFkD8X1TSKehgNzV4mQUeho8u1rowAUoRpqvAAt+Pu41b5eOVGhHA5ldAy0j4dcns+V7hfgtvrpRLyYt9F5dIDldk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739291818; c=relaxed/simple; bh=Y1yKoTh0XMDwtZO99R2TCsDZif5YDD+FLnLgTiIlcF0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=GHTaPud3bvE0s+THjZS2bK+ejVTpLAX46gmL99YmUW2wEfQ2MDk4rYKowqYzzijDFr+MtgS0c4HYZEo6ql7Tmh+F1o2OUA8cfx00D8SKev+kDnZuSWbP+LRC5VL06yIgmIjqZWcG+66bed1zAVlLMHHvrn/ba0ZxvKQa8fAGmXo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=r0WJgrgJ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="r0WJgrgJ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id AB721C4CEE8; Tue, 11 Feb 2025 16:36:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1739291817; bh=Y1yKoTh0XMDwtZO99R2TCsDZif5YDD+FLnLgTiIlcF0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=r0WJgrgJ/TqfI4M+27tK2G4Y8nDGoZY03a6SxPj/VJ/E1O9Wat+fMuh+rHIapPjoP aprZ0o0d5p/27tamrk3iz9IjZHdKLGfALI5eQL0GtGIBeGGnwfSBTNeCNBA9Tn5vtG 9T9SoMwtamHLIJeLPPE8P1ddaOFfmxuhhbhbEjwlOOe6RZ7Lb2Z8RkFG45zAUv3E2/ +RWU5uXaYGJd7E4992IQErxc70/lJdB8LMn+gmecQuxNelDCSOj7R7ekre2Wa3JWMd eHkSGwm4UZ+ws2Q/qu5Sf7+Erk+ZFjG6o2u9WdxDhRR4S40hSBzE4z9IkkROCJVNvw 0ush1eDpuVHGw== From: Borislav Petkov To: X86 ML Cc: LKML , "Borislav Petkov (AMD)" Subject: [PATCH 4/5] x86/microcode/AMD: Get rid of the _load_microcode_amd() forward declaration Date: Tue, 11 Feb 2025 17:36:47 +0100 Message-ID: <20250211163648.30531-5-bp@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250211163648.30531-1-bp@kernel.org> References: <20250211163648.30531-1-bp@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Borislav Petkov (AMD)" Simply move save_microcode_in_initrd() down. No functional changes. Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Thomas Gleixner --- arch/x86/kernel/cpu/microcode/amd.c | 54 ++++++++++++++--------------- 1 file changed, 26 insertions(+), 28 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/micr= ocode/amd.c index 90f93b3ca9db..adfea4d0d129 100644 --- a/arch/x86/kernel/cpu/microcode/amd.c +++ b/arch/x86/kernel/cpu/microcode/amd.c @@ -593,34 +593,6 @@ void __init load_ucode_amd_bsp(struct early_load_data = *ed, unsigned int cpuid_1_ native_rdmsr(MSR_AMD64_PATCH_LEVEL, ed->new_rev, dummy); } =20 -static enum ucode_state _load_microcode_amd(u8 family, const u8 *data, siz= e_t size); - -static int __init save_microcode_in_initrd(void) -{ - unsigned int cpuid_1_eax =3D native_cpuid_eax(1); - struct cpuinfo_x86 *c =3D &boot_cpu_data; - struct cont_desc desc =3D { 0 }; - enum ucode_state ret; - struct cpio_data cp; - - if (dis_ucode_ldr || c->x86_vendor !=3D X86_VENDOR_AMD || c->x86 < 0x10) - return 0; - - if (!find_blobs_in_containers(&cp)) - return -EINVAL; - - scan_containers(cp.data, cp.size, &desc); - if (!desc.mc) - return -EINVAL; - - ret =3D _load_microcode_amd(x86_family(cpuid_1_eax), desc.data, desc.size= ); - if (ret > UCODE_UPDATED) - return -EINVAL; - - return 0; -} -early_initcall(save_microcode_in_initrd); - static inline bool patch_cpus_equivalent(struct ucode_patch *p, struct ucode_patch *n, bool ignore_stepping) @@ -1004,6 +976,32 @@ static enum ucode_state load_microcode_amd(u8 family,= const u8 *data, size_t siz return ret; } =20 +static int __init save_microcode_in_initrd(void) +{ + unsigned int cpuid_1_eax =3D native_cpuid_eax(1); + struct cpuinfo_x86 *c =3D &boot_cpu_data; + struct cont_desc desc =3D { 0 }; + enum ucode_state ret; + struct cpio_data cp; + + if (dis_ucode_ldr || c->x86_vendor !=3D X86_VENDOR_AMD || c->x86 < 0x10) + return 0; + + if (!find_blobs_in_containers(&cp)) + return -EINVAL; + + scan_containers(cp.data, cp.size, &desc); + if (!desc.mc) + return -EINVAL; + + ret =3D _load_microcode_amd(x86_family(cpuid_1_eax), desc.data, desc.size= ); + if (ret > UCODE_UPDATED) + return -EINVAL; + + return 0; +} +early_initcall(save_microcode_in_initrd); + /* * AMD microcode firmware naming convention, up to family 15h they are in * the legacy file: --=20 2.43.0 From nobody Mon Feb 9 07:19:21 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 82AA62566C9 for ; Tue, 11 Feb 2025 16:36:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739291819; cv=none; b=t3VuDQWDF6CFxG/nzZoZsA6WBZB6dODOqj1Wc3Jms2Yv4FJQWlB1qeBcda0k9UZVAeF7nNKdbELOvI1bJDeFb4yEwHHW/Bj8dRrf4b7oxtPxHcHw7e/e97lPDaGJx8f5Fin2Vpu4X9Xilu6tpARQTfppaoWvMoCSv40xsqXlkGM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739291819; c=relaxed/simple; bh=+HW24izCZDjaUaZUO8o/SCJ3eyQma72sjafBY/n5uz8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Q9GIhGlb1i1NLJQ2hacSUXAhL7CaNUJ0wKikt6evhkWPDAlWwAiilEI5BSiRB1u15Hk1FEo+GIAJupCCnPPfD8ah2MXWLqyJXWU+cYjYvVr5tavBYXanAKJ1buiGLldPfJkMRJGWBwJWyCgvVHPNtaFuJK8Sl52CHaDRQ++nyH8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hQs07nC9; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hQs07nC9" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 14218C4CEE9; Tue, 11 Feb 2025 16:36:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1739291819; bh=+HW24izCZDjaUaZUO8o/SCJ3eyQma72sjafBY/n5uz8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hQs07nC9tCFo22fAQGh78psDMhxtQEFnZ+c3V505nCsC+59OCPrgvGBeJRXmo8F6M xPS+D0EQQlSy13MBMubgkUAJ54DUcnzcOAQW4v+mwtFG1/BPo103Fw3bfiFZAePGeO VFq9KZPagGlIwCzMlIBLPjdpyPDhRk5vQ1m0oYOu+HSveONpD2EBCMokVU05zhNLDQ w64eymohMePG45yl4a1y3FZFVnCfE0qrB9HY6bqmpx7TtUyVeWgyhl6pyYyB+9yb7M Lv4COJg8LuwlM/XykkyPNZRT6oed5nft+SKh73RGkUw0MK2fLHd8tqSvdPlOQqRuc7 m2b+V0KMgfGFw== From: Borislav Petkov To: X86 ML Cc: LKML , "Borislav Petkov (AMD)" Subject: [PATCH 5/5] x86/microcode/AMD: Add get_patch_level() Date: Tue, 11 Feb 2025 17:36:48 +0100 Message-ID: <20250211163648.30531-6-bp@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250211163648.30531-1-bp@kernel.org> References: <20250211163648.30531-1-bp@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Borislav Petkov (AMD)" Put the MSR_AMD64_PATCH_LEVEL reading of the current microcode revision the hw has, into a separate function. Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Thomas Gleixner --- arch/x86/kernel/cpu/microcode/amd.c | 46 +++++++++++++++-------------- 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/micr= ocode/amd.c index adfea4d0d129..31f90e129b08 100644 --- a/arch/x86/kernel/cpu/microcode/amd.c +++ b/arch/x86/kernel/cpu/microcode/amd.c @@ -145,6 +145,15 @@ ucode_path[] __maybe_unused =3D "kernel/x86/microcode/= AuthenticAMD.bin"; */ static u32 bsp_cpuid_1_eax __ro_after_init; =20 +static u32 get_patch_level(void) +{ + u32 rev, dummy __always_unused; + + native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); + + return rev; +} + static union cpuid_1_eax ucode_rev_to_cpuid(unsigned int val) { union zen_patch_rev p; @@ -483,10 +492,10 @@ static void scan_containers(u8 *ucode, size_t size, s= truct cont_desc *desc) } } =20 -static bool __apply_microcode_amd(struct microcode_amd *mc, unsigned int p= size) +static bool __apply_microcode_amd(struct microcode_amd *mc, u32 *cur_rev, + unsigned int psize) { unsigned long p_addr =3D (unsigned long)&mc->hdr.data_code; - u32 rev, dummy; =20 native_wrmsrl(MSR_AMD64_PATCH_LOADER, p_addr); =20 @@ -504,9 +513,8 @@ static bool __apply_microcode_amd(struct microcode_amd = *mc, unsigned int psize) } =20 /* verify patch application was successful */ - native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); - - if (rev !=3D mc->hdr.patch_id) + *cur_rev =3D get_patch_level(); + if (*cur_rev !=3D mc->hdr.patch_id) return false; =20 return true; @@ -563,11 +571,12 @@ void __init load_ucode_amd_bsp(struct early_load_data= *ed, unsigned int cpuid_1_ struct cont_desc desc =3D { }; struct microcode_amd *mc; struct cpio_data cp =3D { }; - u32 dummy; + u32 rev; =20 bsp_cpuid_1_eax =3D cpuid_1_eax; =20 - native_rdmsr(MSR_AMD64_PATCH_LEVEL, ed->old_rev, dummy); + rev =3D get_patch_level(); + ed->old_rev =3D rev; =20 /* Needed in load_microcode_amd() */ ucode_cpu_info[0].cpu_sig.sig =3D cpuid_1_eax; @@ -589,8 +598,8 @@ void __init load_ucode_amd_bsp(struct early_load_data *= ed, unsigned int cpuid_1_ if (ed->old_rev > mc->hdr.patch_id) return; =20 - if (__apply_microcode_amd(mc, desc.psize)) - native_rdmsr(MSR_AMD64_PATCH_LEVEL, ed->new_rev, dummy); + if (__apply_microcode_amd(mc, &rev, desc.psize)) + ed->new_rev =3D rev; } =20 static inline bool patch_cpus_equivalent(struct ucode_patch *p, @@ -692,14 +701,9 @@ static void free_cache(void) static struct ucode_patch *find_patch(unsigned int cpu) { struct ucode_cpu_info *uci =3D ucode_cpu_info + cpu; - u32 rev, dummy __always_unused; u16 equiv_id =3D 0; =20 - /* fetch rev if not populated yet: */ - if (!uci->cpu_sig.rev) { - rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); - uci->cpu_sig.rev =3D rev; - } + uci->cpu_sig.rev =3D get_patch_level(); =20 if (x86_family(bsp_cpuid_1_eax) < 0x17) { equiv_id =3D find_equiv_id(&equiv_table, uci->cpu_sig.sig); @@ -722,22 +726,20 @@ void reload_ucode_amd(unsigned int cpu) =20 mc =3D p->data; =20 - rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); - + rev =3D get_patch_level(); if (rev < mc->hdr.patch_id) { - if (__apply_microcode_amd(mc, p->size)) - pr_info_once("reload revision: 0x%08x\n", mc->hdr.patch_id); + if (__apply_microcode_amd(mc, &rev, p->size)) + pr_info_once("reload revision: 0x%08x\n", rev); } } =20 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig) { - struct cpuinfo_x86 *c =3D &cpu_data(cpu); struct ucode_cpu_info *uci =3D ucode_cpu_info + cpu; struct ucode_patch *p; =20 csig->sig =3D cpuid_eax(0x00000001); - csig->rev =3D c->microcode; + csig->rev =3D get_patch_level(); =20 /* * a patch could have been loaded early, set uci->mc so that @@ -778,7 +780,7 @@ static enum ucode_state apply_microcode_amd(int cpu) goto out; } =20 - if (!__apply_microcode_amd(mc_amd, p->size)) { + if (!__apply_microcode_amd(mc_amd, &rev, p->size)) { pr_err("CPU%d: update failed for patch_level=3D0x%08x\n", cpu, mc_amd->hdr.patch_id); return UCODE_ERROR; --=20 2.43.0