From nobody Thu Dec 18 10:24:05 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5DD425E47D; Tue, 11 Feb 2025 11:35:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739273724; cv=none; b=UcEYV7vrwQJLHFjt6UXELsaUZnkl1EyzhK+YDtcWVdNAQCTop62CH+obsmzKz/hNuoT26yyU29QXj9mMFCaxRmci4MnYaATAIYcJfqX03hM0TDRRDLzOc7lRHgpSyYOqHVPlG03Nlu9ETMTi+spg4ebIXHBQBSLcxIp6QKlrY3k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739273724; c=relaxed/simple; bh=MRskLbSJfBiEYUcUxP8fMaOrf3iEcQkbNAYkQa5RPeU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=NQIkEw7TkefwQIwKIfJFt8g4D4/eA/EzqqOcidd8nQKf4zwYtD8IZgAno1jFhETdZ6WjjZT8T7g6b77qs89FCAi1SfNnUCJOQi0iA3E3B1TUpQCzVkqYfD80HVDcKqTD5Qb0vEoHKGTpUu3o9EztZzcdeVudY0ei4RwemPLanlU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=LM3xOytA; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="LM3xOytA" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1739273721; bh=MRskLbSJfBiEYUcUxP8fMaOrf3iEcQkbNAYkQa5RPeU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LM3xOytABQPj6H1so4mSNa4Oc9FwEyrWQvCOUz3C9ZoJyu3p0nHwxmT2KUi3cfdg0 /4MSl7FVN2C3cQ9SCnBatclYmuJ+Z6lQsoYeKwEgKcQcAl1SZ4W4r7D8m3N+ZIhBvK po7p2ryTuQCiHQpbPe8vo2grVGeqQPjJuv2ZPJ74U+tzl1HSjukIT7WDPc6umHq7vD 3UwKyvyMMJ2HnJODI7ALSYG/tHT3bxNf6Rp3VHnUhVIcFApCXrU75VgDilb1JTmF0s 3Sm20KTwkQ6DjIft+KI5BkQ408JH192iDSLuqfuhaaRzPbVcy2j7swSovxCCwfAbUN wbFs1TI29hNGA== Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by bali.collaboradmins.com (Postfix) with ESMTPSA id DD5B117E1558; Tue, 11 Feb 2025 12:35:19 +0100 (CET) From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, ck.hu@mediatek.com, jitao.shi@mediatek.com, jie.qiu@mediatek.com, junzhi.zhao@mediatek.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, dmitry.baryshkov@linaro.org, lewis.liao@mediatek.com, ives.chenjh@mediatek.com, tommyyl.chen@mediatek.com, jason-jh.lin@mediatek.com Subject: [PATCH v6 41/42] drm/mediatek: mtk_hdmi_v2: Add debugfs ops and implement ABIST Date: Tue, 11 Feb 2025 12:34:08 +0100 Message-ID: <20250211113409.1517534-42-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250211113409.1517534-1-angelogioacchino.delregno@collabora.com> References: <20250211113409.1517534-1-angelogioacchino.delregno@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Implement the Automated Built-In Self-Test ABIST functionality provided by the HDMIv2 IP and expose it through the "hdmi_abist" debugfs file. Write "1" to this file to activate ABIST, or "0" to deactivate. Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_hdmi_v2.c | 123 +++++++++++++++++++++++++ 1 file changed, 123 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c b/drivers/gpu/drm/media= tek/mtk_hdmi_v2.c index 36b7f8d8d218..f4a086b92dae 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c @@ -1170,6 +1170,128 @@ static int mtk_hdmi_v2_hdmi_write_infoframe(struct = drm_bridge *bridge, return 0; } =20 +static int mtk_hdmi_v2_set_abist(struct mtk_hdmi *hdmi, bool enable) +{ + struct drm_display_mode *mode =3D &hdmi->mode; + int abist_format =3D -EINVAL; + bool interlaced; + + if (!enable) { + regmap_clear_bits(hdmi->regs, TOP_CFG00, HDMI_ABIST_ENABLE); + return 0; + } + + if (!mode->hdisplay || !mode->vdisplay) + return -EINVAL; + + interlaced =3D mode->flags & DRM_MODE_FLAG_INTERLACE; + + switch (mode->hdisplay) { + case 720: + if (mode->vdisplay =3D=3D 480) + abist_format =3D 2; + else if (mode->vdisplay =3D=3D 576) + abist_format =3D 11; + break; + case 1280: + if (mode->vdisplay =3D=3D 720) + abist_format =3D 3; + break; + case 1440: + if (mode->vdisplay =3D=3D 480) + abist_format =3D interlaced ? 5 : 9; + else if (mode->vdisplay =3D=3D 576) + abist_format =3D interlaced ? 14 : 18; + break; + case 1920: + if (mode->vdisplay =3D=3D 1080) + abist_format =3D interlaced ? 4 : 10; + break; + case 3840: + if (mode->vdisplay =3D=3D 2160) + abist_format =3D 25; + break; + case 4096: + if (mode->vdisplay =3D=3D 2160) + abist_format =3D 26; + break; + default: + break; + } + if (!abist_format) + return -EINVAL; + + regmap_update_bits(hdmi->regs, TOP_CFG00, HDMI_ABIST_VIDEO_FORMAT, + FIELD_PREP(HDMI_ABIST_VIDEO_FORMAT, abist_format)); + regmap_set_bits(hdmi->regs, TOP_CFG00, HDMI_ABIST_ENABLE); + return 0; +} + +static int mtk_hdmi_v2_debug_abist_show(struct seq_file *m, void *arg) +{ + struct mtk_hdmi *hdmi =3D m->private; + bool en; + u32 val; + int ret; + + if (!hdmi) + return -EINVAL; + + ret =3D regmap_read(hdmi->regs, TOP_CFG00, &val); + if (ret) + return ret; + + en =3D FIELD_GET(HDMI_ABIST_ENABLE, val); + + seq_printf(m, "HDMI Automated Built-In Self Test: %s\n", + en ? "Enabled" : "Disabled"); + + return 0; +} + +static ssize_t mtk_hdmi_v2_debug_abist_write(struct file *file, + const char __user *ubuf, + size_t len, loff_t *offp) +{ + struct seq_file *m =3D file->private_data; + int ret; + u32 en; + + if (!m || !m->private || *offp) + return -EINVAL; + + ret =3D kstrtouint_from_user(ubuf, len, 0, &en); + if (ret) + return ret; + + if (en < 0 || en > 1) + return -EINVAL; + + mtk_hdmi_v2_set_abist((struct mtk_hdmi *)m->private, en); + return len; +} + +static int mtk_hdmi_v2_debug_abist_open(struct inode *inode, struct file *= file) +{ + return single_open(file, mtk_hdmi_v2_debug_abist_show, inode->i_private); +} + +static const struct file_operations mtk_hdmi_debug_abist_fops =3D { + .owner =3D THIS_MODULE, + .open =3D mtk_hdmi_v2_debug_abist_open, + .read =3D seq_read, + .write =3D mtk_hdmi_v2_debug_abist_write, + .llseek =3D seq_lseek, + .release =3D single_release, +}; + +static void mtk_hdmi_v2_debugfs_init(struct drm_bridge *bridge, struct den= try *root) +{ + struct mtk_hdmi *dpi =3D hdmi_ctx_from_bridge(bridge); + + debugfs_create_file("hdmi_abist", 0640, root, dpi, &mtk_hdmi_debug_abist_= fops); +} + static const struct drm_bridge_funcs mtk_v2_hdmi_bridge_funcs =3D { .attach =3D mtk_hdmi_v2_bridge_attach, .detach =3D mtk_hdmi_v2_bridge_detach, @@ -1189,6 +1311,7 @@ static const struct drm_bridge_funcs mtk_v2_hdmi_brid= ge_funcs =3D { .hdmi_tmds_char_rate_valid =3D mtk_hdmi_v2_hdmi_tmds_char_rate_valid, .hdmi_clear_infoframe =3D mtk_hdmi_v2_hdmi_clear_infoframe, .hdmi_write_infoframe =3D mtk_hdmi_v2_hdmi_write_infoframe, + .debugfs_init =3D mtk_hdmi_v2_debugfs_init, }; =20 /* --=20 2.48.1