From nobody Thu Dec 18 10:24:05 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B7B725E466; Tue, 11 Feb 2025 11:35:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739273723; cv=none; b=BP5xgxndzNgUiDSamr+/RBM46xbeph19UWLUDZ70NSjd5NlWF8Sdw33jeeBM8AU6KY2s5kYsumCNmsOpSQohhSnk1gU4f/2h/CfcYbbTPcKqlUHOZrz5xkRUecJ3iIzVQA7ffyPLaTqzvmZM994H46htPKSlN/zX9wINcdMObAk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739273723; c=relaxed/simple; bh=w0yrFzDUVgcK+AfqU3lxAXZTZBsoLeZfdz2TO6KkcTM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pZvMlNyHMGZ80uqGziCOZ6aWroUnIKhXtqKo9pNGHppMZcH8JJO+Z+c++Cm93xRgJZrGGk0xUp2oblhiu0r/nYP5NGJGnuBgIn4s2s5pCgKQQz0Ei/mD5UPBE16i05B6x0x9yMy+dth2518/Z2MKl943NsXIcx3WDce1FJM0gIQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=Va0t7TwP; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="Va0t7TwP" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1739273719; bh=w0yrFzDUVgcK+AfqU3lxAXZTZBsoLeZfdz2TO6KkcTM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Va0t7TwPn0ux+H/h4ncXbAdsSJjgXgQKf6cebqOfhZse77ZkOl3HfKgzzxgRu8S8f jGKrJ7x1qmz1VBdnsY8S9R2vSQdUWGlWrlAADc/DWYD1ZRpNSGl7LgdUja6n2uDpPq w6R2sw4WfN7v/Q+NHopZzlR/ke5P9tLMFGKot+CO7QFtaqSZEyln2+y/IgD49H08Dm Mw6/GvCuF6wMNQpvZw/LXfun21BuZ4Lfswb1QHal6svIy4OhcBXSDK4ft7rjFWDfx2 UrThn1/B5Q/OCQvkJnu7kL/aorm6c6m1suBRRWo4lxA4rlLF0fQbdl6XpNaCWdD9Ya 3xQrnawmZTJOA== Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by bali.collaboradmins.com (Postfix) with ESMTPSA id 68C8317E1556; Tue, 11 Feb 2025 12:35:18 +0100 (CET) From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, ck.hu@mediatek.com, jitao.shi@mediatek.com, jie.qiu@mediatek.com, junzhi.zhao@mediatek.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, dmitry.baryshkov@linaro.org, lewis.liao@mediatek.com, ives.chenjh@mediatek.com, tommyyl.chen@mediatek.com, jason-jh.lin@mediatek.com Subject: [PATCH v6 40/42] drm/mediatek: mtk_hdmi_common: Add var to enable interlaced modes Date: Tue, 11 Feb 2025 12:34:07 +0100 Message-ID: <20250211113409.1517534-41-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250211113409.1517534-1-angelogioacchino.delregno@collabora.com> References: <20250211113409.1517534-1-angelogioacchino.delregno@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add an interlace_allowed bool member to struct mtk_hdmi_ver_conf which will be used to signal whether interlaced modes are supported by the bridge (in our case, the HDMI IP), and enable it for HDMIv2. Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_hdmi_common.c | 1 + drivers/gpu/drm/mediatek/mtk_hdmi_common.h | 1 + drivers/gpu/drm/mediatek/mtk_hdmi_v2.c | 1 + 3 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_common.c b/drivers/gpu/drm/m= ediatek/mtk_hdmi_common.c index 2f2e77b664a2..750bcb45c33d 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_common.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_common.c @@ -429,6 +429,7 @@ struct mtk_hdmi *mtk_hdmi_common_probe(struct platform_= device *pdev) hdmi->bridge.ddc =3D hdmi->ddc_adpt; hdmi->bridge.vendor =3D "MediaTek"; hdmi->bridge.product =3D "On-Chip HDMI"; + hdmi->bridge.interlace_allowed =3D ver_conf->interlace_allowed; =20 ret =3D devm_drm_bridge_add(dev, &hdmi->bridge); if (ret) diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_common.h b/drivers/gpu/drm/m= ediatek/mtk_hdmi_common.h index e74fe1371324..de5e064585f8 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_common.h +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_common.h @@ -137,6 +137,7 @@ struct mtk_hdmi_ver_conf { const struct hdmi_codec_ops *codec_ops; const char * const *mtk_hdmi_clock_names; int num_clocks; + bool interlace_allowed; }; =20 struct mtk_hdmi_conf { diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c b/drivers/gpu/drm/media= tek/mtk_hdmi_v2.c index 338a6dda2fd2..36b7f8d8d218 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c @@ -1292,6 +1292,7 @@ static const struct mtk_hdmi_ver_conf mtk_hdmi_conf_v= 2 =3D { .codec_ops =3D &mtk_hdmi_v2_audio_codec_ops, .mtk_hdmi_clock_names =3D mtk_hdmi_v2_clk_names, .num_clocks =3D MTK_HDMI_V2_CLK_COUNT, + .interlace_allowed =3D true, }; =20 static const struct mtk_hdmi_conf mtk_hdmi_conf_mt8188 =3D { --=20 2.48.1