From nobody Thu Dec 18 10:01:41 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 06F342206AD; Tue, 11 Feb 2025 11:34:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739273678; cv=none; b=A+8aYxKYHj9ANvNGd/4MkBtkmz/wgTKS+EUTQgjIrozMUQAfhslfK67iZ6fTdCNydptYioGNBLmROZpgel8DBymkHIbBhU6MQ0F6WBjjHk9Kbim+9w8mp70FNWaqT/oVwYMyDMiKAaQyexghXvqRx+NJaELXWghsKyTaYgC1b1E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739273678; c=relaxed/simple; bh=GR4JgfKdms8BHj/qOa5CGx5NpAK9n4ncT+0l8gLtOgA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ddaluBxzskoWzhNTGvX5TU9x/jeyXqWCslIfY441CbbWxRXmOVq/L54vBFmb3uOUpedY32r4c9IWgkQE9TlngpPWzqLOmVsjtts2oXH4gzN0MXHS9R7MjDyRlmJpchI5ukuFPlQz3jE8G1zXGIX6NZqVHZxtK5Ep9MmOd22SZ4A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=iR1ly+WG; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="iR1ly+WG" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1739273675; bh=GR4JgfKdms8BHj/qOa5CGx5NpAK9n4ncT+0l8gLtOgA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iR1ly+WGsbvue8COtzMGjnWfQVfTeoWHWYCvtshh68ZhLbk35Y6IB2q5ww7HtCjSE 5CEJgXqfsC/jJYx8bQzNLv5aOEFg1tFOL5APcr7tBiXtswBlVl6+GV5k0cyKY/B0ph shlCUCNiiR+vKWhaoRCANRRD2PjSzxkXSecQRdjpKUm+sBnPn6CMtxMsNMxF8raZ4K UjQWrJKAwJ8EIW5Gp2Yueb6KCFG5sbhnxTYHzpPWZcKw+5N9J7gc7DRgWHvCgapctj P/JK37vi7fqQAwKqRDPp2rCtOjE34e0W27KNXTZf4G+PZ/+ynzdF3SeA2a2EV8g6Sj cTxqP4NdQwP/w== Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by bali.collaboradmins.com (Postfix) with ESMTPSA id 147A017E1556; Tue, 11 Feb 2025 12:34:34 +0100 (CET) From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, ck.hu@mediatek.com, jitao.shi@mediatek.com, jie.qiu@mediatek.com, junzhi.zhao@mediatek.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, dmitry.baryshkov@linaro.org, lewis.liao@mediatek.com, ives.chenjh@mediatek.com, tommyyl.chen@mediatek.com, jason-jh.lin@mediatek.com Subject: [PATCH v6 10/42] drm/mediatek: Add support for MT8195 Digital Parallel Interface Date: Tue, 11 Feb 2025 12:33:37 +0100 Message-ID: <20250211113409.1517534-11-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250211113409.1517534-1-angelogioacchino.delregno@collabora.com> References: <20250211113409.1517534-1-angelogioacchino.delregno@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for the DPI block found in the MT8195 and MT8188 SoCs. Inside of the SoC, this block is directly connected to the HDMI IP. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_dpi.c | 24 ++++++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 6 ++++++ drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++ 3 files changed, 32 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/= mtk_dpi.c index 67504eb874d2..e4b52ffc4414 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -1049,6 +1049,8 @@ static const struct mtk_dpi_factor dpi_factor_mt8195_= dp_intf[] =3D { { 70000 - 1, 4 }, { 200000 - 1, 2 }, { U32_MAX, 1 } }; =20 +static const struct mtk_dpi_factor dpi_factor_mt8195_dpi =3D { U32_MAX, 1 = }; + static const struct mtk_dpi_conf mt8173_conf =3D { .dpi_factor =3D dpi_factor_mt8173, .num_dpi_factor =3D ARRAY_SIZE(dpi_factor_mt8173), @@ -1141,6 +1143,27 @@ static const struct mtk_dpi_conf mt8192_conf =3D { .csc_enable_bit =3D CSC_ENABLE, }; =20 +static const struct mtk_dpi_conf mt8195_conf =3D { + .dpi_factor =3D &dpi_factor_mt8195_dpi, + .num_dpi_factor =3D 1, + .max_clock_khz =3D 594000, + .output_fmts =3D mt8183_output_fmts, + .num_output_fmts =3D ARRAY_SIZE(mt8183_output_fmts), + .pixels_per_iter =3D 1, + .is_ck_de_pol =3D true, + .swap_input_support =3D true, + .support_direct_pin =3D true, + .dimension_mask =3D HPW_MASK, + .hvsize_mask =3D HSIZE_MASK, + .channel_swap_shift =3D CH_SWAP, + .yuv422_en_bit =3D YUV422_EN, + .csc_enable_bit =3D CSC_ENABLE, + .input_2p_en_bit =3D DPI_INPUT_2P_EN, + .clocked_by_hdmi =3D true, + .input_2pixel =3D true, + .output_1pixel =3D true, +}; + static const struct mtk_dpi_conf mt8195_dpintf_conf =3D { .dpi_factor =3D dpi_factor_mt8195_dp_intf, .num_dpi_factor =3D ARRAY_SIZE(dpi_factor_mt8195_dp_intf), @@ -1245,6 +1268,7 @@ static const struct of_device_id mtk_dpi_of_ids[] =3D= { { .compatible =3D "mediatek,mt8188-dp-intf", .data =3D &mt8195_dpintf_con= f }, { .compatible =3D "mediatek,mt8192-dpi", .data =3D &mt8192_conf }, { .compatible =3D "mediatek,mt8195-dp-intf", .data =3D &mt8195_dpintf_con= f }, + { .compatible =3D "mediatek,mt8195-dpi", .data =3D &mt8195_conf }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, mtk_dpi_of_ids); diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h b/drivers/gpu/drm/medi= atek/mtk_dpi_regs.h index a0b1d18bbbf7..3c24d9e9f241 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h +++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h @@ -40,6 +40,12 @@ #define FAKE_DE_LEVEN BIT(21) #define FAKE_DE_RODD BIT(22) #define FAKE_DE_REVEN BIT(23) + +/* DPI_CON: DPI instances */ +#define DPI_OUTPUT_1T1P_EN BIT(24) +#define DPI_INPUT_2P_EN BIT(25) + +/* DPI_CON: DPINTF instances */ #define DPINTF_YUV422_EN BIT(24) #define DPINTF_CSC_ENABLE BIT(26) #define DPINTF_INPUT_2P_EN BIT(29) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/media= tek/mtk_drm_drv.c index f22ad2882697..772c3d0f5d14 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -810,6 +810,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = =3D { .data =3D (void *)MTK_DPI }, { .compatible =3D "mediatek,mt8195-dp-intf", .data =3D (void *)MTK_DP_INTF }, + { .compatible =3D "mediatek,mt8195-dpi", + .data =3D (void *)MTK_DPI }, { .compatible =3D "mediatek,mt2701-dsi", .data =3D (void *)MTK_DSI }, { .compatible =3D "mediatek,mt8173-dsi", --=20 2.48.1