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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21f368cf7fcsm88738405ad.249.2025.02.10.22.20.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Feb 2025 22:20:25 -0800 (PST) From: Jie Gan To: Suzuki K Poulose , Mike Leach , James Clark , Alexander Shishkin Cc: Tingwei Zhang , Jinlong Mao , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH] Coresight: Improve the method for passing through perf handle Date: Tue, 11 Feb 2025 14:20:21 +0800 Message-Id: <20250211062021.7013-1-jie.gan@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: 00x8zWgmMkoc5p6Kb5U9z-2grA4e_gjk X-Proofpoint-GUID: 00x8zWgmMkoc5p6Kb5U9z-2grA4e_gjk X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-11_02,2025-02-10_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 impostorscore=0 malwarescore=0 lowpriorityscore=0 phishscore=0 clxscore=1015 adultscore=0 bulkscore=0 mlxscore=0 spamscore=0 mlxlogscore=862 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502110036 Content-Type: text/plain; charset="utf-8" From: James Clark Currently, the perf handle is being passed to the sink device as a void parameter with additional type conversion. Improve the method for passing perf handle parameter to make the code more readable. Signed-off-by: James Clark Signed-off-by: Jie Gan --- prerequisite-message-id: <20250207064213.2314482-5-quic_jiegan@quicinc.com> --- drivers/hwtracing/coresight/coresight-core.c | 8 ++++---- drivers/hwtracing/coresight/coresight-dummy.c | 2 +- drivers/hwtracing/coresight/coresight-etb10.c | 7 +++---- drivers/hwtracing/coresight/coresight-priv.h | 2 +- drivers/hwtracing/coresight/coresight-tmc-etf.c | 8 ++++---- drivers/hwtracing/coresight/coresight-tmc-etr.c | 11 +++++------ drivers/hwtracing/coresight/coresight-tmc.h | 2 +- drivers/hwtracing/coresight/coresight-tpiu.c | 2 +- drivers/hwtracing/coresight/coresight-trbe.c | 3 +-- drivers/hwtracing/coresight/ultrasoc-smb.c | 7 +++---- include/linux/coresight.h | 2 +- 11 files changed, 25 insertions(+), 29 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtraci= ng/coresight/coresight-core.c index 3bdd6ebd4b6e..9246b46bdc3b 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -272,9 +272,9 @@ void coresight_add_helper(struct coresight_device *csde= v, EXPORT_SYMBOL_GPL(coresight_add_helper); =20 static int coresight_enable_sink(struct coresight_device *csdev, - enum cs_mode mode, void *data) + enum cs_mode mode, struct perf_output_handle *handle) { - return sink_ops(csdev)->enable(csdev, mode, data); + return sink_ops(csdev)->enable(csdev, mode, handle); } =20 static void coresight_disable_sink(struct coresight_device *csdev) @@ -448,7 +448,7 @@ static int coresight_enable_helpers(struct coresight_de= vice *csdev, } =20 int coresight_enable_path(struct coresight_path *path, enum cs_mode mode, - void *sink_data) + struct perf_output_handle *handle) { int ret =3D 0; u32 type; @@ -478,7 +478,7 @@ int coresight_enable_path(struct coresight_path *path, = enum cs_mode mode, =20 switch (type) { case CORESIGHT_DEV_TYPE_SINK: - ret =3D coresight_enable_sink(csdev, mode, sink_data); + ret =3D coresight_enable_sink(csdev, mode, handle); /* * Sink is the first component turned on. If we * failed to enable the sink, there are no components diff --git a/drivers/hwtracing/coresight/coresight-dummy.c b/drivers/hwtrac= ing/coresight/coresight-dummy.c index d9a811d44885..42de46949d73 100644 --- a/drivers/hwtracing/coresight/coresight-dummy.c +++ b/drivers/hwtracing/coresight/coresight-dummy.c @@ -51,7 +51,7 @@ static int dummy_source_trace_id(struct coresight_device = *csdev, __maybe_unused } =20 static int dummy_sink_enable(struct coresight_device *csdev, enum cs_mode = mode, - void *data) + struct perf_output_handle *handle) { dev_dbg(csdev->dev.parent, "Dummy sink enabled\n"); =20 diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtrac= ing/coresight/coresight-etb10.c index aea9ac9c4bd0..e373b0f590bf 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -167,13 +167,12 @@ static int etb_enable_sysfs(struct coresight_device *= csdev) return ret; } =20 -static int etb_enable_perf(struct coresight_device *csdev, void *data) +static int etb_enable_perf(struct coresight_device *csdev, struct perf_out= put_handle *handle) { int ret =3D 0; pid_t pid; unsigned long flags; struct etb_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); - struct perf_output_handle *handle =3D data; struct cs_buffers *buf =3D etm_perf_sink_config(handle); =20 spin_lock_irqsave(&drvdata->spinlock, flags); @@ -224,7 +223,7 @@ static int etb_enable_perf(struct coresight_device *csd= ev, void *data) } =20 static int etb_enable(struct coresight_device *csdev, enum cs_mode mode, - void *data) + struct perf_output_handle *handle) { int ret; =20 @@ -233,7 +232,7 @@ static int etb_enable(struct coresight_device *csdev, e= num cs_mode mode, ret =3D etb_enable_sysfs(csdev); break; case CS_MODE_PERF: - ret =3D etb_enable_perf(csdev, data); + ret =3D etb_enable_perf(csdev, handle); break; default: ret =3D -EINVAL; diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtraci= ng/coresight/coresight-priv.h index c10dd3643854..eca06a89843f 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -134,7 +134,7 @@ static inline void CS_UNLOCK(void __iomem *addr) =20 void coresight_disable_path(struct coresight_path *path); int coresight_enable_path(struct coresight_path *path, enum cs_mode mode, - void *sink_data); + struct perf_output_handle *handle); struct coresight_device *coresight_get_sink(struct coresight_path *path); struct coresight_device *coresight_get_sink_by_id(u32 id); struct coresight_device * diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtr= acing/coresight/coresight-tmc-etf.c index d4f641cd9de6..fdf1c2511d67 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -244,13 +244,13 @@ static int tmc_enable_etf_sink_sysfs(struct coresight= _device *csdev) return ret; } =20 -static int tmc_enable_etf_sink_perf(struct coresight_device *csdev, void *= data) +static int tmc_enable_etf_sink_perf(struct coresight_device *csdev, + struct perf_output_handle *handle) { int ret =3D 0; pid_t pid; unsigned long flags; struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); - struct perf_output_handle *handle =3D data; struct cs_buffers *buf =3D etm_perf_sink_config(handle); =20 spin_lock_irqsave(&drvdata->spinlock, flags); @@ -302,7 +302,7 @@ static int tmc_enable_etf_sink_perf(struct coresight_de= vice *csdev, void *data) } =20 static int tmc_enable_etf_sink(struct coresight_device *csdev, - enum cs_mode mode, void *data) + enum cs_mode mode, struct perf_output_handle *handle) { int ret; =20 @@ -311,7 +311,7 @@ static int tmc_enable_etf_sink(struct coresight_device = *csdev, ret =3D tmc_enable_etf_sink_sysfs(csdev); break; case CS_MODE_PERF: - ret =3D tmc_enable_etf_sink_perf(csdev, data); + ret =3D tmc_enable_etf_sink_perf(csdev, handle); break; /* We shouldn't be here */ default: diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtr= acing/coresight/coresight-tmc-etr.c index a48bb85d0e7f..2d0bd06bab2a 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1252,9 +1252,8 @@ static int tmc_enable_etr_sink_sysfs(struct coresight= _device *csdev) } =20 struct etr_buf *tmc_etr_get_buffer(struct coresight_device *csdev, - enum cs_mode mode, void *data) + enum cs_mode mode, struct perf_output_handle *handle) { - struct perf_output_handle *handle =3D data; struct etr_perf_buffer *etr_perf; =20 switch (mode) { @@ -1642,13 +1641,13 @@ tmc_update_etr_buffer(struct coresight_device *csde= v, return size; } =20 -static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, void *= data) +static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, + struct perf_output_handle *handle) { int rc =3D 0; pid_t pid; unsigned long flags; struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); - struct perf_output_handle *handle =3D data; struct etr_perf_buffer *etr_perf =3D etm_perf_sink_config(handle); =20 spin_lock_irqsave(&drvdata->spinlock, flags); @@ -1696,13 +1695,13 @@ static int tmc_enable_etr_sink_perf(struct coresigh= t_device *csdev, void *data) } =20 static int tmc_enable_etr_sink(struct coresight_device *csdev, - enum cs_mode mode, void *data) + enum cs_mode mode, struct perf_output_handle *handle) { switch (mode) { case CS_MODE_SYSFS: return tmc_enable_etr_sink_sysfs(csdev); case CS_MODE_PERF: - return tmc_enable_etr_sink_perf(csdev, data); + return tmc_enable_etr_sink_perf(csdev, handle); default: return -EINVAL; } diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracin= g/coresight/coresight-tmc.h index 2671926be62a..e991afd43742 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -336,7 +336,7 @@ struct coresight_device *tmc_etr_get_catu_device(struct= tmc_drvdata *drvdata); void tmc_etr_set_catu_ops(const struct etr_buf_operations *catu); void tmc_etr_remove_catu_ops(void); struct etr_buf *tmc_etr_get_buffer(struct coresight_device *csdev, - enum cs_mode mode, void *data); + enum cs_mode mode, struct perf_output_handle *handle); extern const struct attribute_group coresight_etr_group; =20 #endif diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtraci= ng/coresight/coresight-tpiu.c index 97ef36f03ec2..ccf463ac7bf5 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -75,7 +75,7 @@ static void tpiu_enable_hw(struct csdev_access *csa) } =20 static int tpiu_enable(struct coresight_device *csdev, enum cs_mode mode, - void *__unused) + struct perf_output_handle *__unused) { struct tpiu_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); =20 diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtraci= ng/coresight/coresight-trbe.c index fff67aac8418..a0914d10ed47 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.c +++ b/drivers/hwtracing/coresight/coresight-trbe.c @@ -1011,11 +1011,10 @@ static int __arm_trbe_enable(struct trbe_buf *buf, } =20 static int arm_trbe_enable(struct coresight_device *csdev, enum cs_mode mo= de, - void *data) + struct perf_output_handle *handle) { struct trbe_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); struct trbe_cpudata *cpudata =3D dev_get_drvdata(&csdev->dev); - struct perf_output_handle *handle =3D data; struct trbe_buf *buf =3D etm_perf_sink_config(handle); =20 WARN_ON(cpudata->cpu !=3D smp_processor_id()); diff --git a/drivers/hwtracing/coresight/ultrasoc-smb.c b/drivers/hwtracing= /coresight/ultrasoc-smb.c index dc3c9504dd7c..1574b5067206 100644 --- a/drivers/hwtracing/coresight/ultrasoc-smb.c +++ b/drivers/hwtracing/coresight/ultrasoc-smb.c @@ -213,10 +213,9 @@ static void smb_enable_sysfs(struct coresight_device *= csdev) coresight_set_mode(csdev, CS_MODE_SYSFS); } =20 -static int smb_enable_perf(struct coresight_device *csdev, void *data) +static int smb_enable_perf(struct coresight_device *csdev, struct perf_out= put_handle *handle) { struct smb_drv_data *drvdata =3D dev_get_drvdata(csdev->dev.parent); - struct perf_output_handle *handle =3D data; struct cs_buffers *buf =3D etm_perf_sink_config(handle); pid_t pid; =20 @@ -240,7 +239,7 @@ static int smb_enable_perf(struct coresight_device *csd= ev, void *data) } =20 static int smb_enable(struct coresight_device *csdev, enum cs_mode mode, - void *data) + struct perf_output_handle *handle) { struct smb_drv_data *drvdata =3D dev_get_drvdata(csdev->dev.parent); int ret =3D 0; @@ -261,7 +260,7 @@ static int smb_enable(struct coresight_device *csdev, e= num cs_mode mode, smb_enable_sysfs(csdev); break; case CS_MODE_PERF: - ret =3D smb_enable_perf(csdev, data); + ret =3D smb_enable_perf(csdev, handle); break; default: ret =3D -EINVAL; diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 55bb825d509e..937a8d4f815b 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -363,7 +363,7 @@ enum cs_mode { */ struct coresight_ops_sink { int (*enable)(struct coresight_device *csdev, enum cs_mode mode, - void *data); + struct perf_output_handle *handle); int (*disable)(struct coresight_device *csdev); void *(*alloc_buffer)(struct coresight_device *csdev, struct perf_event *event, void **pages, --=20 2.34.1