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([2a01:e0a:e17:9700:16d2:7456:6634:9626]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4394376118esm47541515e9.40.2025.02.10.13.36.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Feb 2025 13:36:21 -0800 (PST) From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= To: Paul Walmsley , Palmer Dabbelt , Anup Patel , Atish Patra , Shuah Khan , Jonathan Corbet , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Cc: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= , Samuel Holland Subject: [PATCH v2 14/15] RISC-V: KVM: add support for FWFT SBI extension Date: Mon, 10 Feb 2025 22:35:47 +0100 Message-ID: <20250210213549.1867704-15-cleger@rivosinc.com> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250210213549.1867704-1-cleger@rivosinc.com> References: <20250210213549.1867704-1-cleger@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Add basic infrastructure to support the FWFT extension in KVM. Signed-off-by: Cl=C3=A9ment L=C3=A9ger --- arch/riscv/include/asm/kvm_host.h | 4 + arch/riscv/include/asm/kvm_vcpu_sbi.h | 1 + arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h | 37 ++++ arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kvm/Makefile | 1 + arch/riscv/kvm/vcpu_sbi.c | 4 + arch/riscv/kvm/vcpu_sbi_fwft.c | 187 +++++++++++++++++++++ 7 files changed, 235 insertions(+) create mode 100644 arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h create mode 100644 arch/riscv/kvm/vcpu_sbi_fwft.c diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm= _host.h index bb93d2995ea2..c0db61ba691a 100644 --- a/arch/riscv/include/asm/kvm_host.h +++ b/arch/riscv/include/asm/kvm_host.h @@ -19,6 +19,7 @@ #include #include #include +#include #include #include =20 @@ -281,6 +282,9 @@ struct kvm_vcpu_arch { /* Performance monitoring context */ struct kvm_pmu pmu_context; =20 + /* Firmware feature SBI extension context */ + struct kvm_sbi_fwft fwft_context; + /* 'static' configurations which are set only once */ struct kvm_vcpu_config cfg; =20 diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm= /kvm_vcpu_sbi.h index cb68b3a57c8f..ffd03fed0c06 100644 --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h @@ -98,6 +98,7 @@ extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_h= sm; extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_dbcn; extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_susp; extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_sta; +extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_fwft; extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_experimental; extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_vendor; =20 diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h b/arch/riscv/includ= e/asm/kvm_vcpu_sbi_fwft.h new file mode 100644 index 000000000000..5782517f6e08 --- /dev/null +++ b/arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2025 Rivos Inc. + * + * Authors: + * Cl=C3=A9ment L=C3=A9ger + */ + +#ifndef __KVM_VCPU_RISCV_FWFT_H +#define __KVM_VCPU_RISCV_FWFT_H + +#include + +struct kvm_sbi_fwft_config; +struct kvm_vcpu; + +struct kvm_sbi_fwft_feature { + enum sbi_fwft_feature_t id; + bool (*supported)(struct kvm_vcpu *vcpu); + int (*set)(struct kvm_vcpu *vcpu, struct kvm_sbi_fwft_config *conf, unsig= ned long value); + int (*get)(struct kvm_vcpu *vcpu, struct kvm_sbi_fwft_config *conf, unsig= ned long *value); +}; + +struct kvm_sbi_fwft_config { + const struct kvm_sbi_fwft_feature *feature; + bool supported; + unsigned long flags; +}; + +/* FWFT data structure per vcpu */ +struct kvm_sbi_fwft { + struct kvm_sbi_fwft_config *configs; +}; + +#define vcpu_to_fwft(vcpu) (&(vcpu)->arch.fwft_context) + +#endif /* !__KVM_VCPU_RISCV_FWFT_H */ diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/as= m/kvm.h index f06bc5efcd79..fa6eee1caf41 100644 --- a/arch/riscv/include/uapi/asm/kvm.h +++ b/arch/riscv/include/uapi/asm/kvm.h @@ -202,6 +202,7 @@ enum KVM_RISCV_SBI_EXT_ID { KVM_RISCV_SBI_EXT_DBCN, KVM_RISCV_SBI_EXT_STA, KVM_RISCV_SBI_EXT_SUSP, + KVM_RISCV_SBI_EXT_FWFT, KVM_RISCV_SBI_EXT_MAX, }; =20 diff --git a/arch/riscv/kvm/Makefile b/arch/riscv/kvm/Makefile index 4e0bba91d284..06e2d52a9b88 100644 --- a/arch/riscv/kvm/Makefile +++ b/arch/riscv/kvm/Makefile @@ -26,6 +26,7 @@ kvm-y +=3D vcpu_onereg.o kvm-$(CONFIG_RISCV_PMU_SBI) +=3D vcpu_pmu.o kvm-y +=3D vcpu_sbi.o kvm-y +=3D vcpu_sbi_base.o +kvm-y +=3D vcpu_sbi_fwft.o kvm-y +=3D vcpu_sbi_hsm.o kvm-$(CONFIG_RISCV_PMU_SBI) +=3D vcpu_sbi_pmu.o kvm-y +=3D vcpu_sbi_replace.o diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c index f81f06f82650..3b37deaed4e7 100644 --- a/arch/riscv/kvm/vcpu_sbi.c +++ b/arch/riscv/kvm/vcpu_sbi.c @@ -78,6 +78,10 @@ static const struct kvm_riscv_sbi_extension_entry sbi_ex= t[] =3D { .ext_idx =3D KVM_RISCV_SBI_EXT_STA, .ext_ptr =3D &vcpu_sbi_ext_sta, }, + { + .ext_idx =3D KVM_RISCV_SBI_EXT_FWFT, + .ext_ptr =3D &vcpu_sbi_ext_fwft, + }, { .ext_idx =3D KVM_RISCV_SBI_EXT_EXPERIMENTAL, .ext_ptr =3D &vcpu_sbi_ext_experimental, diff --git a/arch/riscv/kvm/vcpu_sbi_fwft.c b/arch/riscv/kvm/vcpu_sbi_fwft.c new file mode 100644 index 000000000000..fe608bf16558 --- /dev/null +++ b/arch/riscv/kvm/vcpu_sbi_fwft.c @@ -0,0 +1,187 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2025 Rivos Inc. + * + * Authors: + * Cl=C3=A9ment L=C3=A9ger + */ + +#include +#include +#include +#include +#include +#include +#include + +static const enum sbi_fwft_feature_t kvm_fwft_defined_features[] =3D { + SBI_FWFT_MISALIGNED_EXC_DELEG, + SBI_FWFT_LANDING_PAD, + SBI_FWFT_SHADOW_STACK, + SBI_FWFT_DOUBLE_TRAP, + SBI_FWFT_PTE_AD_HW_UPDATING, + SBI_FWFT_POINTER_MASKING_PMLEN, +}; + +static bool kvm_fwft_is_defined_feature(enum sbi_fwft_feature_t feature) +{ + int i; + + for (i =3D 0; i < ARRAY_SIZE(kvm_fwft_defined_features); i++) { + if (kvm_fwft_defined_features[i] =3D=3D feature) + return true; + } + + return false; +} + +static const struct kvm_sbi_fwft_feature features[] =3D { +}; + +static struct kvm_sbi_fwft_config * +kvm_sbi_fwft_get_config(struct kvm_vcpu *vcpu, enum sbi_fwft_feature_t fea= ture) +{ + int i =3D 0; + struct kvm_sbi_fwft *fwft =3D vcpu_to_fwft(vcpu); + + for (i =3D 0; i < ARRAY_SIZE(features); i++) { + if (fwft->configs[i].feature->id =3D=3D feature) + return &fwft->configs[i]; + } + + return NULL; +} + +static int kvm_fwft_get_feature(struct kvm_vcpu *vcpu, unsigned long featu= re, + struct kvm_sbi_fwft_config **conf) +{ + struct kvm_sbi_fwft_config *tconf; + + /* Feature are defined as 32 bits identifiers */ + if (feature & ~(BIT_ULL(32) - 1)) + return SBI_ERR_INVALID_PARAM; + + tconf =3D kvm_sbi_fwft_get_config(vcpu, feature); + if (!tconf) { + if (kvm_fwft_is_defined_feature(feature)) + return SBI_ERR_NOT_SUPPORTED; + + return SBI_ERR_DENIED; + } + + if (!tconf->supported) + return SBI_ERR_NOT_SUPPORTED; + + *conf =3D tconf; + + return SBI_SUCCESS; +} + +static int kvm_sbi_fwft_set(struct kvm_vcpu *vcpu, unsigned long feature, + unsigned long value, unsigned long flags) +{ + int ret; + struct kvm_sbi_fwft_config *conf; + + ret =3D kvm_fwft_get_feature(vcpu, feature, &conf); + if (ret) + return ret; + + if ((flags & ~SBI_FWFT_SET_FLAG_LOCK) !=3D 0) + return SBI_ERR_INVALID_PARAM; + + if (conf->flags & SBI_FWFT_SET_FLAG_LOCK) + return SBI_ERR_DENIED_LOCKED; + + conf->flags =3D flags; + + return conf->feature->set(vcpu, conf, value); +} + +static int kvm_sbi_fwft_get(struct kvm_vcpu *vcpu, unsigned long feature, + unsigned long *value) +{ + int ret; + struct kvm_sbi_fwft_config *conf; + + ret =3D kvm_fwft_get_feature(vcpu, feature, &conf); + if (ret) + return ret; + + return conf->feature->get(vcpu, conf, value); +} + +static int kvm_sbi_ext_fwft_handler(struct kvm_vcpu *vcpu, struct kvm_run = *run, + struct kvm_vcpu_sbi_return *retdata) +{ + int ret =3D 0; + struct kvm_cpu_context *cp =3D &vcpu->arch.guest_context; + unsigned long funcid =3D cp->a6; + + switch (funcid) { + case SBI_EXT_FWFT_SET: + ret =3D kvm_sbi_fwft_set(vcpu, cp->a0, cp->a1, cp->a2); + break; + case SBI_EXT_FWFT_GET: + ret =3D kvm_sbi_fwft_get(vcpu, cp->a0, &retdata->out_val); + break; + default: + ret =3D SBI_ERR_NOT_SUPPORTED; + break; + } + + retdata->err_val =3D ret; + + return 0; +} + +static int kvm_sbi_ext_fwft_init(struct kvm_vcpu *vcpu) +{ + struct kvm_sbi_fwft *fwft =3D vcpu_to_fwft(vcpu); + const struct kvm_sbi_fwft_feature *feature; + struct kvm_sbi_fwft_config *conf; + int i; + + fwft->configs =3D kcalloc(ARRAY_SIZE(features), sizeof(struct kvm_sbi_fwf= t_config), + GFP_KERNEL); + if (!fwft->configs) + return -ENOMEM; + + for (i =3D 0; i < ARRAY_SIZE(features); i++) { + feature =3D &features[i]; + conf =3D &fwft->configs[i]; + if (feature->supported) + conf->supported =3D feature->supported(vcpu); + else + conf->supported =3D true; + + conf->feature =3D feature; + } + + return 0; +} + +static void kvm_sbi_ext_fwft_deinit(struct kvm_vcpu *vcpu) +{ + struct kvm_sbi_fwft *fwft =3D vcpu_to_fwft(vcpu); + + kfree(fwft->configs); +} + +static void kvm_sbi_ext_fwft_reset(struct kvm_vcpu *vcpu) +{ + int i =3D 0; + struct kvm_sbi_fwft *fwft =3D vcpu_to_fwft(vcpu); + + for (i =3D 0; i < ARRAY_SIZE(features); i++) + fwft->configs[i].flags =3D 0; +} + +const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_fwft =3D { + .extid_start =3D SBI_EXT_FWFT, + .extid_end =3D SBI_EXT_FWFT, + .handler =3D kvm_sbi_ext_fwft_handler, + .init =3D kvm_sbi_ext_fwft_init, + .deinit =3D kvm_sbi_ext_fwft_deinit, + .reset =3D kvm_sbi_ext_fwft_reset, +}; --=20 2.47.2