From nobody Mon Feb 9 15:50:32 2026 Received: from mail.thorsis.com (mail.thorsis.com [217.92.40.78]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B2533222575; Mon, 10 Feb 2025 16:45:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.92.40.78 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739205949; cv=none; b=sthyqoo5+qAIaxZhITFJ9foJQehuo4K+6+EDJlUFiUG5h0QrJzL82jLkbO/S3ItD6dl7GjtbvWINWpFWSj94ADQSBJk74ySWd48n3Xzl88KFygh7jw78btJp3l9WQldwiVRb5krEcODxpAL0nDCouODCUKDFO1J45TOpkbv9x14= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739205949; c=relaxed/simple; bh=8DxD0g1D7UvJQhlM+gdbyNAf5AQkwySPboNWSreF2Sg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Npo01xTfR+YNzlQwL7dGshqKfwhlnLUJ9FyiwvKSI/JonuYtQF8cbOMAM8j5FrbbAIl5/A/1Fj3Ail1f/vRutww7fQabbjXRzLhaSQGpEr+JuASfJWP6m7sUPoNAoJ2xhx4s4osn9PmOgaKxLHHNQlSOLEuJCqGfIaI3VfhQWqo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=thorsis.com; spf=pass smtp.mailfrom=thorsis.com; dkim=pass (2048-bit key) header.d=thorsis.com header.i=@thorsis.com header.b=gqxwCj6n; arc=none smtp.client-ip=217.92.40.78 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=thorsis.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=thorsis.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=thorsis.com header.i=@thorsis.com header.b="gqxwCj6n" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 7D6221480316; Mon, 10 Feb 2025 17:45:45 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=thorsis.com; s=dkim; t=1739205945; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vZsDtBbNTPdOOIKQhPF/5tyxBSQNXhxrVIA8sfG14DQ=; b=gqxwCj6nzhhpK4oe02YY1gXNTd42nHtNyKQpHuYFPMMnyy2Yqc6rV1jDvv7fm0ErmFVX3q S5rSotWYs/EqlMH8uSLQ5qDg02DpveFtZAXhYxTQIZgBjIhJnjHPoWc1myo4saecEEadx0 uKbqzsuaz07v+s6b6lR4A1g/goZSryZ6KEJuHJDT1gDnv+pZ1aBpT+wHBlg4V2aYN6CZnX 9Q1erZ4LKVLhGdrtir+8ofoIkhefoAo3TwXvXL2gmgj40VsqfleZ/+JMzRACcJKnAimdVa pa8bs45er6dItkBl9Jrdr/b3w6bGu82noMwjzozgNofPqyriBTmR2xx1GuVo2w== From: Alexander Dahl To: Claudiu Beznea Cc: Nicolas Ferre , Ryan Wanner , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Turquette , Stephen Boyd , Alexandre Belloni , Varshini Rajendran , Ryan Wanner Subject: [PATCH v2 06/16] clk: at91: Add peripheral id for OTPC Date: Mon, 10 Feb 2025 17:44:56 +0100 Message-Id: <20250210164506.495747-7-ada@thorsis.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250210164506.495747-1-ada@thorsis.com> References: <20250210164506.495747-1-ada@thorsis.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" That peripheral clock is required for proper OTPC function. Link: https://lore.kernel.org/linux-clk/ec34efc2-2051-4b8a-b5d8-6e2fd5e08c2= 8@microchip.com/T/#u Signed-off-by: Alexander Dahl --- Notes: v2: - new patch in series, was not present in v1 drivers/clk/at91/sam9x60.c | 1 + drivers/clk/at91/sam9x7.c | 1 + drivers/clk/at91/sama7d65.c | 1 + drivers/clk/at91/sama7g5.c | 1 + 4 files changed, 4 insertions(+) diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c index 58a5b6c4473da..ce0f73125e87c 100644 --- a/drivers/clk/at91/sam9x60.c +++ b/drivers/clk/at91/sam9x60.c @@ -144,6 +144,7 @@ static const struct { { .n =3D "isi_clk", .id =3D 43, }, { .n =3D "pioD_clk", .id =3D 44, }, { .n =3D "tcb1_clk", .id =3D 45, }, + { .n =3D "otpc_clk", .id =3D 46, }, { .n =3D "dbgu_clk", .id =3D 47, }, /* * mpddr_clk feeds DDR controller and is enabled by bootloader thus we diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c index 8a2955d1f67c6..7278b9d15d0cf 100644 --- a/drivers/clk/at91/sam9x7.c +++ b/drivers/clk/at91/sam9x7.c @@ -402,6 +402,7 @@ static const struct { { .n =3D "isi_clk", .id =3D 43, }, { .n =3D "pioD_clk", .id =3D 44, }, { .n =3D "tcb1_clk", .id =3D 45, }, + { .n =3D "otpc_clk", .id =3D 46, }, { .n =3D "dbgu_clk", .id =3D 47, }, /* * mpddr_clk feeds DDR controller and is enabled by bootloader thus we diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c index eaddb154c4381..19613e587d5b9 100644 --- a/drivers/clk/at91/sama7d65.c +++ b/drivers/clk/at91/sama7d65.c @@ -637,6 +637,7 @@ static struct { { .n =3D "mcan2_clk", .p =3D PCK_PARENT_HW_MCK5, .id =3D 60, .r =3D { .ma= x =3D 200000000, }, }, { .n =3D "mcan3_clk", .p =3D PCK_PARENT_HW_MCK5, .id =3D 61, .r =3D { .ma= x =3D 200000000, }, }, { .n =3D "mcan4_clk", .p =3D PCK_PARENT_HW_MCK5, .id =3D 62, .r =3D { .ma= x =3D 200000000, }, }, + { .n =3D "otpc_clk", .p =3D PCK_PARENT_HW_MCK0, .id =3D 63, }, { .n =3D "pdmc0_clk", .p =3D PCK_PARENT_HW_MCK9, .id =3D 64, .r =3D { .ma= x =3D 200000000, }, }, { .n =3D "pdmc1_clk", .p =3D PCK_PARENT_HW_MCK9, .id =3D 65, .r =3D { .ma= x =3D 200000000, }, }, { .n =3D "pit64b0_clk", .p =3D PCK_PARENT_HW_MCK7, .id =3D 66, }, diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index e6d5739371a76..5147d8f34a3be 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -502,6 +502,7 @@ static struct { { .n =3D "mcan3_clk", .p =3D PCK_PARENT_HW_MCK1, .id =3D 64, .r =3D { .ma= x =3D 200000000, }, }, { .n =3D "mcan4_clk", .p =3D PCK_PARENT_HW_MCK1, .id =3D 65, .r =3D { .ma= x =3D 200000000, }, }, { .n =3D "mcan5_clk", .p =3D PCK_PARENT_HW_MCK1, .id =3D 66, .r =3D { .ma= x =3D 200000000, }, }, + { .n =3D "otpc_clk", .p =3D PCK_PARENT_HW_MCK0, .id =3D 67, }, { .n =3D "pdmc0_clk", .p =3D PCK_PARENT_HW_MCK1, .id =3D 68, .r =3D { .ma= x =3D 200000000, }, }, { .n =3D "pdmc1_clk", .p =3D PCK_PARENT_HW_MCK1, .id =3D 69, .r =3D { .ma= x =3D 200000000, }, }, { .n =3D "pit64b0_clk", .p =3D PCK_PARENT_HW_MCK1, .id =3D 70, }, --=20 2.39.5