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[87.8.15.130]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4391dc9ffcdsm146637945e9.15.2025.02.10.08.12.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Feb 2025 08:12:46 -0800 (PST) From: Angelo Dureghello X-Google-Original-From: Angelo Dureghello Date: Mon, 10 Feb 2025 17:10:51 +0100 Subject: [PATCH v4 1/9] dt-bindings: iio: dac: adi-axi-adc: add ad7606 variant Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250210-wip-bl-ad7606_add_backend_sw_mode-v4-1-160df18b1da7@baylibre.com> References: <20250210-wip-bl-ad7606_add_backend_sw_mode-v4-0-160df18b1da7@baylibre.com> In-Reply-To: <20250210-wip-bl-ad7606_add_backend_sw_mode-v4-0-160df18b1da7@baylibre.com> To: Michael Hennerich , Lars-Peter Clausen , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexandru Ardelean , David Lechner Cc: Jonathan Cameron , linux-fbdev@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Guillaume Stols , Angelo Dureghello X-Mailer: b4 0.14.1 From: Guillaume Stols A new compatible is added to reflect the specialized version of the HDL. We use the parallel interface to write the ADC's registers, and accessing this interface requires to use ADI_AXI_REG_CONFIG_RD, ADI_AXI_REG_CONFIG_WR and ADI_AXI_REG_CONFIG_CTRL in a custom fashion. Reviewed-by: Rob Herring (Arm) Signed-off-by: Guillaume Stols Co-developed-by: Angelo Dureghello Signed-off-by: Angelo Dureghello --- .../devicetree/bindings/iio/adc/adi,axi-adc.yaml | 70 ++++++++++++++++++= +++- 1 file changed, 69 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml b/D= ocumentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml index e1f450b80db2..4fa82dcf6fc9 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml @@ -17,13 +17,23 @@ description: | interface for the actual ADC, while this IP core will interface to the data-lines of the ADC and handle the streaming of data into memory via DMA. + In some cases, the AXI ADC interface is used to perform specialized + operation to a particular ADC, e.g access the physical bus through + specific registers to write ADC registers. + In this case, we use a different compatible which indicates the target + IP core's name. + The following IP is currently supported: + - AXI AD7606x: specialized version of the IP core for all the chips fr= om + the ad7606 family. =20 https://wiki.analog.com/resources/fpga/docs/axi_adc_ip + http://analogdevicesinc.github.io/hdl/library/axi_ad7606x/index.html =20 properties: compatible: enum: - adi,axi-adc-10.0.a + - adi,axi-ad7606x =20 reg: maxItems: 1 @@ -47,17 +57,48 @@ properties: '#io-backend-cells': const: 0 =20 + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +patternProperties: + "^adc@[0-9a-f]+$": + type: object + properties: + reg: + maxItems: 1 + additionalProperties: true + required: + - compatible + - reg + required: - compatible - dmas - reg - clocks =20 +allOf: + - if: + properties: + compatible: + not: + contains: + const: adi,axi-ad7606x + then: + properties: + '#address-cells': false + '#size-cells': false + patternProperties: + "^adc@[0-9a-f]+$": false + additionalProperties: false =20 examples: - | - axi-adc@44a00000 { + adc@44a00000 { compatible =3D "adi,axi-adc-10.0.a"; reg =3D <0x44a00000 0x10000>; dmas =3D <&rx_dma 0>; @@ -65,4 +106,31 @@ examples: clocks =3D <&axi_clk>; #io-backend-cells =3D <0>; }; + - | + #include + parallel_bus_controller@44a00000 { + compatible =3D "adi,axi-ad7606x"; + reg =3D <0x44a00000 0x10000>; + dmas =3D <&rx_dma 0>; + dma-names =3D "rx"; + clocks =3D <&ext_clk>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + adc@0 { + compatible =3D "adi,ad7606b"; + reg =3D <0>; + pwms =3D <&axi_pwm_gen 0 0>; + pwm-names =3D "convst1"; + avcc-supply =3D <&adc_vref>; + vdrive-supply =3D <&vdd_supply>; + reset-gpios =3D <&gpio0 91 GPIO_ACTIVE_HIGH>; + standby-gpios =3D <&gpio0 90 GPIO_ACTIVE_LOW>; + adi,range-gpios =3D <&gpio0 89 GPIO_ACTIVE_HIGH>; + adi,oversampling-ratio-gpios =3D <&gpio0 88 GPIO_ACTIVE_HIGH + &gpio0 87 GPIO_ACTIVE_HIGH + &gpio0 86 GPIO_ACTIVE_HIGH>; + io-backends =3D <¶llel_bus_controller>; + }; + }; ... --=20 2.47.0