From nobody Tue Dec 16 21:59:11 2025 Received: from mail-wm1-f41.google.com (mail-wm1-f41.google.com [209.85.128.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 221231C07C6 for ; Mon, 10 Feb 2025 09:32:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739179971; cv=none; b=e0qJZ1fYAQ0T+X64kjBTYo3c11fhXQgnvL8OxqCU6wBvbMLqCyc41gH+IbKBNqE9kkB5k+FSXS4u5rFCCPbb1PpqFP1cjmY4sKIhSHviJ7Gt97vX+GXJMiy/xhmKpmk9B45znXxOBkhKlErtnHnM8vyGPHV2cG6RJTfCslhY5AA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739179971; c=relaxed/simple; bh=6FKLI8BR9LrbuUjWiYTQpzeLNsesqx1ffA2+NHG9+q0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QPEZNw52nqlOsdYVFYamAjjxaTFeF2CjNjU7lkrHBu29MjyUHi6JvXrU97C0rzlbDe1Bs6R/X3MczFgbYitqtSHYyPF6K4bzgVekHaDUN67agm3X1rY5OwlcF/FH2eDaXs+ZgAIG6MwCzxEY5UmP4tvGvcpFiNENnCdA5lP9v8I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=MLZqfyCL; arc=none smtp.client-ip=209.85.128.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="MLZqfyCL" Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-4393dc02b78so5911335e9.3 for ; Mon, 10 Feb 2025 01:32:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1739179968; x=1739784768; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=B7Mf7/b8tRR9xW5dgasegab0Mde3i6bGZYAhw62oPdc=; b=MLZqfyCLbOVk/QhNXdz7HQGceWi5lxWeh6jkMdwCm8XZBBZ5drN1va6gKvgQxU6f0e mpIh87CIpPpj4SbkGFmbuijys218/rrg3bTfqbOWYvmi7LAKqTo8zfV9aMjs7l+IelZl bGw7LWKYNk3bdt8MEbWS9OenYS0UKevdm79oDWZLcJTfkrrHPZb5z6A62lvdZx0XCtao 5olfcfRFVMmRILCPgJNb8Sc4pyzukpPnSC731cvq7uhy8xYnGqHHhfgHPHOekPT2cuD+ BZmX8hu7H/jJJ23O+bmo5UXLUqzQBFbRz0rtawKNT7hxpcbFmVB8GFLYo+Oj5YOdxRgu 2hrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1739179968; x=1739784768; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=B7Mf7/b8tRR9xW5dgasegab0Mde3i6bGZYAhw62oPdc=; b=CCw+nM4PKsVP4u0b4U3GYtmWsM1ggeKcfqbqQUm6P3gA62OcUwRE5guMqkjWVET19y Xe7skdmv9ZKW1vfMJxH4kRlKp2oDjXp9QDB17Vla7BzlBpxigV7Z4C+Qz9De2B1DL+pv XbJ4wYY8IxS1DyRlbkfe+sDedUO0mSYh8iu/U6H+OKgvq2FitD6hnzFkK2qW5rJkpGst gU3iQe3Rlrm+vCr7Cwy82sy260OTbXnCOkg15SoITK5bKV9CVVkJ1K+gyRFmXm3c7oWq 7FrNiG+GT12zSK32db3bRHVVncnJ9pUi3ZPuyTiB9EhimsMabM55EnDYIbvsUI/1Yh1w AAaQ== X-Forwarded-Encrypted: i=1; AJvYcCWaJzn6GaoSyesgDylew/DJIIxo4xW5dE9AmtINXVi+9j+oe9cxh+J+n0TEH9US0lLdxQJk/FZt788XxSU=@vger.kernel.org X-Gm-Message-State: AOJu0YyDadJ6/XSZVDx9vr5cocWK8wNn6EYCaI1sRG03iXmTvLLRAKf3 8fA7k57MbxxISO0QIyCNeaDEQIeMASARdrO8NQpBRz0+bfgHxjZLTAqXImXmE+Y= X-Gm-Gg: ASbGncvdmVlhia9W4iuEiDwUXoE0Uc0aCYfPbvBaiTtiXiozrfdlMAVGRZIr3lObPKL kJZzFDseqcxAff0LTdIhSdkKEDtl/C//121me29TwKlW7QzsdPp1ld7CTkccGhfcl5WuGq7xayO fFSIaHQ1P6RglSxHMNszBGE8mbDhsgOMGV6tLZjqOtCe7PnlLH+QbDaqvpJ/RnNwuBjzuhrfDwp CaSU0MKrDly+q/5w9TVuDX086NV/nQLf7M4QBBkvdh4Mw8hVsnWpVCnuRAEF68w3u4PJbjAhc5o ZEJcYgmIANJutWS9toXSPLdOzI6AFxheNA0Y X-Google-Smtp-Source: AGHT+IFTndcSWfI5oaRE/Yk4AmwYCk2TTxoLS17TnO045AWTTpQhU8hrDcvXFUIacIha8y9Rh24cjw== X-Received: by 2002:a05:600c:1f81:b0:434:f767:68ea with SMTP id 5b1f17b1804b1-4392497dbdbmr113510775e9.5.1739179968306; Mon, 10 Feb 2025 01:32:48 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4391da964e2sm141340895e9.4.2025.02.10.01.32.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Feb 2025 01:32:47 -0800 (PST) From: Neil Armstrong Date: Mon, 10 Feb 2025 10:32:39 +0100 Subject: [PATCH v3 1/4] dt-bindings: display: qcom,sm8550-mdss: explicitly document mdp0-mem and cpu-cfg interconnect paths Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-1-54c96a9d2b7f@linaro.org> References: <20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-0-54c96a9d2b7f@linaro.org> In-Reply-To: <20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-0-54c96a9d2b7f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1922; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=6FKLI8BR9LrbuUjWiYTQpzeLNsesqx1ffA2+NHG9+q0=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBnqce8QdvaOHqukMQloNHxUMY3QOwnJoaYNNprKn8N iY0JjaiJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZ6nHvAAKCRB33NvayMhJ0awED/ 4xRW3wc2J0soAkiPwhFBNDsJS+LFpMnO+8t6ChgyXGIyn08CvVELsbOi+xAcxvvwRDbVHnmxioHgqe DhNQ5BRTTwzEIHmxPG7/zc4C60SYZX9RvFfbRaVdQqjuto4OWub6YRQXL9pAqFvvh+542UdwssFL9i RRf42lG6RQzryiDSXipivC3g4/xiwVdUx3tRkFR5prIYNb8I/4hIPYNnv+EoXqtCJySmZZunDFePRL 9V782oINlu0BjFzGfNiXPeVoxbHMVwvnMXUYGJKF7EGpHyur4GUvITQu/Nz4jKfPXo5E3gWMm11ENe ZJrOaNTo+k7YLqyzpuxrtWGtVRhqAqtdFVywFRG8Z486z376yI58tPCmnGzwBHmKmMWUJcIcpVnG/e 7hNiHuDxIi2vfPv741Csxh/X7aZknzhet5lcWsQ/YhZmiH4LlQUb/fgN2t06ejihgBVKZ0LR22rzFC HCBv2pJpJgsTzmWNI+6NpHZz0D2DMWX4ZsG9WBRrdPGa6DPjbR2QCZDcozpnwrR0F7uSHLceZmmzf4 uQFkynLNOZnGqI23oHoIChySVi6XcrFNnBIz591bTB0lPPLVMlSM7zLuoiEzKZeFbvqqLVU0JStL1f oT73IMjDltqsvzNqU+NAA42pAHtC9lzaufAcGosCpfBbzDnaf9Ao/0KkRoHg== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE The mdp1-mem is not supported on the SM8550 SoCs, and having maxItems=3D2 makes the bindings not clear if mdp0-mem/mdp1-mem or mdp0-mem/cpu-cfg is required, so explicitly document the mdp0-mem/cpu-cfg interconnect and add the cpu-cfg path in the example. Suggested-by: Dmitry Baryshkov Signed-off-by: Neil Armstrong Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml | 14 +++++++++-= ---- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss= .yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml index 1ea50a2c7c8e9f420125ad30a80b4ebd05c9367a..59192c59ddb9c126ada43ada143= 0fa7569651f99 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml @@ -30,10 +30,14 @@ properties: maxItems: 1 =20 interconnects: - maxItems: 2 + items: + - description: Interconnect path from mdp0 port to the data bus + - description: Interconnect path from CPU to the reg bus =20 interconnect-names: - maxItems: 2 + items: + - const: mdp0-mem + - const: cpu-cfg =20 patternProperties: "^display-controller@[0-9a-f]+$": @@ -91,9 +95,9 @@ examples: reg =3D <0x0ae00000 0x1000>; reg-names =3D "mdss"; =20 - interconnects =3D <&mmss_noc MASTER_MDP 0 &gem_noc SLAVE_LLCC 0>, - <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>; - interconnect-names =3D "mdp0-mem", "mdp1-mem"; + interconnects =3D <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_DI= SPLAY_CFG 0>; + interconnect-names =3D "mdp0-mem", "cpu-cfg"; =20 resets =3D <&dispcc DISP_CC_MDSS_CORE_BCR>; =20 --=20 2.34.1 From nobody Tue Dec 16 21:59:11 2025 Received: from mail-wm1-f53.google.com (mail-wm1-f53.google.com [209.85.128.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6AD811C3C11 for ; Mon, 10 Feb 2025 09:32:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739179973; cv=none; b=nShV3ps6jwb10e0LmN7GBZDu+f30/5KVZQjwAwwM0SPYIkhoK/9ly6O7a90wlqPDRVHr7N1PKz7o8QA1iVRw+Wqcl8WCHq9W14GO8Ul6pPKWL8PwyVEEJv0AKFWW69Gwzp9QsRFhPwBlu7oCQ4vMx+Y03iepRiEaRfPiZL50ako= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739179973; c=relaxed/simple; bh=lfPxQaMFtbZZ21l+5BkGf/b9VmjDtPXz4pGJe8td0xs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dQfbNLo55vsOyDeXyS05JUsG8oMCzCdpcIbgJH8Re/DW+cNPqIclSPOBnXw5RppkMiM0NaWsn2xxhdLnn8F2SZ7mgO74uOl3b1C8+y1ZnG2WSkaSwGtaV9gcOwpeN5iBZ1iKkJoZn+qa4A2MNRRLswHZGHa7xaaMzAv4NM//Ois= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=vznp9r4k; arc=none smtp.client-ip=209.85.128.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="vznp9r4k" Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-4393dc02b78so5911455e9.3 for ; Mon, 10 Feb 2025 01:32:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1739179970; x=1739784770; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=I6IMyTwFG9nX5XomX1cPcbTQEA5dGNGjA4zy+aU6zlM=; b=vznp9r4kRG/5HpMbAThTa42v6X8kAbqrxSfdTW4/u6jTkxdGRyFZ5lsrYbp+2tadWE CDnm5uLebDXVJNqgrzj0KA3AnFZCp1hYZSywuQLCKlQGweuHYJRFOt17bC6MSIMi2Qz7 5mdfMYugA3+0Ecq42MPRP65lfMw8pShP6GquW8Lzx8k7TOPbrbLdxzKMIY8R4JdfnjBO F330n43LfU/ooxUUNWPz7APiZiGDLlyWZpinBnJgbr+QhXGtyuiSbyO/6yul1KIprThE A3oCDTwbV737gESNN+s2RRrM55ByclAevmqWwoMrqtvbgJQcAUBTYxIC8llXJMzd03Dg no5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1739179970; x=1739784770; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=I6IMyTwFG9nX5XomX1cPcbTQEA5dGNGjA4zy+aU6zlM=; b=eyVbBW/asjdxSzehK669k3GKjWlk+hphYJalFg4yFQUeVz8zx5P7M5+C6hUDdttN49 75skJsAW0m/2ko6EM5UgZlUWNWJJ9SMfmQBY+BPX/wGH9En15PBzqYK17U4ZTN87PYJq eBRG3dbjz2htYsbm0H2KDCj4Hj5iJtKSDURzQovnWlZhyzvXzKrawcSCJFkjSdvDHhR5 a5m1xdPAXwVk9pwKC5gqsvdBrlpznsovrXHDi0jeOzpVp+5XLo2u1ZcQ8M2lIxmDOkCW rVziH+Y9v+DZDB/w+6UryZ2TJiS1g8R1qi4W7bF2agoEKCMXwh/OqPJB5rg/podCl98R SRMA== X-Forwarded-Encrypted: i=1; AJvYcCWA9monR0VnnQpVgPEraTk3T6Xv5KCc6vzKpDdl6WFNNBMOIVX/VSyg9t7pcSr32EMrUHxeMM30sNB2C+k=@vger.kernel.org X-Gm-Message-State: AOJu0YzZrBoQPs4CDxr+JH7eeUSYg684XeMvXrk6YBNiFyKh6q+c1Bip DTaTKQ/d4CiDlS9X602gg18suw+VUiFQqpTPVI/hNDxpB8opaR10ZGMXMA2wwsw= X-Gm-Gg: ASbGnctyU/tWkgAmAPdgXg6T0YBSXOZvcKbXFXOzAWT9xKGKXyJXgLKnXpAieywhDkT zFotQ8fhsdStWIZBNCyTZYQmosuAgdV8sUIIhDbB2YOttVB1abPhBw8KDm9PgS7AfKY400iPO6C UuKT2oziBdyIbq3y1/NIbUUujjDz3F3LiSMjDpjJE4yzvTWHPRKCPGu3kdQOyav8+ghyOR99oGn lZW3gru1tLB5wG+foreajJs3JwxVqKiQKWU2SOyXGdlHir3xjMOnT6U1lXZsJUYpMPwkhtbILdf dXtAG3nn4BjLdsTSoppAaa9/z8wHb/2g4CPk X-Google-Smtp-Source: AGHT+IEwRlW2DrLkiktuMQW07Z2SL+sgeHovK/MRPd++QhDmgF5mqDzEvYPl7b2V7XAwAGPCMCGvAA== X-Received: by 2002:a05:600c:1c28:b0:439:4825:727e with SMTP id 5b1f17b1804b1-4394825731amr10547935e9.23.1739179969602; Mon, 10 Feb 2025 01:32:49 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4391da964e2sm141340895e9.4.2025.02.10.01.32.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Feb 2025 01:32:49 -0800 (PST) From: Neil Armstrong Date: Mon, 10 Feb 2025 10:32:40 +0100 Subject: [PATCH v3 2/4] dt-bindings: display: qcom,sm8650-mdss: explicitly document mdp0-mem and cpu-cfg interconnect paths Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-2-54c96a9d2b7f@linaro.org> References: <20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-0-54c96a9d2b7f@linaro.org> In-Reply-To: <20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-0-54c96a9d2b7f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2075; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=lfPxQaMFtbZZ21l+5BkGf/b9VmjDtPXz4pGJe8td0xs=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBnqce81eAz97fUjAcEQoJORzuzKOeABTMSToiwQoHR qUCUVImJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZ6nHvAAKCRB33NvayMhJ0fplD/ 0cYY7doqunfG1masd3Y/dnrcjJOQZun5jdN203atsgPQP4RpjN7SJwpQRjldFB3ECitFP6Ts3jXjJB Mzo/orhdxvng7eUp4tgvlgCFj0oRSFiJEq+bK3baw546MjZjqNE4Zdb8tJr9ZSVBbfRLyv5Cb2n4kR Ir5o69mjEbbqIoeEidhvOSycaPtbofamK4vlVAyksAYUHn8LFyl8VjFGVeB7MG//MiREqtb7s5Lvof 9lmLQPrq7f5wV/iiWgyvNKoIQL66ASxQwHDKVEKiQ2ZINVkrs11Xq4NlRa8U2mPQDnSpWjPnV+sdzK I9giyxUJT9WRRS+coOa/ArWtE4kAd9khekWm4PLKfLeCp21zhKsv8zieZ8icHVMw7rSREy3TJj32zM 0fBeAcICpneYHFJ2XY1aIyneMgjMzpkoApLjjuplu49EJ+l4IXgonehRtIUvuqWnk73vy9vzaFTIpS j9+G5Dg+ZC0CZyHp8JicLzUSZTXsGhDmN7a3yK3b7fYsIP9VblL9ScHfvZ+pX0B/jR+QLu9pGxdd4V qx0cAFnlkqmX5bxRgwQfcRkh4tSjBwkKUJB0G/Kte9ME0EjH1QQUqOM6NMt5C94Y3ZfyTj74St+jm9 6vcTY7/gQWyaCVC+mVK2kP9KW7q4uJvdEMDB4cEnQoWVwKlww2yh4auzz7+A== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE The mdp1-mem is not supported on the SM8550 SoCs, and having maxItems=3D2 makes the bindings not clear if mdp0-mem/mdp1-mem or mdp0-mem/cpu-cfg is required, so explicitly document the mdp0-mem/cpu-cfg interconnect paths and complete the example with the missing interconnect paths. Suggested-by: Dmitry Baryshkov Signed-off-by: Neil Armstrong Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/display/msm/qcom,sm8650-mdss.yaml | 13 +++++++++= ++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-mdss= .yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-mdss.yaml index 24cece1e888bd35f169dc3764966685de4b6da1d..a1c53e1910330af473a1e6c7827= 026e0770131ee 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-mdss.yaml @@ -29,10 +29,14 @@ properties: maxItems: 1 =20 interconnects: - maxItems: 2 + items: + - description: Interconnect path from mdp0 port to the data bus + - description: Interconnect path from CPU to the reg bus =20 interconnect-names: - maxItems: 2 + items: + - const: mdp0-mem + - const: cpu-cfg =20 patternProperties: "^display-controller@[0-9a-f]+$": @@ -75,12 +79,17 @@ examples: #include #include #include + #include =20 display-subsystem@ae00000 { compatible =3D "qcom,sm8650-mdss"; reg =3D <0x0ae00000 0x1000>; reg-names =3D "mdss"; =20 + interconnects =3D <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_DI= SPLAY_CFG 0>; + interconnect-names =3D "mdp0-mem", "cpu-cfg"; + resets =3D <&dispcc_core_bcr>; =20 power-domains =3D <&dispcc_gdsc>; --=20 2.34.1 From nobody Tue Dec 16 21:59:11 2025 Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EA5181C5496 for ; Mon, 10 Feb 2025 09:32:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739179975; cv=none; b=XxBfUt3FNI6HI9dgA43cfmkoEXLL+Vngbme2+x4nBcojdHSG6J5puS2oehb5eNQNG4Y7uxNi2AC6OOnFav9VcV5TMU777/T5CkEFZXK1OMtevfIRnCCpNvZ4tYGCCsBhNL2ceXKx7P20GTwLdnAeeJm0iNYrOFPiKNQAPnS+p1I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739179975; c=relaxed/simple; bh=0VhCEsAiA8uPe5Ksn8CTqXiIWWrYseP1TtWKONRb3So=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=c4b4ngBmAVG+xB9AkK2+w9KV6Ys29DRUp7yoRRJXjA0+kNZb//iGF5+FoiXZZExOuiScitT8SuquDvCB96zyVyVGW27tSIUJAtVD+XIiNrfFD5oNGUBn/lrCllbNTq28LR6bMGWONSXJ7wUZWb8tUYn3EhOBbFqvNsRMZn5PDiw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=eedfO0aX; arc=none smtp.client-ip=209.85.128.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="eedfO0aX" Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-43690d4605dso27484695e9.0 for ; Mon, 10 Feb 2025 01:32:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1739179971; x=1739784771; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ivOjMNAu6T20TyvE3uQMGt0H1lW20ezA1AZm+/b+uno=; b=eedfO0aX34XFZ+HNtb46BoSWzESRwsNYKpMLo/BRlsOBIvB3cMy2nP9Qg4OQnQONTa WpGfyHraDuZ84Nfa+NX5AAEtemBbB/P77cjeth9WsDgfrS48KcsFOeI2vkvD98CAggpk RwKoLVIpuT1wbhMBeozFmZb2UzyrD0d8yVwwxfGnpLgye7nKD0Xnu3ILo1SWjH8PEh+0 /ooLiy7oghih+p+4tcPKdV1oYPeZixz7siFMcPUXVhDuda5LOwBr1LviTlve85pvbZ6/ 0RWP4eBebIbhHfUfnUW4YaTOVhUFhK8D/eQHqPB67d4II5zRgD+ZkXJY7mCSLLxMm0Yz oiDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1739179971; x=1739784771; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ivOjMNAu6T20TyvE3uQMGt0H1lW20ezA1AZm+/b+uno=; b=m8gQ9WJqccI/VfHum+yclFsR4z7ys1r6env0COs1r/rLVdxwxMYyUVsWCgbYAadzDO 4DJH/zpbmalwryxHkVYQbpcsZ13y4ln75EOzYFBfEqkniS4+7VmgbnHpSBoZjfrrjvCO o6UimmTnEfeaPcg9+sI3nKPvg+XKYLIwcCXtrc1+nzoidT5YPjJeMjhliOZDIIM8xzAs DBwcBAnAEr0zxx/AC66zS+Wcpw0RgPnbj28UOjyzZlzx/ifwusRyVgtu+aqpWyoqEygP f24DR4X6tt5u97OdBPU3sfysVs8fVxhKK/DD1LZiGG7MWktKnogbzwHdVK5LNxoGQoI5 UOiQ== X-Forwarded-Encrypted: i=1; AJvYcCXjWc7pd0Z4qEFnfigMwhUDmbMhrUee7NTr6/2/lerIv56bqSycn5Irw/7kOE7txF5MpyZIpBc8UUq02EY=@vger.kernel.org X-Gm-Message-State: AOJu0YyMSN1XPTN2vRqd39hyA9S1iYbXOm0JBSjvyPEa2YrJR6qbttp6 5BRcRNLTBq2uQEDQu7qiP2TY9eAgbZWxOR2FGe/Q/+WFY0ZY4fb8+AGYzqYQvsk= X-Gm-Gg: ASbGncsJ4vLQwhO1oZU51+wcGV+8vmWqseKAok0uEkHTyouLZXBtf+94LERc76rZV0X VsBcMCMUkGuWWy7p54rfgppQLQgLrP3PCptXBrgbykbioA6iVLfFunYht4ZQORuox/9qlz5whos 541KYXGbkxhMVSfAjXfUf9viw5WqnSeFHIopODmrO/laFIxghssxx8H2Tc3lsQQIi7Jrxn9kU8T J6VPEOcksJpIXpCOBpJWrgQF+LWsDk0ozwbPnqiF0qBUsLbFy0U1M/0tEBXxNAWza2SwQhmXVq0 Kz6oxrUBILI11P2/BBxP9RSMc/FqlwoPJHGC X-Google-Smtp-Source: AGHT+IEXic0KGgdCNoDozQ+TrMOpmSNABTZomzw86A4Rq2MFbbxQTIHAqCCxV6B4m2nofvxVYz86XA== X-Received: by 2002:a05:600c:a085:b0:439:4858:3c77 with SMTP id 5b1f17b1804b1-43948583e32mr10166515e9.19.1739179971334; Mon, 10 Feb 2025 01:32:51 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4391da964e2sm141340895e9.4.2025.02.10.01.32.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Feb 2025 01:32:50 -0800 (PST) From: Neil Armstrong Date: Mon, 10 Feb 2025 10:32:41 +0100 Subject: [PATCH v3 3/4] arm64: dts: qcom: sm8550: add missing cpu-cfg interconnect path in the mdss node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-3-54c96a9d2b7f@linaro.org> References: <20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-0-54c96a9d2b7f@linaro.org> In-Reply-To: <20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-0-54c96a9d2b7f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1111; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=0VhCEsAiA8uPe5Ksn8CTqXiIWWrYseP1TtWKONRb3So=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBnqce9a+PuxOtQdQqE+HfNwM8HRtkEQ+iNfewus0Px 3gA067GJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZ6nHvQAKCRB33NvayMhJ0f3YEA C2IR91za74T7rkm4X8WnFczjhLLGe/bDhH30O+tHMJHPZpHuNcgPxVCrVu5HDVnA+CoonOlsLyMmGR Jp3vHkZo8Vhst8fR8w6WDqfNKkmBxG/qCqVHKWpyWCF0CbHhwY0hOxz55IWOVQUT4ysS9SFVEZ7fqb 6qOCD0/1bJrOjqKLQgDT92ohfhYkxKqknDCHq3qKRanNpOB2Ac/ncqEEEEGBx6Mt/UEkPSt54sA6Cp JrdcNKEBa/AGTZUJXFt4bveCuEqJ3uKbxgNWY7hcIyWMiPPKvKu5lsgIkTa+elFRYzyu8yNytBryP0 bhYS+2jbgZs4MqhwkcjFdQ0Jvl4Mnq9NP2NdefuI4oDfbe6oXmUogwG5uq9BLAFbRdo9YGgn53SdsW KBA17FGE/w6eDcSrCP6jdGgwiMmHhUJg1wptXok7dOLRMw+2kFWW63qVLRBEEZI69q+8egTr7Hb7Xl IX1NcKup1NFo4rkH9c5FNx4AJQENpUVt/m8LHrVfTbJVAcNw3DeKttBS3wabq7dl+3a4RjacS/jOLV lD/n+YAZde0XUW1b7QUQqRdezBxoUf52BN+DqRBP9oq6/KS4zZyzYRn/rHYjxT5gcVdWJusxDpkrru NiyknZLeyksBYnWG5NyKIlo0o+uHRIYePklQrUZ/6gKWaMxw1MZtEAZB6f5g== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE The bindings requires the mdp0-mem and the cpu-cfg interconnect path, add the missing cpu-cfg path to fix the dtbs check error. Fixes: b8591df49cde ("arm64: dts: qcom: sm8550: correct MDSS interconnects") Signed-off-by: Neil Armstrong Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qco= m/sm8550.dtsi index eac8de4005d82f246bc50f64f09515631d895c99..702b55296b18ff2f8ea62a3391b= 7de2804aa9f65 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -3020,8 +3020,9 @@ mdss: display-subsystem@ae00000 { =20 power-domains =3D <&dispcc MDSS_GDSC>; =20 - interconnects =3D <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>; - interconnect-names =3D "mdp0-mem"; + interconnects =3D <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_DISPLAY_CFG 0>; + interconnect-names =3D "mdp0-mem", "cpu-cfg"; =20 iommus =3D <&apps_smmu 0x1c00 0x2>; =20 --=20 2.34.1 From nobody Tue Dec 16 21:59:11 2025 Received: from mail-wm1-f52.google.com (mail-wm1-f52.google.com [209.85.128.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 514481C5D6A for ; Mon, 10 Feb 2025 09:32:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739179976; cv=none; b=DosSx29ZUiWCUHZJRkON++tY0JwuILspZmBA035qf/NmcyWm+ACpjLD1pTDST72s3KAdefnT4X9v1p+GrQfGLXC2kQYdHe0qWN+VBmYrqBAPnfFxEZfRMU9erovaX2Vk8LMm3P8U+npF351eVyvoE9WWbCK8pycRUdEIY/qXnqc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739179976; c=relaxed/simple; bh=98TJ0BDq/B4YwYQuRbdQZDol3K9UssuD5yxrzrrb764=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=aa4wzCpPRvLtgVj9RP6pMuUN+cFL42NGlcvMRCw10WHwjWwFJhSnST1YCiw8lWN9ppigtWCwyaGSeeKMNB1WbuSiVz1wP4/8b+R1mbx/GAJzw8/X8vamedTzUUwtcYyULusshTKVJQQcJE9oNVJ2JtwM1VjbQeQ6Zx1Bi5v420E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=oqngtpzW; arc=none smtp.client-ip=209.85.128.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="oqngtpzW" Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-4394036c0efso5203845e9.2 for ; Mon, 10 Feb 2025 01:32:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1739179972; x=1739784772; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=XcabXVD/YPnR5KMwd4hd44jlah3xNkdzGjeWtc1T2sw=; b=oqngtpzW/reIWI5qWeybXCwWhTUcOde6DkNV9+eobuJ/sBopwuaKc/R3LzV+l8bzkI ultE8mMyiWqDTR0lScK1IwnQNsAsRkYjdbnBKUEu7xooZtoKbMfULA5jOCEcYOf9XsFv WxTyMUqxeErfOAArtcB8uLGku+qyApEkjOyExz+V11yR+acSrO9hDTxkls1bpf6Lzzs1 RpoMcYSX1SO/NZvARGqbTtLTr00pUphLZSxH8fzn3199sq6EaVxuDYMGVaY3U5B7qv8D +dVzwJ+b6phH+OUQSe57ljvHD5QA70WbmcBe9y9CPPvbJ7Y25Xt1fx+Q//JBuhM9aJ9n lqAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1739179972; x=1739784772; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XcabXVD/YPnR5KMwd4hd44jlah3xNkdzGjeWtc1T2sw=; b=VsQtp3zkrIHHIawhGh6JdyG2fGYlk+7HciWcAChS5sU5rKVmn2IAf628rlvlXA4j7m jaCy1S6x/zQ2Ls5r3Z0X7lX4a22GfsdmA74vyPVMIYZGBidFzlEPNolWTgXgBC9172FT wcJ8yGgYOg/brTBNRj6Ij9yxrr1qZA5erYUbEyYEwwaeejtOceeP+K80Gf5ybx66lwYv JXYdnt6cN8sAtYM+UDvLcNigBSguUgSpZb9dnz4aR2MIQVWLu+TaubmkJwRftkYeBP5B rBMLRXT/w04vCdKtP6qBPodMf5WPngMxxHyJCu5xiYUrD6QRjvWNkWN9Z227+udNxDc9 zjcA== X-Forwarded-Encrypted: i=1; AJvYcCUmIx9fwACo3YwocAAxeSvmhLYOMYLjJ6VRq/pkJclu/jvSZElk3FWI03cLUmTKaqAgDchXjonvjO+QBWw=@vger.kernel.org X-Gm-Message-State: AOJu0Yzwrb6GAupYsQUB1PauTBeKn5qsjGJmXmReQRqCktBy2KehGYNb oxmI+OW9Fy0OKKv+aFANA5IkqDiRECftaeclbzIf/HSk3jndJ1EYabkm8kvGI80= X-Gm-Gg: ASbGnctLt1pDqkqZgBqj6yHAyGS+tsjL/AvVZ637qbEY0xe0NIO2CQeVbqeNG0Rg4nL xwQUWDBOpSKh3vcih2NmCp9xY5dh2BbnY1rsOtQ2XXXVFSLDKlPTX25t6OuRDN5jzfzLgs2D9Dj bxoAzmxV4oP6cQZ5q3gCZiyB672+dRP1QV32UuVUAlONfIpKXWuB9N4ClakRAFAOKbvENkG+kCS AHyl1q1gKQ6mu5cOlqx4YnG81iov7HzTocYpY5uhsNJf9fmGlWwR4ww6iKuoCYQnLStibY2F0k/ LRVDQa2ZMlaEwpPYr2JMCeVRk43KGuQP1KVB X-Google-Smtp-Source: AGHT+IGPRsAVtjDP7HsM+NAqH7eUh/kQaI2NDFRRj2xr8IRtRWGH/wInuxqz+Xygr498MK4srrSfQQ== X-Received: by 2002:a05:600c:4650:b0:439:403a:6b77 with SMTP id 5b1f17b1804b1-439403a6d76mr40653435e9.10.1739179972563; Mon, 10 Feb 2025 01:32:52 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4391da964e2sm141340895e9.4.2025.02.10.01.32.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Feb 2025 01:32:52 -0800 (PST) From: Neil Armstrong Date: Mon, 10 Feb 2025 10:32:42 +0100 Subject: [PATCH v3 4/4] arm64: dts: qcom: sm8650: add missing cpu-cfg interconnect path in the mdss node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-4-54c96a9d2b7f@linaro.org> References: <20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-0-54c96a9d2b7f@linaro.org> In-Reply-To: <20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-0-54c96a9d2b7f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1210; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=98TJ0BDq/B4YwYQuRbdQZDol3K9UssuD5yxrzrrb764=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBnqce9m/jhlaXw4GK2ZFw2r5HIIYWGI8wOs/vFs1bM 4LUMLfCJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZ6nHvQAKCRB33NvayMhJ0f1EEA CVf2PbRt814BXrKgCeDeA2obxDBQY4vpAFMPuW9T9FH8C0VmlsdRjFqkwhVNLcHre4+GEdx94UbecB 2cwG0tLoWmlqT585vcpdMXvE26mJLSIHdmJpBfwYStCD1Jds3TrPyv2Rk8GYCi12jON2yAF5prLkPf g7hsylbkRM64QR7aeeC2QewzmRD+6i+6Dc01SN7cGfVWrxKpyGpJPsnzJlbQ+b6zasx2AeBM7H3W6P yYRQb9Xvi3Xb6wnTleV8hcmfKaqQ2MYYWfn3ccIZ2FM4fnqWQ9+VccI8tjFSq/yqLi1j9cixhH21bx gVJ2O/GDHRRha1ljW6ys2TG9FwQEHoNKUyPrCk6FQEggzmL+q5o9R8d5v8/KVqLVP1lWOiGa7r21LP F1Xb92S0KrefOBnAkP+5q8UE365lcAQoE4Y+4GGvr9GwHVnbHHwgi5bpsRJ+QEkmEetq1DWOnxW7kv 5olTbozq86vjVFhls6KXGIQpMerdjlw4i72rvk2yA6YI1n64pqk3eYVP7L/ZJPt+XXsRJR5XPenQ4q j4yl1WnqjfjoUGJgidJ+R4GEbdwr7yoH/wWicOu6FqHHW1ARu878vtyh/Gs1I3gh4VemvZCSuWRlrA MvlSNpXVJIYcReMfFExJsSX+6+rah1WR9y1I47D/a8pcibKIDoQQJ6CmNxWw== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE The bindings requires the mdp0-mem and the cpu-cfg interconnect path, add the missing cpu-cfg path to fix the dtbs check error. Fixes: 9fa33cbca3d2 ("arm64: dts: qcom: sm8650: correct MDSS interconnects") Signed-off-by: Neil Armstrong Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qco= m/sm8650.dtsi index 86684cb9a9325618ddb74458621cf4bbdc1cc0d1..e89a2051648a97ea8a5870eb6f0= a6e0fa7e880a1 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -3656,8 +3656,11 @@ mdss: display-subsystem@ae00000 { resets =3D <&dispcc DISP_CC_MDSS_CORE_BCR>; =20 interconnects =3D <&mmss_noc MASTER_MDP QCOM_ICC_TAG_ALWAYS - &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; - interconnect-names =3D "mdp0-mem"; + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; + interconnect-names =3D "mdp0-mem", + "cpu-cfg"; =20 power-domains =3D <&dispcc MDSS_GDSC>; =20 --=20 2.34.1