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[89.144.193.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4391dfd8448sm60238835e9.38.2025.02.07.08.20.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Feb 2025 08:20:49 -0800 (PST) From: Andrew Jones To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, charlie@rivosinc.com, jesse@rivosinc.com, Anup Patel Subject: [PATCH 9/9] riscv: Add Ventana unaligned access table entries Date: Fri, 7 Feb 2025 17:19:49 +0100 Message-ID: <20250207161939.46139-20-ajones@ventanamicro.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250207161939.46139-11-ajones@ventanamicro.com> References: <20250207161939.46139-11-ajones@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Ventana harts always have fast unaligned access speeds, so skip the unnecessary probing. Signed-off-by: Andrew Jones --- arch/riscv/include/asm/vendorid_list.h | 1 + arch/riscv/kernel/unaligned_access_speed.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/arch/riscv/include/asm/vendorid_list.h b/arch/riscv/include/as= m/vendorid_list.h index a5150cdf34d8..8dd55a847893 100644 --- a/arch/riscv/include/asm/vendorid_list.h +++ b/arch/riscv/include/asm/vendorid_list.h @@ -9,5 +9,6 @@ #define MICROCHIP_VENDOR_ID 0x029 #define SIFIVE_VENDOR_ID 0x489 #define THEAD_VENDOR_ID 0x5b7 +#define VENTANA_VENDOR_ID 0x61f =20 #endif diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/kernel= /unaligned_access_speed.c index bd6db4c42daf..ff9905274c60 100644 --- a/arch/riscv/kernel/unaligned_access_speed.c +++ b/arch/riscv/kernel/unaligned_access_speed.c @@ -14,6 +14,7 @@ #include #include #include +#include =20 #include "copy-unaligned.h" =20 @@ -251,6 +252,7 @@ struct unaligned_access_table_entry { }; =20 static struct unaligned_access_table_entry unaligned_access_table_entries[= ] =3D { + { LEVEL_VENDOR, VENTANA_VENDOR_ID, 0, 0, RISCV_HWPROBE_MISALIGNED_SCALAR_= FAST }, }; =20 /* @@ -460,6 +462,7 @@ static int __init vec_check_unaligned_access_speed_all_= cpus(void *unused __alway #endif =20 static struct unaligned_access_table_entry vec_unaligned_access_table_entr= ies[] =3D { + { LEVEL_VENDOR, VENTANA_VENDOR_ID, 0, 0, RISCV_HWPROBE_MISALIGNED_VECTOR_= FAST }, }; =20 static bool check_vector_unaligned_access_table(void) --=20 2.48.1