From nobody Tue Feb 10 04:03:33 2026 Received: from smtp-1909.mail.infomaniak.ch (smtp-1909.mail.infomaniak.ch [185.125.25.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0817723ED72 for ; Fri, 7 Feb 2025 15:20:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.125.25.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738941623; cv=none; b=BoEM2b9D+4AflN8sceg42S6i85+qBkL2z5cM2/bwcXAONwEuQA7ZxpZIGoJjfD6B/MDXDNhQ9J3Ji7cTT9DcZr9r0cpQJlcvpbXh3KI7PpRXU1lmif0o4g2CMlI+Tq9VUPRjLc3uoyyowv5YJesrzZqglUVLH/nuSNM6Se8qTfs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738941623; c=relaxed/simple; bh=rOESWyD68kUJPNj2fQceKfFis03D4mZsSrL/E+cIG4o=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=FzPDT+ruVrPL+BSqMlWO+r0DGG6QF4GEU771YUcp9aSmuao7jYPhuLsA1lAVPUstgJsYLxtb9NotQ7rwT8cdev8RTD5G8CWduGmwvyWLEwxAA+46JfI6aTq+uWKmddMtXxi+UhGLYzrULDX21dtzxptgRQMcIyj2rAHm6Oyk4D0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net; spf=pass smtp.mailfrom=0leil.net; arc=none smtp.client-ip=185.125.25.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0leil.net Received: from smtp-4-0000.mail.infomaniak.ch (smtp-4-0000.mail.infomaniak.ch [10.7.10.107]) by smtp-4-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4YqHht46zjzR6d; Fri, 7 Feb 2025 16:20:14 +0100 (CET) Received: from unknown by smtp-4-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4YqHhs3J5xzr2l; Fri, 7 Feb 2025 16:20:13 +0100 (CET) From: Quentin Schulz Date: Fri, 07 Feb 2025 16:20:00 +0100 Subject: [PATCH v5 3/4] arm64: dts: rockchip: add overlay tests for Rock 5B PCIe overlays Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250207-pre-ict-jaguar-v5-3-a70819ea0692@cherry.de> References: <20250207-pre-ict-jaguar-v5-0-a70819ea0692@cherry.de> In-Reply-To: <20250207-pre-ict-jaguar-v5-0-a70819ea0692@cherry.de> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Jagan Teki , Niklas Cassel , Michael Riesch Cc: Jonas Karlman , Dragan Simic , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Quentin Schulz , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Infomaniak-Routing: alpha From: Quentin Schulz According to commit 40658534756f ("arm64: dts: rockchip: Add rock5b overlays for PCIe endpoint mode"), Rock 5B can operate in PCIe endpoint mode. For that to work, the rk3588-rock-5b-pcie-ep.dtbo overlay needs to be applied on Rock 5B base Device Tree. If that Rock 5B is connected to another Rock 5B, the latter needs to apply the rk3588-rock-5b-pcie-srns.dtbo overlay. In order to make sure the overlays are still valid in the future, let's add a validation test by applying the overlays on top of the main base at build time. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Niklas Cassel Signed-off-by: Quentin Schulz Reviewed-by: Dragan Simic --- arch/arm64/boot/dts/rockchip/Makefile | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 02f98abe1df10f44f2ac27ea5f6c6e6c6334724e..8f93e0c4d6032d0ca2d93f44384= c027e53aa5efb 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -196,3 +196,11 @@ rk3568-wolfvision-pf5-vz-2-uhd-dtbs :=3D rk3568-wolfvi= sion-pf5.dtb \ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-edgeble-neu6a-wifi.dtb rk3588-edgeble-neu6a-wifi-dtbs :=3D rk3588-edgeble-neu6a-io.dtb \ rk3588-edgeble-neu6a-wifi.dtbo + +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-ep.dtb +rk3588-rock-5b-pcie-ep-dtbs :=3D rk3588-rock-5b.dtb \ + rk3588-rock-5b-pcie-ep.dtbo + +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-srns.dtb +rk3588-rock-5b-pcie-srns-dtbs :=3D rk3588-rock-5b.dtb \ + rk3588-rock-5b-pcie-srns.dtbo --=20 2.48.1