From nobody Tue Dec 16 08:34:10 2025 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E1A6323909C; Thu, 6 Feb 2025 23:52:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738885932; cv=none; b=gAh2+MflzRJtWReMfGqTILjr8glH3hXAHL+qulgIIMfSKDl9r9tKftlkwBqEeNOdfWgcAdLR2xBx7neR1e1OUmsF0vqSVJJKqOPVMBE7SH9hErYo4VSrP8GgmuHiwrrjrVputzifO1qDWqnt3yGhO4CVq4YFbdTyMPa0lZ/7X9s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738885932; c=relaxed/simple; bh=HFAcOhdD+nHV7r4A4YIZFuAlQiNJ44YOapVmSTPxVVw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=dnIAgZuZn0vRoE5EQsqo6I8vQxvApD6msRa2VFPVkwgoHt+JYJGaREPnPxdJecLBn7Yvk+0M9paGq9/NbpVKoIiBPuUzVszC8sKx5EzHrz7K+/PAB4gRP3Orq8SGCuek6YICBSg+XoKzEZU7JG47X14iph9IomIxcaVcj7/NT0g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=XomMYmk6; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="XomMYmk6" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 516Nq0Aw2894912 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 6 Feb 2025 17:52:00 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1738885921; bh=RGlfcp359yIsQcwMs7W7m4T/G4Qttz0wC103v1nEChA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=XomMYmk6XEX8O5AU7NJfyzwfZn4+T2gWNFKyAeCukpmFq1ESAiEZ+svNV37jpSAhA zu/To2QKUGm68svXo7SqtELIqSGc6IFXaJtj0MGFhgH0jbAzeNs2zbqDnKq8cBilxQ Cj0SQT+nshugFYuLFz2ZfQZliO3+fXjgtal9HUNw= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 516Nq090069841 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 6 Feb 2025 17:52:00 -0600 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 6 Feb 2025 17:52:00 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 6 Feb 2025 17:52:00 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 516Nq0vI021560; Thu, 6 Feb 2025 17:52:00 -0600 From: Judith Mendez To: Nishanth Menon , Vignesh Raghavendra CC: Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , Andrew Davis , Hari Nagalla , Judith Mendez Subject: [PATCH v4 7/9] arm64: dts: ti: k3-am62x-sk-common: Enable IPC with remote processors Date: Thu, 6 Feb 2025 17:51:57 -0600 Message-ID: <20250206235200.3128163-8-jm@ti.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250206235200.3128163-1-jm@ti.com> References: <20250206235200.3128163-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" From: Hari Nagalla For each remote proc, reserve memory for IPC and bind the mailbox assignments. Two memory regions are reserved for each remote processor. The first region of 1MB of memory is used for Vring shared buffers and the second region is used as external memory to the remote processor for the resource table and for tracebuffer allocations. Signed-off-by: Devarsh Thakkar Signed-off-by: Hari Nagalla Signed-off-by: Judith Mendez --- Changes since v3: - No change --- .../arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 32 ++++++++++++++++--- 1 file changed, 27 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/bo= ot/dts/ti/k3-am62x-sk-common.dtsi index 2f129e8cd5b9f..9ea4de9303f51 100644 --- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi @@ -68,6 +68,18 @@ mcu_m4fss_memory_region: m4f-memory@9cc00000 { no-map; }; =20 + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9da00000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x00 0x9da00000 0x00 0x100000>; + no-map; + }; + + wkup_r5fss0_core0_memory_region: r5f-memory@9db00000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x00 0x9db00000 0x00 0xc00000>; + no-map; + }; + secure_tfa_ddr: tfa@9e780000 { reg =3D <0x00 0x9e780000 0x00 0x80000>; alignment =3D <0x1000>; @@ -80,11 +92,6 @@ secure_ddr: optee@9e800000 { no-map; }; =20 - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 { - compatible =3D "shared-dma-pool"; - reg =3D <0x00 0x9db00000 0x00 0xc00000>; - no-map; - }; }; =20 leds { @@ -478,6 +485,11 @@ mbox_m4_0: mbox-m4-0 { ti,mbox-rx =3D <0 0 0>; ti,mbox-tx =3D <1 0 0>; }; + + mbox_r5_0: mbox-r5-0 { + ti,mbox-rx =3D <2 0 0>; + ti,mbox-tx =3D <3 0 0>; + }; }; =20 &mcu_m4fss { @@ -487,6 +499,16 @@ &mcu_m4fss { status =3D "okay"; }; =20 +&wkup_r5fss0 { + status =3D "okay"; +}; + +&wkup_r5fss0_core0 { + mboxes =3D <&mailbox0_cluster0 &mbox_r5_0>; + memory-region =3D <&wkup_r5fss0_core0_dma_memory_region>, + <&wkup_r5fss0_core0_memory_region>; +}; + &usbss0 { bootph-all; status =3D "okay"; --=20 2.48.0