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Thu, 06 Feb 2025 05:20:25 -0800 (PST) From: Rui Qi X-Google-Original-From: Rui Qi To: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, ardb@kernel.org, haibo1.xu@intel.com, guohanjun@huawei.com, sunilvl@ventanamicro.com, samuel.holland@sifive.com, parri.andrea@gmail.com, ericchancf@google.com Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-efi@vger.kernel.org, Rui Qi Subject: [RFC 5/5] RISC-V: define ioremap_cache Date: Thu, 6 Feb 2025 21:19:26 +0800 Message-Id: <20250206131926.91289-6-qirui.001@bytedance.com> X-Mailer: git-send-email 2.39.3 (Apple Git-146) In-Reply-To: <20250206131926.91289-1-qirui.001@bytedance.com> References: <20250206131926.91289-1-qirui.001@bytedance.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Rui Qi Define ioremap_cache for riscv, otherwise it will cause compile errors for bert.c and einj.c Signed-off-by: Rui Qi --- arch/riscv/include/asm/io.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h index 1c5c641075d2..c81d2de007bc 100644 --- a/arch/riscv/include/asm/io.h +++ b/arch/riscv/include/asm/io.h @@ -134,6 +134,11 @@ __io_writes_outs(outs, u64, q, __io_pbr(), __io_paw()) #endif =20 #include +#define ioremap_cache ioremap_cache +static inline void __iomem *ioremap_cache(phys_addr_t addr, size_t size) +{ + return (__force void *)ioremap_prot(addr, size, _PAGE_KERNEL); +} =20 #ifdef CONFIG_MMU #define arch_memremap_wb(addr, size) \ --=20 2.20.1