From nobody Mon Feb 9 10:24:30 2026 Received: from mail-wm1-f73.google.com (mail-wm1-f73.google.com [209.85.128.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B8D301DE897 for ; Wed, 29 Jan 2025 15:37:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.73 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738165064; cv=none; b=oodXImGZcbmHiRX8JfzhHQ+DVqV67YYiuyCff7p89rz6qqkJdOQcY/H7TNY1p9/lQhwSQmlHq5iyw6iwu/0WyWBpOTpIh6WTD5Acmn94Ls8IQPymKySPUmZ5OWAjoHGa41qE6ZfgvuYqkXyN2EcWFuKDtiIb6wfPTRpgRz+DXOc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738165064; c=relaxed/simple; bh=shB99yKi5vWEH+8+OXtdyhEm1G9t9Sk17HD6+WU+oX8=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=TQNCDpr6eMrDahS2oXBf7MWLpNdPPsVBAXzL6iUuZggsJhD0eOQl10AMnD17aRPvTK+2jB4VpINnCNeQdt5hsW45Ibd7Xb1OuH1cI6jpMH4rD2RTkkFrvr0SdmGlauncY9wTtLeNIakOc3TUqL6Zr3yhNH9RwNvrrjh83XzO/aA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--jackmanb.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=FU/ATliR; arc=none smtp.client-ip=209.85.128.73 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--jackmanb.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="FU/ATliR" Received: by mail-wm1-f73.google.com with SMTP id 5b1f17b1804b1-4361eb83f46so54004045e9.3 for ; Wed, 29 Jan 2025 07:37:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1738165061; x=1738769861; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=0WkGn8BdmJiDbCxxoZ+/ZnfVoLZzk2No95ZbwF5AtQQ=; b=FU/ATliRO8lj+QyF3blotutTgcLDW3QGgECYL3jjMvMHwbFWqJ5NFp8lOdUW22K/bi iOtTxWpeKgonMwqIhXk1cAFIf+wfwr0U70687a6kzppVpM6H6b5hOBKKurtYDyo2z1Rx 5pBjQ7yDenwFmlatQxO0M4gsi9jGDLRbWt0NIVzT368dkf0WgdXDdE9cyVi3h64m0FkF ZxcgH+5IWcYRLVcvGbbBaEFiHg7L5QYNnk1RuNDhZU4kL9xsTT4tGGCxFjOt6Nr8cQG5 77zY6mp2RAYqCrDEpjX1l5QDskitzAtmap5tIWVMOpnP4WyBP1c5w8HOTlPpXO7KaraN 2KYw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738165061; x=1738769861; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=0WkGn8BdmJiDbCxxoZ+/ZnfVoLZzk2No95ZbwF5AtQQ=; b=OREqZtrpzVXwOej+smO4eNmPIpwmjKfQl1ozlXk6K9wyLjgZayhl0UT1i+Zg3vNhdH yxccFfGx9kU/Xrw4mDML+dw2peip7rRNm3tPWfZC+iAcEG/TchyirbJDfuVW9wXPrKyo 7JtrIneLnGb8bdtkaZOVNN/nQUPw7YhxnbR2oopf3QMjaSdgmV86xTK1mbyRyb6Fu0q4 MXW9PLvyTIdXOMj9QTcEzPD+JOMyIqpqmT0/XUfZ3l3vEz9N1jYbkasIB84T8f4aDCo9 SEikTgmeC6rR18Me8efimNgD6WeqOBRlNVWK0810bSmKmi8lr8zvv+5e3w3b4ahV8xr9 PXMw== X-Forwarded-Encrypted: i=1; AJvYcCW75wfH9hGtrDSUsBeMBt3ekE17h0ZLPHUb0h3xkOWSCR3IP6XZyvS7bd3jqARl9/6Vq24EOW90PoBZj+I=@vger.kernel.org X-Gm-Message-State: AOJu0Ywof/FJYHIjLwB/JTfgwPLiGG/G75cfnp8MpFqNXDc3EQFRc9ch 1cVv4ZX0MX/ZiCRWTEVqSbebYIJKzFnBcsoMqvDc3vXBAaKhcHvwKvGl1acxfY4WfawLfP52UPp +CZx3yXXMlw== X-Google-Smtp-Source: AGHT+IFK6Tt+YJvPuuRl3HlxobT9+iPyETyzyxGNBZNhBzoy5JLYkUOI7BUveErMjhcLXbOkzUc46yGIxkQArg== X-Received: from wmbay29.prod.google.com ([2002:a05:600c:1e1d:b0:434:f018:dd30]) (user=jackmanb job=prod-delivery.src-stubby-dispatcher) by 2002:a05:600c:4f15:b0:434:a30b:5455 with SMTP id 5b1f17b1804b1-438dc41db3dmr27860695e9.27.1738165061056; Wed, 29 Jan 2025 07:37:41 -0800 (PST) Date: Wed, 29 Jan 2025 15:35:41 +0000 In-Reply-To: <20250129-force-cpu-bug-v2-0-5637b337b443@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250129-force-cpu-bug-v2-0-5637b337b443@google.com> X-Mailer: b4 0.15-dev Message-ID: <20250129-force-cpu-bug-v2-3-5637b337b443@google.com> Subject: [PATCH RESEND v2 3/3] x86/cpu: Enable modifying bug flags with {clear,set}puid From: Brendan Jackman To: Jonathan Corbet , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Peter Zijlstra Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Brendan Jackman Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Sometimes it can be very useful to run CPU vulnerability mitigations on systems where they aren't known to mitigate any real-world vulnerabilities. This can be handy for mundane reasons like debugging HW-agnostic logic on whatever machine is to hand, but also for research reasons: while some mitigations are focused on individual vulns and uarches, others are fairly general, and it's strategically useful to have an idea how they'd perform on systems where they aren't currently needed. As evidence for this being useful, a flag specifically for Retbleed was added in commit 5c9a92dec323 ("x86/bugs: Add retbleed=3Dforce"). Since CPU bugs are tracked using the same basic mechanism as features, and there are already parameters for manipulating them by hand, extend that mechanism to support bug as well as capabilities. With this patch and setcpuid=3Dsrso, a QEMU guest running on an Intel host will boot with Safe-RET enabled. Signed-off-by: Brendan Jackman --- arch/x86/include/asm/cpufeature.h | 1 + arch/x86/kernel/cpu/common.c | 16 ++++++++++++---- 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufe= ature.h index 0b9611da6c53f19ae6c45d85d1ee191118ad1895..6e17f47ab0521acadb7db38ce59= 34c4717d457ba 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -50,6 +50,7 @@ extern const char * const x86_power_flags[32]; * X86_BUG_ - NCAPINTS*32. */ extern const char * const x86_bug_flags[NBUGINTS*32]; +#define x86_bug_flag(flag) x86_bug_flags[flag] =20 #define test_cpu_cap(c, bit) \ arch_test_bit(bit, (unsigned long *)((c)->x86_capability)) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index e26cf8789f0e1a27ad126f531e05afee0fdebbb8..d94d7ebff42dadae30f77af1ef6= 75d1a83ba6c3f 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1492,7 +1492,8 @@ static inline void parse_set_clear_cpuid(char *arg, b= ool set) =20 /* * Handle naked numbers first for feature flags which don't - * have names. + * have names. It doesn't make sense for a bug not to have a + * name so don't handle bug flags here. */ if (!kstrtouint(opt, 10, &bit)) { if (bit < NCAPINTS * 32) { @@ -1516,11 +1517,18 @@ static inline void parse_set_clear_cpuid(char *arg,= bool set) continue; } =20 - for (bit =3D 0; bit < 32 * NCAPINTS; bit++) { - if (!x86_cap_flag(bit)) + for (bit =3D 0; bit < 32 * (NCAPINTS + NBUGINTS); bit++) { + const char *flag; + + if (bit < 32 * NCAPINTS) + flag =3D x86_cap_flag(bit); + else + flag =3D x86_bug_flag(bit - (32 * NCAPINTS)); + + if (!flag) continue; =20 - if (strcmp(x86_cap_flag(bit), opt)) + if (strcmp(flag, opt)) continue; =20 pr_cont(" %s", opt); --=20 2.48.1.262.g85cc9f2d1e-goog