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Mon, 27 Jan 2025 07:58:14 +0100 From: Daniel Schultz To: , , , , , , , , CC: , , Daniel Schultz Subject: [PATCH] arm64: dts: ti: am64-phyboard-electra: Add DT overlay for X27 connector Date: Sun, 26 Jan 2025 22:57:56 -0800 Message-ID: <20250127065756.3086450-1-d.schultz@phytec.de> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: Diagnostix.phytec.de (172.25.0.14) To Berlix.phytec.de (172.25.0.12) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DB1PEPF000509F1:EE_|PAXP195MB1295:EE_ X-MS-Office365-Filtering-Correlation-Id: 70cdf0e0-98df-4201-8a2f-08dd3e9ffa6b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?F4koGdPQJfaI0JgXfdlnEa4Cez78KTPBno+JWagsWGmLm8YRmRZWTXS8FoBZ?= =?us-ascii?Q?NSObtcgT2VdkabHjf57CvfAWZG70U6+VX4E8g2k6L2xHiN4LDJf/jvlj/FBS?= =?us-ascii?Q?MnMYZO0qzAWLdZmjpszPBjbRiLHl3xeqIKwTzKPRJPrAqN8kDdiZNxGTG4AG?= =?us-ascii?Q?Yyamm+qkq11ZTp2s6vWsMR1dPPuUAUV0Umfg4LEwa13OwqiYp9IB0dpJgxYW?= =?us-ascii?Q?vGBsHC65gyLHpWc/VHCHlh5WdhDUUwnqK0cJEba2gCJ86XaGy2O0Vvi6Mzgy?= =?us-ascii?Q?X3FNvAfQPQH6sjS7iqDgnUPjwWV+TIVG2I5RKB0JQBQyNzsTgWDG7Bwo4q6E?= =?us-ascii?Q?9RaYXCEicj7y2LuJFc5tM/03CDjxnISKTLVUQilop5sm/RjmB3uutfcsURBQ?= =?us-ascii?Q?AIWSHuGGQ2gEN14TeMib6t/BUXC8zeEVlfn3CHjd0mz5LN53s4tDhxMhxmQH?= =?us-ascii?Q?kHVsev5guy40HG8RJlPJgO4t1vRAwmGMa70dT1jVKR4kq4HeLzNVNJFWCcPp?= =?us-ascii?Q?b8K70wvI5daFFCxSH0q1AWwHIMLOvLtbR6e08lPGLGi8k+kyv58PV/7x0uIH?= =?us-ascii?Q?aKzEJd7gBA+bzV7BbWIcS+lEKb4wFghyU42HutSNKxUCPuyXk9tfgl0TsbOr?= =?us-ascii?Q?4fF2+b9naZSWemC4AFgNEkA00px4hdchbiiNhxYTV52HzkAW3iN49QMxkwcb?= =?us-ascii?Q?6ERqiBKOVRpnw4zgKk1HyTxb2GiAbb3CdKXcfwJWpyITyWepLTyRonlp3g5h?= =?us-ascii?Q?E1ZFucja3dpLpN7iHakzNzRAcHGFu1345w405exEjnm0mDSZIdsyHqUsIzmX?= =?us-ascii?Q?co/sSsur9Z+JuyE2HAESr6em15Quzpi+Vj6Zpsh24TxLHapYZXkjEADBcntQ?= =?us-ascii?Q?ACee/y7H1ch6IHgnIgMtNkNpz8MOkcgc4rMRHitZY8QcA7IGSkvJOrP/8D55?= =?us-ascii?Q?AVAmPjihhj0qfxVAz1oy/MjEcPfWkXTvkOKLjNMmL3figzR1Ti4jNbzgYtVF?= =?us-ascii?Q?zIxXhnnoiBLjLJhCv4g+0SwOZwNMTBt8sI3nhIC+MOfqAk9u9Jf/AHzv2A2f?= =?us-ascii?Q?IuXWOBR1AiDebvCG1TKpK4sC8UP567Ix5S7I83y3jQlPUWLt8veweiS4Z6S4?= =?us-ascii?Q?8RdiXDMQ1YsWxOgxBGmJx2kjj8aWNkPaaYHTym9EN6xiYHLFeGBDLQVXgn3j?= =?us-ascii?Q?OuIAJFiXX8SlYkvH4S2iO0XQG9SlsV8WIiihINAxUfwqrkWk8nk1Mgv6i4eP?= =?us-ascii?Q?26odav0ho/LykXf7slcHcRliQJYcCrwQK7kucMOM4jprcfnfZMY6JF4ukd/V?= =?us-ascii?Q?t60WOAZmYvey7oZ/dhryhT/Xqj8bjJ/Au7H1mNz7uK0awM9VG0mOYd6qdeqs?= =?us-ascii?Q?Y464Tw86/CQWowQk1LDL2s+cLf7RB/VLrJI/lR5gbORo0r+uizeSnYrLzS0H?= =?us-ascii?Q?c1y6gAuqlc1xw7T5v3/q96gcefbVWibgtKpj5O6kGv6NSbiHpjvEsQ=3D=3D?= X-Forefront-Antispam-Report: CIP:91.26.50.189;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:Diagnostix.phytec.de;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(376014)(36860700013)(82310400026);DIR:OUT;SFP:1102; X-OriginatorOrg: phytec.de X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jan 2025 06:58:17.7771 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 70cdf0e0-98df-4201-8a2f-08dd3e9ffa6b X-MS-Exchange-CrossTenant-Id: e609157c-80e2-446d-9be3-9c99c2399d29 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e609157c-80e2-446d-9be3-9c99c2399d29;Ip=[91.26.50.189];Helo=[Diagnostix.phytec.de] X-MS-Exchange-CrossTenant-AuthSource: DB1PEPF000509F1.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXP195MB1295 Content-Type: text/plain; charset="utf-8" Add a device tree overlay for SPI1 (spidev), UART3 and GPIO1 on X27 connector. By default, not all interfaces on the X27 connector are accessible due to being disabled or set to alternative pin mux configurations. This overlay activates and configures these interfaces to support connections with external devices. Signed-off-by: Wadim Egorov Signed-off-by: Daniel Schultz --- arch/arm64/boot/dts/ti/Makefile | 3 + ...phyboard-electra-x27-gpio1-spi1-uart3.dtso | 69 +++++++++++++++++++ 2 files changed, 72 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gp= io1-spi1-uart3.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makef= ile index f71360f14f23..a05c9c5612fc 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -58,6 +58,7 @@ dtb-$(CONFIG_ARCH_K3) +=3D k3-am642-evm-nand.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am642-phyboard-electra-rdk.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am642-phyboard-electra-gpio-fan.dtbo dtb-$(CONFIG_ARCH_K3) +=3D k3-am642-phyboard-electra-pcie-usb2.dtbo +dtb-$(CONFIG_ARCH_K3) +=3D k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.= dtbo dtb-$(CONFIG_ARCH_K3) +=3D k3-am642-sk.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am642-tqma64xxl-mbax4xxl.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo @@ -186,6 +187,8 @@ k3-am642-phyboard-electra-gpio-fan-dtbs :=3D \ k3-am642-phyboard-electra-rdk.dtb k3-am642-phyboard-electra-gpio-fan.dtbo k3-am642-phyboard-electra-pcie-usb2-dtbs :=3D \ k3-am642-phyboard-electra-rdk.dtb k3-am642-phyboard-electra-pcie-usb2.dtbo +k3-am642-phyboard-electra-x27-gpio1-spi1-uart3-dtbs :=3D \ + k3-am642-phyboard-electra-rdk.dtb k3-am642-phyboard-electra-x27-gpio1-spi= 1-uart3.dtbo k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs :=3D \ k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs :=3D \ diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi= 1-uart3.dtso b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-s= pi1-uart3.dtso new file mode 100644 index 000000000000..b80d8b6a4fc4 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3= .dtso @@ -0,0 +1,69 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Copyright (C) 2025 PHYTEC Messtechnik GmbH + * Authors: + * Wadim Egorov + * Daniel Schultz + * + * GPIO, SPI and UART examples for the X27 expansion connector. + */ + +/dts-v1/; +/plugin/; + +#include "k3-pinctrl.h" + +&{/} { + aliases { + serial5 =3D "/bus@f4000/serial@2830000"; + }; +}; + +&main_pmx0 { + main_gpio1_exp_header_gpio_pins_default: main-gpio1-exp-header-gpio-pins-= default { + pinctrl-single,pins =3D < + AM64X_IOPAD(0x0220, PIN_INPUT, 7) /* (D14) SPI1_CS1.GPIO1_48 */ + >; + }; + + main_spi1_pins_default: main-spi1-pins-default { + pinctrl-single,pins =3D < + AM64X_IOPAD(0x0224, PIN_INPUT, 0) /* (C14) SPI1_CLK */ + AM64X_IOPAD(0x021C, PIN_OUTPUT, 0) /* (B14) SPI1_CS0 */ + AM64X_IOPAD(0x0228, PIN_OUTPUT, 0) /* (B15) SPI1_D0 */ + AM64X_IOPAD(0x022C, PIN_INPUT, 0) /* (A15) SPI1_D1 */ + >; + }; + + main_uart3_pins_default: main-uart3-pins-default { + pinctrl-single,pins =3D < + AM64X_IOPAD(0x0048, PIN_INPUT, 2) /* (U20) GPMC0_AD3.UART3_RXD */ + AM64X_IOPAD(0x004c, PIN_OUTPUT, 2) /* (U18) GPMC0_AD4.UART3_TXD */ + >; + }; +}; + +&main_gpio1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&main_gpio1_exp_header_gpio_pins_default>; + status =3D "okay"; +}; + +&main_spi1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&main_spi1_pins_default>; + ti,pindir-d0-out-d1-in =3D <1>; + status =3D "okay"; + + spidev@0 { + compatible =3D "rohm,dh2228fv"; + reg =3D <0>; + spi-max-frequency =3D <24000000>; + }; +}; + +&main_uart3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&main_uart3_pins_default>; + status =3D "okay"; +}; --=20 2.25.1