From nobody Sun Dec 14 14:17:53 2025 Received: from fanzine2.igalia.com (fanzine.igalia.com [178.60.130.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 92D93193404 for ; Mon, 27 Jan 2025 20:00:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.60.130.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738008041; cv=none; b=YZ01LB3UvTxtKJIpcnrtn2X1euqJ9tYPB+DDEI5eg4n0PRS27US/53FYPiMYsQdf3cWylJe3tiYci0z76H+LHLbv2Ab0LbNcQIVzEusdCy2B7QTfqjzjtxHNN6mKpOVXPVDNZaNAjZeqXXwq/3AVLwtFgOap3OCAxD5XFSAuCJU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738008041; c=relaxed/simple; bh=41TyPRCFSFu2+DkTwCzDWO3s31VcP+A/SzdTU8NdAGU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XH1++I9MvWfgK6/5ywZy++N1w525EIgpQMh3QTlstjQLRRzNzgk/3N6rwLsBV4yXDH/7jH8nBpz4SRuWUIPf4pLj98Sq33wtNGVlWOL6opPc46xQUYKJnlVtLco7IQFF3nHUSaERwxq5fKPBgApL6bRyqRsdkNRWXDnqt5r+eOI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com; spf=pass smtp.mailfrom=igalia.com; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b=Jm22EwXB; arc=none smtp.client-ip=178.60.130.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=igalia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b="Jm22EwXB" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Cc:To:In-Reply-To:References:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=pa3SZ7L50Y0lXYUgdj505ZfwHnWXpSih8ecBGczhR2o=; b=Jm22EwXBD/j2dD1NwM1WV5s/d2 zN1oXIP/1nNB4fmGIbAtzNORf2dtTHhfYOCQpnuARnYL/mxC8kQGxRJiSqIfrhok+eqdZPl7cRRxn fgS9ECiMXaTqYKw+qnbuTKJsTFNrRcjG4ypExL+ArOTGDwgbGXqTyuUBDVMtF0BembLMLCyAyYi8C 9+4XBD3U7Z7oiqZYGiE2qEqhi9y/ZSzvpUV67QuytfzTSA15EGef6DSVbva3k0ukYgnesok6kIKbF iuPHGVOi2W8A7avpQiGGMbjnLTcX2Xc0V2lJn6HlxUXzG79AjOTtSMu+vn60UdmOgOC9FzhMhDLI1 PcG2kscA==; Received: from 189-68-33-219.dsl.telesp.net.br ([189.68.33.219] helo=[192.168.15.100]) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1tcVHL-003NsK-Uf; Mon, 27 Jan 2025 21:00:15 +0100 From: =?utf-8?q?Andr=C3=A9_Almeida?= Date: Mon, 27 Jan 2025 16:59:40 -0300 Subject: [PATCH v12 2/2] drm/amdgpu: Enable async flip on overlay planes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250127-tonyk-async_flip-v12-2-0f7f8a8610d3@igalia.com> References: <20250127-tonyk-async_flip-v12-0-0f7f8a8610d3@igalia.com> In-Reply-To: <20250127-tonyk-async_flip-v12-0-0f7f8a8610d3@igalia.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Harry Wentland , Leo Li , Rodrigo Siqueira , Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , Xinhui Pan , dmitry.baryshkov@linaro.org, Simon Ser , joshua@froggi.es, Xaver Hugl , Daniel Stone , ville.syrjala@linux.intel.com Cc: kernel-dev@igalia.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, =?utf-8?q?Andr=C3=A9_Almeida?= X-Mailer: b4 0.14.2 amdgpu can handle async flips on overlay planes, so allow it for atomic async checks. Signed-off-by: Andr=C3=A9 Almeida Acked-by: Alex Deucher for the series. Reviewed-by: Harry Wentland --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/driv= ers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c index 774cc3f4f3fd9a964fe48c66eb596d2f6dfee602..6bfed3d1530e6610eea025b477f= 409ee505870da 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c @@ -1258,21 +1258,23 @@ static int amdgpu_dm_plane_atomic_check(struct drm_= plane *plane, } =20 static int amdgpu_dm_plane_atomic_async_check(struct drm_plane *plane, - struct drm_atomic_state *state) + struct drm_atomic_state *state, bool flip) { struct drm_crtc_state *new_crtc_state; struct drm_plane_state *new_plane_state; struct dm_crtc_state *dm_new_crtc_state; =20 - /* Only support async updates on cursor planes. */ - if (plane->type !=3D DRM_PLANE_TYPE_CURSOR) + if (flip) { + if (plane->type !=3D DRM_PLANE_TYPE_OVERLAY) + return -EINVAL; + } else if (plane->type !=3D DRM_PLANE_TYPE_CURSOR) return -EINVAL; =20 new_plane_state =3D drm_atomic_get_new_plane_state(state, plane); new_crtc_state =3D drm_atomic_get_new_crtc_state(state, new_plane_state->= crtc); dm_new_crtc_state =3D to_dm_crtc_state(new_crtc_state); /* Reject overlay cursors for now*/ - if (dm_new_crtc_state->cursor_mode =3D=3D DM_CURSOR_OVERLAY_MODE) + if (!flip && dm_new_crtc_state->cursor_mode =3D=3D DM_CURSOR_OVERLAY_MODE) return -EINVAL; =20 return 0; --=20 2.48.0