From nobody Sun Dec 14 08:06:54 2025 Received: from fanzine2.igalia.com (fanzine.igalia.com [178.60.130.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D2E1C189F43 for ; Mon, 27 Jan 2025 20:00:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.60.130.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738008039; cv=none; b=LrYywsFVzdAoXwYmqLMI5EeWRXH3toH4GKQd1hiAaZkObmnrufzYQQ1gLf2vn8mpiBz37jhBhBTCmjoroPaJAq7L2Z0S5SvVbHQk0jf7YIeC2Ib/75EN3orLmAcDUFwYRKuU7w8m44zfPCZXaEGy2H2UAnZn0rMZ1o9SlVzepT4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738008039; c=relaxed/simple; bh=28biz67+BmEZFNYBzI272g0PePMDSB/OkPGkSnkZzsU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qnq2pYGbKCSz1JtRD5r6JUagtv3lT2OgXFeF3ct3XNENvpGD0bIK2EE9J3r0xgy8mWTi8ry1pAyNWXxpr1iJUh7ZGCn860tlfkZ/6N4q+V5KwSMJYKVyUtvHPG2m4mtrBDSV/Wq5l5ws1NaRZRbxTodpoznlZIPqH8uWRUx7sC8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com; spf=pass smtp.mailfrom=igalia.com; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b=Xni3L5bz; arc=none smtp.client-ip=178.60.130.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=igalia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b="Xni3L5bz" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Cc:To:In-Reply-To:References:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=9Mlk5/7N/mwemi/mYAvH4Yr81WGeVFOIka3DOb6HH44=; b=Xni3L5bzKYhB5KmRPoYfA1fSoo PmEo+xA2V56wehL9K3jQmsP7d5dFcGiZr9QSBc+ZV7MkZOg+EgEOLWh/1Ye0qqbi6PpJF+UAvPdSw jocmG2uLi1Wf/M6KuklCNcOHwi2SMjlnHLcqbfVkGH7eYKxf6mkhn6DFwYKWJ3tgyiNO1SYfURw3O muhIMiWzGmv1bfh+2pmDv7/bzyT+ssj/49sTFelw1BVgSWZ1fmZzTSD6tLsGgmHayOqC2tgGWpcdm 9LkRBRBEVSYwfYtjRRMYVCST23DdGacrWpN7W7b17v2fodRbIxW6Zhz/Y1/Q2qIn5DulnDb5nQjJI WALc5Uzw==; Received: from 189-68-33-219.dsl.telesp.net.br ([189.68.33.219] helo=[192.168.15.100]) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1tcVHG-003NsK-Gm; Mon, 27 Jan 2025 21:00:10 +0100 From: =?utf-8?q?Andr=C3=A9_Almeida?= Date: Mon, 27 Jan 2025 16:59:39 -0300 Subject: [PATCH v12 1/2] drm/atomic: Let drivers decide which planes to async flip Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250127-tonyk-async_flip-v12-1-0f7f8a8610d3@igalia.com> References: <20250127-tonyk-async_flip-v12-0-0f7f8a8610d3@igalia.com> In-Reply-To: <20250127-tonyk-async_flip-v12-0-0f7f8a8610d3@igalia.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Harry Wentland , Leo Li , Rodrigo Siqueira , Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , Xinhui Pan , dmitry.baryshkov@linaro.org, Simon Ser , joshua@froggi.es, Xaver Hugl , Daniel Stone , ville.syrjala@linux.intel.com Cc: kernel-dev@igalia.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, =?utf-8?q?Andr=C3=A9_Almeida?= , Christopher Snowhill X-Mailer: b4 0.14.2 Currently, DRM atomic uAPI allows only primary planes to be flipped asynchronously. However, each driver might be able to perform async flips in other different plane types. To enable drivers to set their own restrictions on which type of plane they can or cannot flip, use the existing atomic_async_check() from struct drm_plane_helper_funcs to enhance this flexibility, thus allowing different plane types to be able to do async flips as well. Create a new parameter for the atomic_async_check(), `bool flip`. This parameter is used to distinguish when this function is being called from a plane update from a full page flip. In order to prevent regressions and such, we keep the current policy: we skip the driver check for the primary plane, because it is always allowed to do async flips on it. Signed-off-by: Andr=C3=A9 Almeida Reviewed-by: Dmitry Baryshkov Reviewed-by: Christopher Snowhill Tested-by: Christopher Snowhill (Radeon RX 7700 XT) --- drivers/gpu/drm/drm_atomic_helper.c | 2 +- drivers/gpu/drm/drm_atomic_uapi.c | 37 +++++++++++++++++++++----= ---- drivers/gpu/drm/loongson/lsdc_plane.c | 3 ++- drivers/gpu/drm/mediatek/mtk_plane.c | 2 +- drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c | 2 +- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 +- drivers/gpu/drm/tegra/dc.c | 3 ++- drivers/gpu/drm/vc4/vc4_plane.c | 2 +- include/drm/drm_modeset_helper_vtables.h | 7 +++++- 9 files changed, 42 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atom= ic_helper.c index 5186d2114a503701e228e382cc45180b0c578d0c..8a5d62c3faecfd764fd48543485= 8fa3933104918 100644 --- a/drivers/gpu/drm/drm_atomic_helper.c +++ b/drivers/gpu/drm/drm_atomic_helper.c @@ -1928,7 +1928,7 @@ int drm_atomic_helper_async_check(struct drm_device *= dev, return -EBUSY; } =20 - ret =3D funcs->atomic_async_check(plane, state); + ret =3D funcs->atomic_async_check(plane, state, false); if (ret !=3D 0) drm_dbg_atomic(dev, "[PLANE:%d:%s] driver async check failed\n", diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic= _uapi.c index 370dc676e3aa543c9827b50df20df78f02b738c9..2765ba90ad8faec6f1c1db112ef= 667e794d465c2 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -27,8 +27,9 @@ * Daniel Vetter */ =20 -#include #include +#include +#include #include #include #include @@ -1063,6 +1064,7 @@ int drm_atomic_set_property(struct drm_atomic_state *= state, struct drm_plane *plane =3D obj_to_plane(obj); struct drm_plane_state *plane_state; struct drm_mode_config *config =3D &plane->dev->mode_config; + const struct drm_plane_helper_funcs *plane_funcs =3D plane->helper_priva= te; =20 plane_state =3D drm_atomic_get_plane_state(state, plane); if (IS_ERR(plane_state)) { @@ -1070,15 +1072,30 @@ int drm_atomic_set_property(struct drm_atomic_state= *state, break; } =20 - if (async_flip && - (plane_state->plane->type !=3D DRM_PLANE_TYPE_PRIMARY || - (prop !=3D config->prop_fb_id && - prop !=3D config->prop_in_fence_fd && - prop !=3D config->prop_fb_damage_clips))) { - ret =3D drm_atomic_plane_get_property(plane, plane_state, - prop, &old_val); - ret =3D drm_atomic_check_prop_changes(ret, old_val, prop_value, prop); - break; + if (async_flip) { + /* check if the prop does a nop change */ + if ((prop !=3D config->prop_fb_id && + prop !=3D config->prop_in_fence_fd && + prop !=3D config->prop_fb_damage_clips)) { + ret =3D drm_atomic_plane_get_property(plane, plane_state, + prop, &old_val); + ret =3D drm_atomic_check_prop_changes(ret, old_val, prop_value, prop); + } + + /* ask the driver if this non-primary plane is supported */ + if (plane->type !=3D DRM_PLANE_TYPE_PRIMARY) { + ret =3D -EINVAL; + + if (plane_funcs && plane_funcs->atomic_async_check) + ret =3D plane_funcs->atomic_async_check(plane, state, true); + + if (ret) { + drm_dbg_atomic(prop->dev, + "[PLANE:%d:%s] does not support async flips\n", + obj->id, plane->name); + break; + } + } } =20 ret =3D drm_atomic_plane_set_property(plane, diff --git a/drivers/gpu/drm/loongson/lsdc_plane.c b/drivers/gpu/drm/loongs= on/lsdc_plane.c index d227a2c1dcf16a3d5190de3893a55228ec70b254..aa9a97f9c4dc28eea3098507ce5= 2e6aa6caa46eb 100644 --- a/drivers/gpu/drm/loongson/lsdc_plane.c +++ b/drivers/gpu/drm/loongson/lsdc_plane.c @@ -171,7 +171,8 @@ static const struct drm_plane_helper_funcs lsdc_primary= _helper_funcs =3D { }; =20 static int lsdc_cursor_plane_atomic_async_check(struct drm_plane *plane, - struct drm_atomic_state *state) + struct drm_atomic_state *state, + bool flip) { struct drm_plane_state *new_state; struct drm_crtc_state *crtc_state; diff --git a/drivers/gpu/drm/mediatek/mtk_plane.c b/drivers/gpu/drm/mediate= k/mtk_plane.c index 8a48b3b0a95676c9823daa2052aefb7f86f629ff..655106bbb76d3300edb71fa0275= 91b2f943bbe68 100644 --- a/drivers/gpu/drm/mediatek/mtk_plane.c +++ b/drivers/gpu/drm/mediatek/mtk_plane.c @@ -101,7 +101,7 @@ static void mtk_plane_destroy_state(struct drm_plane *p= lane, } =20 static int mtk_plane_atomic_async_check(struct drm_plane *plane, - struct drm_atomic_state *state) + struct drm_atomic_state *state, bool flip) { struct drm_plane_state *new_plane_state =3D drm_atomic_get_new_plane_stat= e(state, plane); diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c b/drivers/gpu/drm/m= sm/disp/mdp5/mdp5_plane.c index 62de248ed1b09ae479327691eea4866391977b85..bb16019219387e7c5e714106b2f= b8054d0db85c1 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c @@ -368,7 +368,7 @@ static void mdp5_plane_atomic_update(struct drm_plane *= plane, } =20 static int mdp5_plane_atomic_async_check(struct drm_plane *plane, - struct drm_atomic_state *state) + struct drm_atomic_state *state, bool flip) { struct drm_plane_state *new_plane_state =3D drm_atomic_get_new_plane_stat= e(state, plane); diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/= rockchip/rockchip_drm_vop.c index 57747f1cff26e444ef3569983d6a7f7922f03ff7..e3596e2b557d042dcc660adbed1= 4a468f2b1d484 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -1072,7 +1072,7 @@ static void vop_plane_atomic_update(struct drm_plane = *plane, } =20 static int vop_plane_atomic_async_check(struct drm_plane *plane, - struct drm_atomic_state *state) + struct drm_atomic_state *state, bool flip) { struct drm_plane_state *new_plane_state =3D drm_atomic_get_new_plane_stat= e(state, plane); diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index 430b2eededb2b5a3aa0c71022240076c027f5d90..798507a8ae56d6789feb95dccdd= 23b2e63d9c148 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -1025,7 +1025,8 @@ static void tegra_cursor_atomic_disable(struct drm_pl= ane *plane, tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS); } =20 -static int tegra_cursor_atomic_async_check(struct drm_plane *plane, struct= drm_atomic_state *state) +static int tegra_cursor_atomic_async_check(struct drm_plane *plane, struct= drm_atomic_state *state, + bool flip) { struct drm_plane_state *new_state =3D drm_atomic_get_new_plane_state(stat= e, plane); struct drm_crtc_state *crtc_state; diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plan= e.c index d608860d525f6a813c7e4c46c8f8aaed16dc735c..c5e84d3494d273d969a041e9200= c06de2c10105a 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -2338,7 +2338,7 @@ static void vc4_plane_atomic_async_update(struct drm_= plane *plane, } =20 static int vc4_plane_atomic_async_check(struct drm_plane *plane, - struct drm_atomic_state *state) + struct drm_atomic_state *state, bool flip) { struct vc4_dev *vc4 =3D to_vc4_dev(plane->dev); struct drm_plane_state *new_plane_state =3D drm_atomic_get_new_plane_stat= e(state, diff --git a/include/drm/drm_modeset_helper_vtables.h b/include/drm/drm_mod= eset_helper_vtables.h index ec59015aec3cf3ba01510031c55df8c0b3e0b382..0939ace53e7eb51db54dc133d2a= 8f898d31fc950 100644 --- a/include/drm/drm_modeset_helper_vtables.h +++ b/include/drm/drm_modeset_helper_vtables.h @@ -1400,13 +1400,18 @@ struct drm_plane_helper_funcs { * given update can be committed asynchronously, that is, if it can * jump ahead of the state currently queued for update. * + * This function is also used by drm_atomic_set_property() to determine + * if the plane can be flipped in async. The flip flag is used to + * distinguish if the function is used for just the plane state or for a + * flip. + * * RETURNS: * * Return 0 on success and any error returned indicates that the update * can not be applied in asynchronous manner. */ int (*atomic_async_check)(struct drm_plane *plane, - struct drm_atomic_state *state); + struct drm_atomic_state *state, bool flip); =20 /** * @atomic_async_update: --=20 2.48.0 From nobody Sun Dec 14 08:06:54 2025 Received: from fanzine2.igalia.com (fanzine.igalia.com [178.60.130.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 92D93193404 for ; Mon, 27 Jan 2025 20:00:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.60.130.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738008041; cv=none; b=YZ01LB3UvTxtKJIpcnrtn2X1euqJ9tYPB+DDEI5eg4n0PRS27US/53FYPiMYsQdf3cWylJe3tiYci0z76H+LHLbv2Ab0LbNcQIVzEusdCy2B7QTfqjzjtxHNN6mKpOVXPVDNZaNAjZeqXXwq/3AVLwtFgOap3OCAxD5XFSAuCJU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738008041; c=relaxed/simple; bh=41TyPRCFSFu2+DkTwCzDWO3s31VcP+A/SzdTU8NdAGU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XH1++I9MvWfgK6/5ywZy++N1w525EIgpQMh3QTlstjQLRRzNzgk/3N6rwLsBV4yXDH/7jH8nBpz4SRuWUIPf4pLj98Sq33wtNGVlWOL6opPc46xQUYKJnlVtLco7IQFF3nHUSaERwxq5fKPBgApL6bRyqRsdkNRWXDnqt5r+eOI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com; spf=pass smtp.mailfrom=igalia.com; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b=Jm22EwXB; arc=none smtp.client-ip=178.60.130.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=igalia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b="Jm22EwXB" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Cc:To:In-Reply-To:References:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=pa3SZ7L50Y0lXYUgdj505ZfwHnWXpSih8ecBGczhR2o=; b=Jm22EwXBD/j2dD1NwM1WV5s/d2 zN1oXIP/1nNB4fmGIbAtzNORf2dtTHhfYOCQpnuARnYL/mxC8kQGxRJiSqIfrhok+eqdZPl7cRRxn fgS9ECiMXaTqYKw+qnbuTKJsTFNrRcjG4ypExL+ArOTGDwgbGXqTyuUBDVMtF0BembLMLCyAyYi8C 9+4XBD3U7Z7oiqZYGiE2qEqhi9y/ZSzvpUV67QuytfzTSA15EGef6DSVbva3k0ukYgnesok6kIKbF iuPHGVOi2W8A7avpQiGGMbjnLTcX2Xc0V2lJn6HlxUXzG79AjOTtSMu+vn60UdmOgOC9FzhMhDLI1 PcG2kscA==; Received: from 189-68-33-219.dsl.telesp.net.br ([189.68.33.219] helo=[192.168.15.100]) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1tcVHL-003NsK-Uf; Mon, 27 Jan 2025 21:00:15 +0100 From: =?utf-8?q?Andr=C3=A9_Almeida?= Date: Mon, 27 Jan 2025 16:59:40 -0300 Subject: [PATCH v12 2/2] drm/amdgpu: Enable async flip on overlay planes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250127-tonyk-async_flip-v12-2-0f7f8a8610d3@igalia.com> References: <20250127-tonyk-async_flip-v12-0-0f7f8a8610d3@igalia.com> In-Reply-To: <20250127-tonyk-async_flip-v12-0-0f7f8a8610d3@igalia.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Harry Wentland , Leo Li , Rodrigo Siqueira , Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , Xinhui Pan , dmitry.baryshkov@linaro.org, Simon Ser , joshua@froggi.es, Xaver Hugl , Daniel Stone , ville.syrjala@linux.intel.com Cc: kernel-dev@igalia.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, =?utf-8?q?Andr=C3=A9_Almeida?= X-Mailer: b4 0.14.2 amdgpu can handle async flips on overlay planes, so allow it for atomic async checks. Signed-off-by: Andr=C3=A9 Almeida Acked-by: Alex Deucher for the series. Reviewed-by: Harry Wentland --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/driv= ers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c index 774cc3f4f3fd9a964fe48c66eb596d2f6dfee602..6bfed3d1530e6610eea025b477f= 409ee505870da 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c @@ -1258,21 +1258,23 @@ static int amdgpu_dm_plane_atomic_check(struct drm_= plane *plane, } =20 static int amdgpu_dm_plane_atomic_async_check(struct drm_plane *plane, - struct drm_atomic_state *state) + struct drm_atomic_state *state, bool flip) { struct drm_crtc_state *new_crtc_state; struct drm_plane_state *new_plane_state; struct dm_crtc_state *dm_new_crtc_state; =20 - /* Only support async updates on cursor planes. */ - if (plane->type !=3D DRM_PLANE_TYPE_CURSOR) + if (flip) { + if (plane->type !=3D DRM_PLANE_TYPE_OVERLAY) + return -EINVAL; + } else if (plane->type !=3D DRM_PLANE_TYPE_CURSOR) return -EINVAL; =20 new_plane_state =3D drm_atomic_get_new_plane_state(state, plane); new_crtc_state =3D drm_atomic_get_new_crtc_state(state, new_plane_state->= crtc); dm_new_crtc_state =3D to_dm_crtc_state(new_crtc_state); /* Reject overlay cursors for now*/ - if (dm_new_crtc_state->cursor_mode =3D=3D DM_CURSOR_OVERLAY_MODE) + if (!flip && dm_new_crtc_state->cursor_mode =3D=3D DM_CURSOR_OVERLAY_MODE) return -EINVAL; =20 return 0; --=20 2.48.0