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Mon, 27 Jan 2025 05:48:30 -0800 (PST) From: Krzysztof Kozlowski Date: Mon, 27 Jan 2025 14:47:52 +0100 Subject: [PATCH 19/24] arm64: dts: qcom: sm8150: Use the header with DSI phy clock IDs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250127-dts-qcom-dsi-phy-clocks-v1-19-9d8ddbcb1c7f@linaro.org> References: <20250127-dts-qcom-dsi-phy-clocks-v1-0-9d8ddbcb1c7f@linaro.org> In-Reply-To: <20250127-dts-qcom-dsi-phy-clocks-v1-0-9d8ddbcb1c7f@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3141; i=krzysztof.kozlowski@linaro.org; h=from:subject:message-id; bh=CyufeZicSnDkcW59HxvT9leNYEDXngWCu/28kgii9/g=; b=owEBbQKS/ZANAwAKAcE3ZuaGi4PXAcsmYgBnl46QXXdDZKeNRCKZUZ7IL2BUSuaNPjgYxX9AF ZmHrGi62Y6JAjMEAAEKAB0WIQTd0mIoPREbIztuuKjBN2bmhouD1wUCZ5eOkAAKCRDBN2bmhouD 18aeEACBCsWMSkEtIN0zSs0Pqp2GhGoaDAsZ3iL8hVTNJG3E7fupM+wftFkJl6Fq90h0gERPWFx XiCxSmCNsjoPo3/f1VWWMzRTr9D5c4cFrFjhmceme8FvEmpiROdQ4zHqWhEBx31wYrDynDy5laq 3P+gHA1A6V3VX6BEtMUWzs46SsPIQbBfWZlKD/wy7CpftR8xp683J1Q4bBfdp0475vIUfZrzu4D cmyyOFAKEz6rB/pB0GJn0/71ra8qsvuB9t8Cgvqc72bUWn+E0jj3iCKL/eCaIZow0lMA+u8S+4R DkCuc4I8gpxz323LppeZzPUiwR3e8OtpyhSgbyEby8UgI6d2vd6FGmd3ouJxycnpWPRGktIhuxj X4nGeGFUbHndEqZM9zIUEc8BEgvST2myGZdgYpSYtRBkSp2XOQ6FEFuZrdTM2qYwf5vJqtP9kcM H7aZ9odbO/4WDqYm01+XWGCaZD3vAssA2H467VtEeIsfIpX4nsevlmSlTYIBKPtFFP19hX0v0e6 c2FcasvnOf9TcmJFqn6o51Fy+B3+70DgDYQ8NPr06Ff14ZoOSd8AIbXz3vioHlUstPkND70FcoR LvNMrKwnSvJPJ0qitHdKq9b0cqk5AYsQOtH83B+vNBwF0yWaXkxy3fLJ2vaF+W8vcfnJech/p7+ n+cE8s7GUMHl9Jg== X-Developer-Key: i=krzysztof.kozlowski@linaro.org; a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B Use the header with DSI phy clock IDs to make code more readable. Signed-off-by: Krzysztof Kozlowski --- Depends on: https://lore.kernel.org/all/20250127132105.107138-1-krzysztof.kozlowski@lin= aro.org/ --- arch/arm64/boot/dts/qcom/sm8150-hdk.dts | 3 ++- arch/arm64/boot/dts/qcom/sm8150.dtsi | 17 +++++++++-------- 2 files changed, 11 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts b/arch/arm64/boot/dts/= qcom/sm8150-hdk.dts index 6ea883b1edfa6c511730550f4db0cb9c25fc633d..20587535ccef881df1cdff33f5d= 21dc1765949bd 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts @@ -500,7 +500,8 @@ &mdss_dsi1 { qcom,dual-dsi-mode; =20 /* DSI1 is slave, so use DSI0 clocks */ - assigned-clock-parents =3D <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; + assigned-clock-parents =3D <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>; =20 status =3D "okay"; =20 diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qco= m/sm8150.dtsi index 4dbda54b47a54d1fa9c3fbeb441f8bc852e52f75..2aca3fdae47ceef9b3030613ec2= b8f3a6c1a3356 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -3981,8 +3982,8 @@ mdss_dsi0: dsi@ae94000 { =20 assigned-clocks =3D <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; - assigned-clock-parents =3D <&mdss_dsi0_phy 0>, - <&mdss_dsi0_phy 1>; + assigned-clock-parents =3D <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>; =20 operating-points-v2 =3D <&dsi_opp_table>; power-domains =3D <&rpmhpd SM8150_MMCX>; @@ -4074,8 +4075,8 @@ mdss_dsi1: dsi@ae96000 { =20 assigned-clocks =3D <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>; - assigned-clock-parents =3D <&mdss_dsi1_phy 0>, - <&mdss_dsi1_phy 1>; + assigned-clock-parents =3D <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>; =20 operating-points-v2 =3D <&dsi_opp_table>; power-domains =3D <&rpmhpd SM8150_MMCX>; @@ -4130,10 +4131,10 @@ dispcc: clock-controller@af00000 { compatible =3D "qcom,sm8150-dispcc"; reg =3D <0 0x0af00000 0 0x10000>; clocks =3D <&rpmhcc RPMH_CXO_CLK>, - <&mdss_dsi0_phy 0>, - <&mdss_dsi0_phy 1>, - <&mdss_dsi1_phy 0>, - <&mdss_dsi1_phy 1>, + <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>, + <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>, <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; clock-names =3D "bi_tcxo", --=20 2.43.0