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[90.1.180.114]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38c2a313383sm11480639f8f.36.2025.01.27.06.04.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Jan 2025 06:04:51 -0800 (PST) From: Guillaume Ranquet Date: Mon, 27 Jan 2025 14:59:33 +0100 Subject: [PATCH v5 2/2] iio: adc: ad7173: add openwire detection support for single conversions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250127-ad4111_openwire-v5-2-ef2db05c384f@baylibre.com> References: <20250127-ad4111_openwire-v5-0-ef2db05c384f@baylibre.com> In-Reply-To: <20250127-ad4111_openwire-v5-0-ef2db05c384f@baylibre.com> To: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Guillaume Ranquet , Nuno Sa X-Mailer: b4 0.15-dev Some chips of the ad7173 family supports open wire detection. Generate a level fault event whenever an external source is disconnected from the system input on single conversions. Reviewed-by: Nuno Sa Signed-off-by: Guillaume Ranquet --- drivers/iio/adc/ad7173.c | 179 +++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 179 insertions(+) diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index 8b438c689594..1855929b23d0 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -35,6 +35,7 @@ #include =20 #include +#include #include #include #include @@ -102,6 +103,7 @@ =20 #define AD7173_GPIO_PDSW BIT(14) #define AD7173_GPIO_OP_EN2_3 BIT(13) +#define AD4111_GPIO_GP_OW_EN BIT(12) #define AD7173_GPIO_MUX_IO BIT(12) #define AD7173_GPIO_SYNC_EN BIT(11) #define AD7173_GPIO_ERR_EN BIT(10) @@ -149,6 +151,7 @@ =20 #define AD7173_FILTER_ODR0_MASK GENMASK(5, 0) #define AD7173_MAX_CONFIGS 8 +#define AD4111_OW_DET_THRSH_MV 300 =20 #define AD7173_MODE_CAL_INT_ZERO 0x4 /* Internal Zero-Scale Calibration */ #define AD7173_MODE_CAL_INT_FULL 0x5 /* Internal Full-Scale Calibration */ @@ -182,11 +185,15 @@ struct ad7173_device_info { bool has_int_ref; bool has_ref2; bool has_internal_fs_calibration; + bool has_openwire_det; bool higher_gpio_bits; u8 num_gpios; }; =20 struct ad7173_channel_config { + /* Openwire detection threshold */ + unsigned int openwire_thrsh_raw; + int openwire_comp_chan; u8 cfg_slot; bool live; =20 @@ -203,6 +210,7 @@ struct ad7173_channel { unsigned int ain; struct ad7173_channel_config cfg; u8 syscalib_mode; + bool openwire_det_en; }; =20 struct ad7173_state { @@ -394,6 +402,76 @@ static int ad7173_calibrate_all(struct ad7173_state *s= t, struct iio_dev *indio_d return 0; } =20 +/* + * Associative array of channel pairs for open wire detection + * The array is indexed by ain and gives the associated channel pair + * to perform the open wire detection with + * the channel pair [0] is for non differential and pair [1] + * is for differential inputs + */ +static int openwire_ain_to_channel_pair[][2][2] =3D { +/* AIN Single Differential */ + [0] =3D { {0, 15}, {1, 2} }, + [1] =3D { {1, 2}, {2, 1} }, + [2] =3D { {3, 4}, {5, 6} }, + [3] =3D { {5, 6}, {6, 5} }, + [4] =3D { {7, 8}, {9, 10} }, + [5] =3D { {9, 10}, {10, 9} }, + [6] =3D { {11, 12}, {13, 14} }, + [7] =3D { {13, 14}, {14, 13} }, +}; + +/* + * Openwire detection on ad4111 works by running the same input measurement + * on two different channels and compare if the difference between the two + * measurements exceeds a certain value (typical 300mV) + */ +static int ad4111_openwire_event(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan) +{ + struct ad7173_state *st =3D iio_priv(indio_dev); + struct ad7173_channel *adchan =3D &st->channels[chan->address]; + struct ad7173_channel_config *cfg =3D &adchan->cfg; + int ret, val1, val2; + + ret =3D regmap_set_bits(st->reg_gpiocon_regmap, AD7173_REG_GPIO, + AD4111_GPIO_GP_OW_EN); + if (ret) + return ret; + + adchan->cfg.openwire_comp_chan =3D + openwire_ain_to_channel_pair[chan->channel][chan->differential][0]; + + ret =3D ad_sigma_delta_single_conversion(indio_dev, chan, &val1); + if (ret < 0) { + dev_err(&indio_dev->dev, + "Error running ad_sigma_delta single conversion: %d", ret); + goto out; + } + + adchan->cfg.openwire_comp_chan =3D + openwire_ain_to_channel_pair[chan->channel][chan->differential][1]; + + ret =3D ad_sigma_delta_single_conversion(indio_dev, chan, &val2); + if (ret < 0) { + dev_err(&indio_dev->dev, + "Error running ad_sigma_delta single conversion: %d", ret); + goto out; + } + + if (abs(val1 - val2) > cfg->openwire_thrsh_raw) + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, chan->address, + IIO_EV_TYPE_FAULT, IIO_EV_DIR_FAULT_OPENWIRE), + iio_get_time_ns(indio_dev)); + +out: + adchan->cfg.openwire_comp_chan =3D -1; + regmap_clear_bits(st->reg_gpiocon_regmap, AD7173_REG_GPIO, + AD4111_GPIO_GP_OW_EN); + return ret; +} + static int ad7173_mask_xlate(struct gpio_regmap *gpio, unsigned int base, unsigned int offset, unsigned int *reg, unsigned int *mask) @@ -591,6 +669,9 @@ static int ad7173_set_channel(struct ad_sigma_delta *sd= , unsigned int channel) FIELD_PREP(AD7173_CH_SETUP_SEL_MASK, st->channels[channel].cfg.cfg_= slot) | st->channels[channel].ain; =20 + if (st->channels[channel].cfg.openwire_comp_chan >=3D 0) + channel =3D st->channels[channel].cfg.openwire_comp_chan; + return ad_sd_write_reg(&st->sd, AD7173_REG_CH(channel), 2, val); } =20 @@ -639,6 +720,11 @@ static int ad7173_disable_all(struct ad_sigma_delta *s= d) =20 static int ad7173_disable_one(struct ad_sigma_delta *sd, unsigned int chan) { + struct ad7173_state *st =3D ad_sigma_delta_to_ad7173(sd); + + if (st->channels[chan].cfg.openwire_comp_chan >=3D 0) + chan =3D st->channels[chan].cfg.openwire_comp_chan; + return ad_sd_write_reg(sd, AD7173_REG_CH(chan), 2, 0); } =20 @@ -690,6 +776,7 @@ static const struct ad7173_device_info ad4111_device_in= fo =3D { .has_current_inputs =3D true, .has_int_ref =3D true, .has_internal_fs_calibration =3D true, + .has_openwire_det =3D true, .clock =3D 2 * HZ_PER_MHZ, .sinc5_data_rates =3D ad7173_sinc5_data_rates, .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), @@ -1000,6 +1087,12 @@ static int ad7173_read_raw(struct iio_dev *indio_dev, if (ret < 0) return ret; =20 + if (ch->openwire_det_en) { + ret =3D ad4111_openwire_event(indio_dev, chan); + if (ret < 0) + return ret; + } + return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: =20 @@ -1144,12 +1237,57 @@ static int ad7173_debug_reg_access(struct iio_dev *= indio_dev, unsigned int reg, return ad_sd_write_reg(&st->sd, reg, reg_size, writeval); } =20 +static int ad7173_write_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + bool state) +{ + struct ad7173_state *st =3D iio_priv(indio_dev); + struct ad7173_channel *adchan =3D &st->channels[chan->address]; + + switch (type) { + case IIO_EV_TYPE_FAULT: + adchan->openwire_det_en =3D state; + return 0; + default: + return -EINVAL; + } +} + +static int ad7173_read_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir) +{ + struct ad7173_state *st =3D iio_priv(indio_dev); + struct ad7173_channel *adchan =3D &st->channels[chan->address]; + + switch (type) { + case IIO_EV_TYPE_FAULT: + return adchan->openwire_det_en; + default: + return -EINVAL; + } +} + +static const struct iio_event_spec ad4111_events[] =3D { + { + .type =3D IIO_EV_TYPE_FAULT, + .dir =3D IIO_EV_DIR_FAULT_OPENWIRE, + .mask_separate =3D BIT(IIO_EV_INFO_VALUE), + .mask_shared_by_all =3D BIT(IIO_EV_INFO_ENABLE), + }, +}; + static const struct iio_info ad7173_info =3D { .read_raw =3D &ad7173_read_raw, .write_raw =3D &ad7173_write_raw, .debugfs_reg_access =3D &ad7173_debug_reg_access, .validate_trigger =3D ad_sd_validate_trigger, .update_scan_mode =3D ad7173_update_scan_mode, + .write_event_config =3D ad7173_write_event_config, + .read_event_config =3D ad7173_read_event_config, }; =20 static const struct iio_scan_type ad4113_scan_type =3D { @@ -1353,6 +1491,37 @@ static int ad7173_validate_reference(struct ad7173_s= tate *st, int ref_sel) return 0; } =20 +static int ad7173_validate_openwire_ain_inputs(struct ad7173_state *st, + bool differential, + unsigned int ain0, + unsigned int ain1) +{ + /* + * If the channel is configured as differential, + * the ad4111 requires specific ains to be used together + */ + if (differential) + return (ain0 % 2) ? (ain0 - 1) =3D=3D ain1 : (ain0 + 1) =3D=3D ain1; + + return ain1 =3D=3D AD4111_VINCOM_INPUT; +} + +static unsigned int ad7173_calc_openwire_thrsh_raw(struct ad7173_state *st, + struct iio_chan_spec *chan, + struct ad7173_channel *chan_st_priv, + unsigned int thrsh_mv) { + unsigned int thrsh_raw; + + thrsh_raw =3D + BIT(chan->scan_type.realbits - !!(chan_st_priv->cfg.bipolar)) + * thrsh_mv + / ad7173_get_ref_voltage_milli(st, chan_st_priv->cfg.ref_sel); + if (chan->channel < st->info->num_voltage_in_div) + thrsh_raw /=3D AD4111_DIVIDER_RATIO; + + return thrsh_raw; +} + static int ad7173_fw_parse_channel_config(struct iio_dev *indio_dev) { struct ad7173_channel *chans_st_arr, *chan_st_priv; @@ -1400,6 +1569,7 @@ static int ad7173_fw_parse_channel_config(struct iio_= dev *indio_dev) chan_st_priv->cfg.bipolar =3D false; chan_st_priv->cfg.input_buf =3D st->info->has_input_buf; chan_st_priv->cfg.ref_sel =3D AD7173_SETUP_REF_SEL_INT_REF; + chan_st_priv->cfg.openwire_comp_chan =3D -1; st->adc_mode |=3D AD7173_ADC_MODE_REF_EN; if (st->info->data_reg_only_16bit) chan_arr[chan_index].scan_type =3D ad4113_scan_type; @@ -1466,6 +1636,7 @@ static int ad7173_fw_parse_channel_config(struct iio_= dev *indio_dev) chan->channel =3D ain[0]; chan_st_priv->cfg.input_buf =3D st->info->has_input_buf; chan_st_priv->cfg.odr =3D 0; + chan_st_priv->cfg.openwire_comp_chan =3D -1; =20 chan_st_priv->cfg.bipolar =3D fwnode_property_read_bool(child, "bipolar"= ); if (chan_st_priv->cfg.bipolar) @@ -1480,6 +1651,14 @@ static int ad7173_fw_parse_channel_config(struct iio= _dev *indio_dev) chan_st_priv->cfg.input_buf =3D st->info->has_input_buf; chan->channel2 =3D ain[1]; chan_st_priv->ain =3D AD7173_CH_ADDRESS(ain[0], ain[1]); + if (st->info->has_openwire_det && + ad7173_validate_openwire_ain_inputs(st, chan->differential, ain[0],= ain[1])) { + chan->event_spec =3D ad4111_events; + chan->num_event_specs =3D ARRAY_SIZE(ad4111_events); + chan_st_priv->cfg.openwire_thrsh_raw =3D + ad7173_calc_openwire_thrsh_raw(st, chan, chan_st_priv, + AD4111_OW_DET_THRSH_MV); + } } =20 if (st->info->data_reg_only_16bit) --=20 2.47.1