From nobody Mon Feb 9 07:56:31 2026 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4822521ADB2; Fri, 24 Jan 2025 12:42:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737722532; cv=none; b=ERlc71emSPmW3zos/78kVq4piw8K4Hzr9KafUxxkyovzKZhI+zjYyqAZqvYtVrtn3xsnputzoOGl/kwKn6GWPFaH8EsgokyMA6CpW7YFsxi31x+++YuO9zjZpdQjHij3DTkXmNCrUnrD8Lh2ah4jA3SNQncayxIsAjY2oa/g5JY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737722532; c=relaxed/simple; bh=LrB1NL9sCl0E9cw6uEYx1FqVs3ie8bmx1aVs2RByPnA=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=Yr/WIZOuPY1w17QUrvFz+k5dhYOvIBBeO8zZkgTXazL7EGO/5rubZrgT6vWyZrEXIeBIBTmbJZYuZ1+FhOUv9X/CEFCMqI5uUh5GNXf8colOIeXpSwvvX6vv2Ss2p/Fhn6jWX3j689Z9qxodaPMCdjkS4m0TQfOlYX2GjUsy0Eo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=KgCYOHIH; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="KgCYOHIH" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 50OCft1f1355368 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 24 Jan 2025 06:41:55 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1737722515; bh=Y0droG6bfOVQ9ccS8dcPaAEGjjMS1WyNZBdFc7z/3EM=; h=From:To:CC:Subject:Date; b=KgCYOHIHrPe3VeMYjUaew8+9jcRsa1Oa71tscE15qycA+G1yBoNzK8kbpA4Slo+Nr SJW2k2Vyg8/ipdjAGkI4sDsgpOTcVrQbbufmOzhtW+Azaw6b3DR//nVIe32N9DTdx0 Di+Pxr69L4Tg25f4ObaNM83SVeDDWvrww6/+CpZk= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 50OCft2s020912 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 24 Jan 2025 06:41:55 -0600 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 24 Jan 2025 06:41:54 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 24 Jan 2025 06:41:54 -0600 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [10.24.72.104]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 50OCforC023206; Fri, 24 Jan 2025 06:41:51 -0600 From: Siddharth Vadapalli To: , , , , , CC: , , , , Subject: [PATCH] arm64: dts: ti: k3-j784s4-j742s2-evm: Add overlay to enable USB0 Type-A Date: Fri, 24 Jan 2025 18:11:49 +0530 Message-ID: <20250124124150.2024963-1-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The USB0 instance of the USB controller on both the J742S2 EVM and the J784S4 EVM supports a single USB interface at a time among the following: 1. USB3.1 Gen1 Type C interface 2. Two USB2.0 Type A interfaces via an on-board USB Hub. By default, the USB3.1 Gen1 Type C interface is supported on both of the EVMs. Enable the USB2.0 Type A interface by configuring the USB2.0_MUX_SEL mux. Additionally, set the Dual-Role Mode to Host since a Type-A interface is only associated with the Host Mode of operation. Signed-off-by: Siddharth Vadapalli --- Hello, This patch is based on linux-next tagged next-20250124. Since Linux boot is broken on all TI K3 SoCs including J742S2 and J784S4 due to: https://github.com/torvalds/linux/commit/ba5095ebbc7a as indicated at: https://lore.kernel.org/r/b2413460-ec8b-4c77-99b8-4c32b262439a@ti.com/ this patch was tested on J784S4-EVM by reverting the aforementioned commit. Logs validating the USB2.0 Type-A Connector on J784S4-EVM using a USB Pen Drive: https://gist.github.com/Siddharth-Vadapalli-at-TI/663d703912ae574e39d7a7842= 1e404c8 Regards, Siddharth. arch/arm64/boot/dts/ti/Makefile | 7 +++++ .../ti/k3-j784s4-j742s2-evm-usb0-type-a.dtso | 29 +++++++++++++++++++ 2 files changed, 36 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-usb0-type-a= .dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makef= ile index 8a4bdf87e2d4..95b8fd0981d7 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -127,6 +127,7 @@ dtb-$(CONFIG_ARCH_K3) +=3D k3-j784s4-evm.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-j784s4-evm-pcie0-pcie1-ep.dtbo dtb-$(CONFIG_ARCH_K3) +=3D k3-j784s4-evm-quad-port-eth-exp1.dtbo dtb-$(CONFIG_ARCH_K3) +=3D k3-j784s4-evm-usxgmii-exp1-exp2.dtbo +dtb-$(CONFIG_ARCH_K3) +=3D k3-j784s4-j742s2-evm-usb0-type-a.dtbo =20 # Boards with J742S2 SoC dtb-$(CONFIG_ARCH_K3) +=3D k3-j742s2-evm.dtb @@ -209,10 +210,14 @@ k3-j721e-sk-csi2-dual-imx219-dtbs :=3D k3-j721e-sk.dt= b \ k3-j721e-sk-csi2-dual-imx219.dtbo k3-j721s2-evm-pcie1-ep-dtbs :=3D k3-j721s2-common-proc-board.dtb \ k3-j721s2-evm-pcie1-ep.dtbo +k3-j742s2-evm-usb0-type-a-dtbs :=3D k3-j742s2-evm.dtb \ + k3-j784s4-j742s2-evm-usb0-type-a.dtbo k3-j784s4-evm-pcie0-pcie1-ep-dtbs :=3D k3-j784s4-evm.dtb \ k3-j784s4-evm-pcie0-pcie1-ep.dtbo k3-j784s4-evm-quad-port-eth-exp1-dtbs :=3D k3-j784s4-evm.dtb \ k3-j784s4-evm-quad-port-eth-exp1.dtbo +k3-j784s4-evm-usb0-type-a-dtbs :=3D k3-j784s4-evm.dtb \ + k3-j784s4-j742s2-evm-usb0-type-a.dtbo k3-j784s4-evm-usxgmii-exp1-exp2-dtbs :=3D k3-j784s4-evm.dtb \ k3-j784s4-evm-usxgmii-exp1-exp2.dtbo dtb- +=3D k3-am625-beagleplay-csi2-ov5640.dtb \ @@ -243,8 +248,10 @@ dtb- +=3D k3-am625-beagleplay-csi2-ov5640.dtb \ k3-j721e-evm-pcie1-ep.dtb \ k3-j721e-sk-csi2-dual-imx219.dtb \ k3-j721s2-evm-pcie1-ep.dtb \ + k3-j742s2-evm-usb0-type-a.dtb \ k3-j784s4-evm-pcie0-pcie1-ep.dtb \ k3-j784s4-evm-quad-port-eth-exp1.dtb \ + k3-j784s4-evm-usb0-type-a.dtb \ k3-j784s4-evm-usxgmii-exp1-exp2.dtb =20 # Enable support for device-tree overlays diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-usb0-type-a.dtso b= /arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-usb0-type-a.dtso new file mode 100644 index 000000000000..ba15d72d86d6 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-usb0-type-a.dtso @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/** + * DT Overlay for enabling USB0 instance of USB on J784S4 and J742S2 EVMs = for + * Host Mode of operation with the Type-A Connector. + * + * J784S4 EVM Product Link: https://www.ti.com/tool/J784S4XEVM + * J742S2 EVM Product Link: https://www.ti.com/tool/J742S2XH01EVM + * + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include + +&exp2 { + p12-hog { + /* P12 - USB2.0_MUX_SEL */ + gpio-hog; + gpios =3D <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "USB2.0_MUX_SEL"; + }; +}; + +&usb0 { + dr_mode =3D "host"; +}; --=20 2.43.0