From nobody Tue Feb 10 07:00:56 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84A32186A for ; Thu, 23 Jan 2025 10:37:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737628648; cv=none; b=RJv7c2FnwyM055sg4XPJLJ0nCLnxQ5igUet1ZP85ASczMyExc57MIWO9q0UW6XBr3Nmb7OPo6JG3OQof0hFrTHcHx6qntqB0PJ+nNN6HbRvx1k2wB8vV6IxlMcNAjYLgBZ9afFyrHxzpyFnnKmmT2uHWlspeTgabx2dFkmgyZqE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737628648; c=relaxed/simple; bh=OLu3vDS2ZKNfJItxo4kTx0bToRxzEIyab1r5UHmyvxs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=JgAF54bfLTYOPeudXkts/AJENmsZsNHpsT5XcGebTO4pKyxK41T6mDIjSK89s7cUpoLmhvhHeu9EBrtzUGTRy7ljbpFfjOMOVOt5xjDkoP3pTTpTkDq4FdPl1siILxeGs2YUQZe8O7ZLdC+PWPR7hTQSzi1uGwxgTTvRYCF086Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ga8qYqDs; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ga8qYqDs" Received: by smtp.kernel.org (Postfix) with ESMTPS id F04FDC4CED3; Thu, 23 Jan 2025 10:37:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1737628648; bh=OLu3vDS2ZKNfJItxo4kTx0bToRxzEIyab1r5UHmyvxs=; h=From:Date:Subject:To:Cc:Reply-To:From; b=ga8qYqDsybdkksU/AwUp5UHj7N1EaIJmc1s/MDEYBSkyXAqBSD0QAf+tbcnzwE0j0 R8aIo+J5V42W+CAOPHvhmTNYxGv/fUv3rDrum2h8MM5lX77u6CM1ixkK+OhzdcL7Ex UTxPOIJ4lkdif86wrFQe9flEJHGjCUTVPUNd4brpNmxwSwWB0RgA+kFcXwozkHSWmu Llv7X2h7FzX99xtA5QZZu3D9i23p0HGlq3FniNT6AiQBZgU1LmZ75e6JPhWmqd/q03 q9Ww76zPuv/xeOegTyuuseSAK/3N7XXKon9+F2nB+fNrdxZiM60GNgDTrNE2XGyWlV OOIS5x45lNgTA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id E62D3C02182; Thu, 23 Jan 2025 10:37:27 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Thu, 23 Jan 2025 18:37:08 +0800 Subject: [PATCH] soc: amlogic: clk-measure: Optimize the memory size of clk-measure Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250123-optimize_memory_size_of_clk_measure-v1-1-06aa6a01ff37@amlogic.com> X-B4-Tracking: v=1; b=H4sIANMbkmcC/x2N0QrCMBAEf6Xcs4Ektmj9FSmhxI0emqbcqail/ 270bWYedhdSCEPp0CwkeLJymaq4TUPxMk5nGD5VJ299Z53fmjLfOfMHISMXeQf9cUkh3q41jfo QmNTH1mLvul3fUl2aBYlf/5fjsK5fo59KM3UAAAA= To: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1737628646; l=9300; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=09XhYDP6iI0Tb7WSsTJeEPwen1jQBHDBnTyU/ciBS8c=; b=IDA62YuwwJTS75iY3P6AMNE7mnzXnQVceQXhlo/VtGYQqoiiAqWtFDNQMB/I8/2d/D3hif5PK 99O/0zM5p/MAmBD4AtSdc6WekpU+vYnfuoA5qii9cL8DanTxN/Dstpq X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Define struct meson_msr as a static global variable and remove the "*priv" member from struct meson_msr_id. Define the size of the corresponding array based on the actual number of msr_id of the chip. The array corresponding to msr_id is defined as "__initdata" to reduce memory usage. Signed-off-by: Chuan Liu --- Each msr_id defines a pointer(*priv), and all these pointers point to the same address. The number of msr_ids for each chip is inconsistent. Defining a fixed-size array for each chip to store msr_ids would waste memory. --- drivers/soc/amlogic/meson-clk-measure.c | 119 ++++++++++++++++++++--------= ---- 1 file changed, 74 insertions(+), 45 deletions(-) diff --git a/drivers/soc/amlogic/meson-clk-measure.c b/drivers/soc/amlogic/= meson-clk-measure.c index a6453ffeb753..b52e9ce25ea8 100644 --- a/drivers/soc/amlogic/meson-clk-measure.c +++ b/drivers/soc/amlogic/meson-clk-measure.c @@ -33,23 +33,27 @@ static DEFINE_MUTEX(measure_lock); #define DIV_STEP 32 #define DIV_MAX 640 =20 -#define CLK_MSR_MAX 128 - struct meson_msr_id { - struct meson_msr *priv; unsigned int id; const char *name; }; =20 +struct meson_msr_data { + struct meson_msr_id *msr_table; + unsigned int msr_count; +}; + struct meson_msr { struct regmap *regmap; - struct meson_msr_id msr_table[CLK_MSR_MAX]; + struct meson_msr_data data; }; =20 #define CLK_MSR_ID(__id, __name) \ [__id] =3D {.id =3D __id, .name =3D __name,} =20 -static struct meson_msr_id clk_msr_m8[CLK_MSR_MAX] =3D { +static struct meson_msr meson_msr; + +static struct meson_msr_id clk_msr_m8[] __initdata =3D { CLK_MSR_ID(0, "ring_osc_out_ee0"), CLK_MSR_ID(1, "ring_osc_out_ee1"), CLK_MSR_ID(2, "ring_osc_out_ee2"), @@ -98,7 +102,7 @@ static struct meson_msr_id clk_msr_m8[CLK_MSR_MAX] =3D { CLK_MSR_ID(63, "mipi_csi_cfg"), }; =20 -static struct meson_msr_id clk_msr_gx[CLK_MSR_MAX] =3D { +static struct meson_msr_id clk_msr_gx[] __initdata =3D { CLK_MSR_ID(0, "ring_osc_out_ee_0"), CLK_MSR_ID(1, "ring_osc_out_ee_1"), CLK_MSR_ID(2, "ring_osc_out_ee_2"), @@ -168,7 +172,7 @@ static struct meson_msr_id clk_msr_gx[CLK_MSR_MAX] =3D { CLK_MSR_ID(82, "ge2d"), }; =20 -static struct meson_msr_id clk_msr_axg[CLK_MSR_MAX] =3D { +static struct meson_msr_id clk_msr_axg[] __initdata =3D { CLK_MSR_ID(0, "ring_osc_out_ee_0"), CLK_MSR_ID(1, "ring_osc_out_ee_1"), CLK_MSR_ID(2, "ring_osc_out_ee_2"), @@ -242,7 +246,7 @@ static struct meson_msr_id clk_msr_axg[CLK_MSR_MAX] =3D= { CLK_MSR_ID(109, "audio_locker_in"), }; =20 -static struct meson_msr_id clk_msr_g12a[CLK_MSR_MAX] =3D { +static struct meson_msr_id clk_msr_g12a[] __initdata =3D { CLK_MSR_ID(0, "ring_osc_out_ee_0"), CLK_MSR_ID(1, "ring_osc_out_ee_1"), CLK_MSR_ID(2, "ring_osc_out_ee_2"), @@ -358,7 +362,7 @@ static struct meson_msr_id clk_msr_g12a[CLK_MSR_MAX] = =3D { CLK_MSR_ID(122, "audio_pdm_dclk"), }; =20 -static struct meson_msr_id clk_msr_sm1[CLK_MSR_MAX] =3D { +static struct meson_msr_id clk_msr_sm1[] __initdata =3D { CLK_MSR_ID(0, "ring_osc_out_ee_0"), CLK_MSR_ID(1, "ring_osc_out_ee_1"), CLK_MSR_ID(2, "ring_osc_out_ee_2"), @@ -489,9 +493,8 @@ static struct meson_msr_id clk_msr_sm1[CLK_MSR_MAX] =3D= { }; =20 static int meson_measure_id(struct meson_msr_id *clk_msr_id, - unsigned int duration) + unsigned int duration) { - struct meson_msr *priv =3D clk_msr_id->priv; unsigned int val; int ret; =20 @@ -499,22 +502,22 @@ static int meson_measure_id(struct meson_msr_id *clk_= msr_id, if (ret) return ret; =20 - regmap_write(priv->regmap, MSR_CLK_REG0, 0); + regmap_write(meson_msr.regmap, MSR_CLK_REG0, 0); =20 /* Set measurement duration */ - regmap_update_bits(priv->regmap, MSR_CLK_REG0, MSR_DURATION, + regmap_update_bits(meson_msr.regmap, MSR_CLK_REG0, MSR_DURATION, FIELD_PREP(MSR_DURATION, duration - 1)); =20 /* Set ID */ - regmap_update_bits(priv->regmap, MSR_CLK_REG0, MSR_CLK_SRC, + regmap_update_bits(meson_msr.regmap, MSR_CLK_REG0, MSR_CLK_SRC, FIELD_PREP(MSR_CLK_SRC, clk_msr_id->id)); =20 /* Enable & Start */ - regmap_update_bits(priv->regmap, MSR_CLK_REG0, + regmap_update_bits(meson_msr.regmap, MSR_CLK_REG0, MSR_RUN | MSR_ENABLE, MSR_RUN | MSR_ENABLE); =20 - ret =3D regmap_read_poll_timeout(priv->regmap, MSR_CLK_REG0, + ret =3D regmap_read_poll_timeout(meson_msr.regmap, MSR_CLK_REG0, val, !(val & MSR_BUSY), 10, 10000); if (ret) { mutex_unlock(&measure_lock); @@ -522,10 +525,10 @@ static int meson_measure_id(struct meson_msr_id *clk_= msr_id, } =20 /* Disable */ - regmap_update_bits(priv->regmap, MSR_CLK_REG0, MSR_ENABLE, 0); + regmap_update_bits(meson_msr.regmap, MSR_CLK_REG0, MSR_ENABLE, 0); =20 /* Get the value in multiple of gate time counts */ - regmap_read(priv->regmap, MSR_CLK_REG2, &val); + regmap_read(meson_msr.regmap, MSR_CLK_REG2, &val); =20 mutex_unlock(&measure_lock); =20 @@ -579,7 +582,7 @@ static int clk_msr_summary_show(struct seq_file *s, voi= d *data) seq_puts(s, " clock rate precision\n"); seq_puts(s, "---------------------------------------------\n"); =20 - for (i =3D 0 ; i < CLK_MSR_MAX ; ++i) { + for (i =3D 0 ; i < meson_msr.data.msr_count ; ++i) { if (!msr_table[i].name) continue; =20 @@ -604,77 +607,103 @@ static const struct regmap_config meson_clk_msr_regm= ap_config =3D { =20 static int meson_msr_probe(struct platform_device *pdev) { - const struct meson_msr_id *match_data; - struct meson_msr *priv; + const struct meson_msr_data *match_data; + struct meson_msr_id *msr_table; struct dentry *root, *clks; void __iomem *base; int i; =20 - priv =3D devm_kzalloc(&pdev->dev, sizeof(struct meson_msr), - GFP_KERNEL); - if (!priv) - return -ENOMEM; - match_data =3D device_get_match_data(&pdev->dev); if (!match_data) { dev_err(&pdev->dev, "failed to get match data\n"); return -ENODEV; } =20 - memcpy(priv->msr_table, match_data, sizeof(priv->msr_table)); + msr_table =3D devm_kcalloc(&pdev->dev, match_data->msr_count, + sizeof(struct meson_msr_id), GFP_KERNEL); + if (!msr_table) + return -ENOMEM; + + memcpy(msr_table, match_data->msr_table, + match_data->msr_count * sizeof(struct meson_msr_id)); + meson_msr.data.msr_table =3D msr_table; + meson_msr.data.msr_count =3D match_data->msr_count; =20 base =3D devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(base)) return PTR_ERR(base); =20 - priv->regmap =3D devm_regmap_init_mmio(&pdev->dev, base, - &meson_clk_msr_regmap_config); - if (IS_ERR(priv->regmap)) - return PTR_ERR(priv->regmap); + meson_msr.regmap =3D devm_regmap_init_mmio(&pdev->dev, base, + &meson_clk_msr_regmap_config); + if (IS_ERR(meson_msr.regmap)) + return PTR_ERR(meson_msr.regmap); =20 root =3D debugfs_create_dir("meson-clk-msr", NULL); clks =3D debugfs_create_dir("clks", root); =20 - debugfs_create_file("measure_summary", 0444, root, - priv->msr_table, &clk_msr_summary_fops); + debugfs_create_file("measure_summary", 0444, root, msr_table, + &clk_msr_summary_fops); =20 - for (i =3D 0 ; i < CLK_MSR_MAX ; ++i) { - if (!priv->msr_table[i].name) + for (i =3D 0 ; i < meson_msr.data.msr_count ; ++i) { + if (!msr_table[i].name) continue; =20 - priv->msr_table[i].priv =3D priv; - - debugfs_create_file(priv->msr_table[i].name, 0444, clks, - &priv->msr_table[i], &clk_msr_fops); + debugfs_create_file(msr_table[i].name, 0444, clks, + &msr_table[i], &clk_msr_fops); } =20 return 0; } =20 +static const struct meson_msr_data clk_msr_gx_data =3D { + .msr_table =3D clk_msr_gx, + .msr_count =3D ARRAY_SIZE(clk_msr_gx), +}; + +static const struct meson_msr_data clk_msr_m8_data =3D { + .msr_table =3D clk_msr_m8, + .msr_count =3D ARRAY_SIZE(clk_msr_m8), +}; + +static const struct meson_msr_data clk_msr_axg_data =3D { + .msr_table =3D clk_msr_axg, + .msr_count =3D ARRAY_SIZE(clk_msr_axg), +}; + +static const struct meson_msr_data clk_msr_g12a_data =3D { + .msr_table =3D clk_msr_g12a, + .msr_count =3D ARRAY_SIZE(clk_msr_g12a), +}; + +static const struct meson_msr_data clk_msr_sm1_data =3D { + .msr_table =3D clk_msr_sm1, + .msr_count =3D ARRAY_SIZE(clk_msr_sm1), +}; + static const struct of_device_id meson_msr_match_table[] =3D { { .compatible =3D "amlogic,meson-gx-clk-measure", - .data =3D (void *)clk_msr_gx, + .data =3D &clk_msr_gx_data, }, { .compatible =3D "amlogic,meson8-clk-measure", - .data =3D (void *)clk_msr_m8, + .data =3D &clk_msr_m8_data, }, { .compatible =3D "amlogic,meson8b-clk-measure", - .data =3D (void *)clk_msr_m8, + .data =3D &clk_msr_m8_data, }, { .compatible =3D "amlogic,meson-axg-clk-measure", - .data =3D (void *)clk_msr_axg, + .data =3D &clk_msr_axg_data, }, { .compatible =3D "amlogic,meson-g12a-clk-measure", - .data =3D (void *)clk_msr_g12a, + .data =3D &clk_msr_g12a_data, }, { .compatible =3D "amlogic,meson-sm1-clk-measure", - .data =3D (void *)clk_msr_sm1, + .data =3D &clk_msr_sm1_data, }, { /* sentinel */ } }; --- base-commit: 1e1fd26ed4ca05cc1f0e5857918da4dd54967f7d change-id: 20250123-optimize_memory_size_of_clk_measure-f9c40e815794 Best regards, --=20 Chuan Liu